FEB_2016 04.10.23 10:33:06
Info
10:32:17:ST3_hmp4040:INFO:
10:32:17:febtest:INFO: FEB8.2 selected
10:32:17:febtest:INFO: FEB8.2 selected
10:32:33:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:32:40:ST3_Shared:INFO: Listo of operators:Olga B.;
10:32:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:41:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
10:32:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:42:febtest:INFO: Tsting FEB with SN 2016
10:32:43:smx_tester:INFO: Scanning setup
10:32:43:elinks:INFO: Disabling clock on downlink 0
10:32:43:elinks:INFO: Disabling clock on downlink 1
10:32:43:elinks:INFO: Disabling clock on downlink 2
10:32:43:elinks:INFO: Disabling clock on downlink 3
10:32:43:elinks:INFO: Disabling clock on downlink 4
10:32:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:32:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:43:elinks:INFO: Disabling clock on downlink 0
10:32:43:elinks:INFO: Disabling clock on downlink 1
10:32:43:elinks:INFO: Disabling clock on downlink 2
10:32:43:elinks:INFO: Disabling clock on downlink 3
10:32:43:elinks:INFO: Disabling clock on downlink 4
10:32:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:43:elinks:INFO: Disabling clock on downlink 0
10:32:43:elinks:INFO: Disabling clock on downlink 1
10:32:43:elinks:INFO: Disabling clock on downlink 2
10:32:43:elinks:INFO: Disabling clock on downlink 3
10:32:43:elinks:INFO: Disabling clock on downlink 4
10:32:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:32:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:43:elinks:INFO: Disabling clock on downlink 0
10:32:43:elinks:INFO: Disabling clock on downlink 1
10:32:43:elinks:INFO: Disabling clock on downlink 2
10:32:43:elinks:INFO: Disabling clock on downlink 3
10:32:43:elinks:INFO: Disabling clock on downlink 4
10:32:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:32:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:43:elinks:INFO: Disabling clock on downlink 0
10:32:43:elinks:INFO: Disabling clock on downlink 1
10:32:43:elinks:INFO: Disabling clock on downlink 2
10:32:43:elinks:INFO: Disabling clock on downlink 3
10:32:43:elinks:INFO: Disabling clock on downlink 4
10:32:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:32:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:32:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:32:44:ST3_emu:ERROR: # of setup_elements is ZERO!
10:33:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:33:06:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
10:33:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:33:06:febtest:INFO: Tsting FEB with SN 2016
10:33:07:smx_tester:INFO: Scanning setup
10:33:07:elinks:INFO: Disabling clock on downlink 0
10:33:07:elinks:INFO: Disabling clock on downlink 1
10:33:07:elinks:INFO: Disabling clock on downlink 2
10:33:07:elinks:INFO: Disabling clock on downlink 3
10:33:07:elinks:INFO: Disabling clock on downlink 4
10:33:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:33:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:33:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:33:07:elinks:INFO: Disabling clock on downlink 0
10:33:07:elinks:INFO: Disabling clock on downlink 1
10:33:07:elinks:INFO: Disabling clock on downlink 2
10:33:07:elinks:INFO: Disabling clock on downlink 3
10:33:07:elinks:INFO: Disabling clock on downlink 4
10:33:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:33:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:33:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:33:08:elinks:INFO: Disabling clock on downlink 0
10:33:08:elinks:INFO: Disabling clock on downlink 1
10:33:08:elinks:INFO: Disabling clock on downlink 2
10:33:08:elinks:INFO: Disabling clock on downlink 3
10:33:08:elinks:INFO: Disabling clock on downlink 4
10:33:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:33:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:33:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:33:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:33:08:elinks:INFO: Disabling clock on downlink 0
10:33:08:elinks:INFO: Disabling clock on downlink 1
10:33:08:elinks:INFO: Disabling clock on downlink 2
10:33:08:elinks:INFO: Disabling clock on downlink 3
10:33:08:elinks:INFO: Disabling clock on downlink 4
10:33:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:33:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:33:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:33:08:elinks:INFO: Disabling clock on downlink 0
10:33:08:elinks:INFO: Disabling clock on downlink 1
10:33:08:elinks:INFO: Disabling clock on downlink 2
10:33:08:elinks:INFO: Disabling clock on downlink 3
10:33:08:elinks:INFO: Disabling clock on downlink 4
10:33:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:33:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:33:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:33:08:setup_element:INFO: Scanning clock phase
10:33:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:33:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:33:09:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:33:09:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:33:09:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:33:09:setup_element:INFO: Eye window for uplink 18: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:33:09:setup_element:INFO: Eye window for uplink 19: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:33:09:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:33:09:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:33:09:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:33:09:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:33:09:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:33:09:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:33:09:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:33:09:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:33:09:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:33:09:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:33:09:setup_element:INFO: Eye window for uplink 30: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:33:09:setup_element:INFO: Eye window for uplink 31: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:33:09:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:33:09:setup_element:INFO: Scanning data phases
10:33:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:33:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:33:15:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:33:15:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
10:33:15:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
10:33:15:setup_element:INFO: Eye window for uplink 18: _________________________________XXXX___
Data delay found: 14
10:33:15:setup_element:INFO: Eye window for uplink 19: ______________________________XXXXX_____
Data delay found: 12
10:33:15:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX
Data delay found: 17
10:33:15:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXXX_
Data delay found: 15
10:33:15:setup_element:INFO: Eye window for uplink 22: _________________________________XXXXX__
Data delay found: 15
10:33:15:setup_element:INFO: Eye window for uplink 23: ________________________________XXXX____
Data delay found: 13
10:33:15:setup_element:INFO: Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
10:33:15:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
10:33:15:setup_element:INFO: Eye window for uplink 26: ____XXXXX_______________________________
Data delay found: 26
10:33:15:setup_element:INFO: Eye window for uplink 27: _______XXXXX____________________________
Data delay found: 29
10:33:15:setup_element:INFO: Eye window for uplink 28: ________XXXXX___________________________
Data delay found: 30
10:33:15:setup_element:INFO: Eye window for uplink 29: __________XXXXX_________________________
Data delay found: 32
10:33:15:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
10:33:15:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
10:33:15:setup_element:INFO: Setting the data phase to 19 for uplink 16
10:33:15:setup_element:INFO: Setting the data phase to 15 for uplink 17
10:33:15:setup_element:INFO: Setting the data phase to 14 for uplink 18
10:33:15:setup_element:INFO: Setting the data phase to 12 for uplink 19
10:33:15:setup_element:INFO: Setting the data phase to 17 for uplink 20
10:33:15:setup_element:INFO: Setting the data phase to 15 for uplink 21
10:33:15:setup_element:INFO: Setting the data phase to 15 for uplink 22
10:33:15:setup_element:INFO: Setting the data phase to 13 for uplink 23
10:33:15:setup_element:INFO: Setting the data phase to 27 for uplink 24
10:33:15:setup_element:INFO: Setting the data phase to 30 for uplink 25
10:33:15:setup_element:INFO: Setting the data phase to 26 for uplink 26
10:33:15:setup_element:INFO: Setting the data phase to 29 for uplink 27
10:33:15:setup_element:INFO: Setting the data phase to 30 for uplink 28
10:33:15:setup_element:INFO: Setting the data phase to 32 for uplink 29
10:33:15:setup_element:INFO: Setting the data phase to 39 for uplink 30
10:33:15:setup_element:INFO: Setting the data phase to 38 for uplink 31
10:33:15:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 68
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXX_
Uplink 17: _______________________________________________________________________XXXXXXXX_
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: _______________________________________________________________________XXXXXXXX_
Uplink 25: _______________________________________________________________________XXXXXXXX_
Uplink 26: _____________________________________________________________________XXXXXXXXX__
Uplink 27: _____________________________________________________________________XXXXXXXXX__
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: X________________________________________________________________________XXXXXXX
Uplink 31: X________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 18:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 19:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 22:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 23:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 24:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 27:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 28:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 29:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 30:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
]
10:33:15:setup_element:INFO: Beginning SMX ASICs map scan
10:33:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:33:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:33:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:33:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:33:15:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:33:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:33:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:33:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:33:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:33:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:33:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:33:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:33:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:33:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:33:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:33:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:33:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:33:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:33:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:33:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:33:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:33:18:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 68
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXX_
Uplink 17: _______________________________________________________________________XXXXXXXX_
Uplink 18: _____________________________________________________________________XXXXXXXX___
Uplink 19: _____________________________________________________________________XXXXXXXX___
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: _____________________________________________________________________XXXXXXXXX__
Uplink 23: _____________________________________________________________________XXXXXXXXX__
Uplink 24: _______________________________________________________________________XXXXXXXX_
Uplink 25: _______________________________________________________________________XXXXXXXX_
Uplink 26: _____________________________________________________________________XXXXXXXXX__
Uplink 27: _____________________________________________________________________XXXXXXXXX__
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: X________________________________________________________________________XXXXXXX
Uplink 31: X________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 18:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 19:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 22:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 23:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 24:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 27:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 28:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 29:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 30:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 31:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
10:33:18:setup_element:INFO: Performing Elink synchronization
10:33:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:33:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:33:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:33:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:33:18:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:33:18:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:33:18:ST3_emu:INFO: Number of chips: 8
10:33:18:ST3_emu:INFO: Chip address: 0x0
10:33:18:ST3_emu:INFO: Chip address: 0x1
10:33:18:ST3_emu:INFO: Chip address: 0x2
10:33:18:ST3_emu:INFO: Chip address: 0x3
10:33:18:ST3_emu:INFO: Chip address: 0x4
10:33:18:ST3_emu:INFO: Chip address: 0x5
10:33:18:ST3_emu:INFO: Chip address: 0x6
10:33:18:ST3_emu:INFO: Chip address: 0x7
10:33:19:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:33:19:febtest:INFO: 0-0 | XA-000-08-001-064-048-096-01 | 31.4 | 1183.3
10:33:19:febtest:INFO: 0-1 | XA-000-08-001-064-039-016-09 | 25.1 | 1206.9
10:33:20:febtest:INFO: 0-2 | XA-000-08-001-064-048-136-00 | 31.4 | 1177.4
10:33:20:febtest:INFO: 0-3 | XA-000-08-001-064-039-000-14 | 34.6 | 1177.4
10:33:20:febtest:INFO: 0-4 | XA-000-08-001-064-048-152-07 | 21.9 | 1218.6
10:33:20:febtest:INFO: 0-5 | XA-000-08-001-064-048-088-08 | 28.2 | 1195.1
10:33:21:febtest:INFO: 0-6 | XA-000-08-001-064-048-128-00 | 21.9 | 1212.7
10:33:21:febtest:INFO: 0-7 | XA-000-08-001-064-048-120-06 | 12.4 | 1236.2
10:33:21:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:33:25:ST3_smx:INFO: chip: 0-0 40.898880 C 1141.874115 mV
10:33:25:ST3_smx:INFO: # loops 0
10:33:26:ST3_smx:INFO: # loops 1
10:33:28:ST3_smx:INFO: # loops 2
10:33:29:ST3_smx:INFO: # loops 3
10:33:31:ST3_smx:INFO: # loops 4
10:33:33:ST3_smx:INFO: Total # of broken channels: 0
10:33:33:ST3_smx:INFO: List of broken channels: []
10:33:33:ST3_smx:INFO: Total # of broken channels: 1
10:33:33:ST3_smx:INFO: List of broken channels: [4]
10:33:33:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:33:37:ST3_smx:INFO: chip: 0-1 31.389742 C 1165.571835 mV
10:33:37:ST3_smx:INFO: # loops 0
10:33:39:ST3_smx:INFO: # loops 1
10:33:41:ST3_smx:INFO: # loops 2
10:33:42:ST3_smx:INFO: # loops 3
10:33:44:ST3_smx:INFO: # loops 4
10:33:45:ST3_smx:INFO: Total # of broken channels: 0
10:33:45:ST3_smx:INFO: List of broken channels: []
10:33:45:ST3_smx:INFO: Total # of broken channels: 0
10:33:45:ST3_smx:INFO: List of broken channels: []
10:33:46:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:33:50:ST3_smx:INFO: chip: 0-2 37.726682 C 1147.806000 mV
10:33:50:ST3_smx:INFO: # loops 0
10:33:51:ST3_smx:INFO: # loops 1
10:33:53:ST3_smx:INFO: # loops 2
10:33:54:ST3_smx:INFO: # loops 3
10:33:56:ST3_smx:INFO: # loops 4
10:33:58:ST3_smx:INFO: Total # of broken channels: 0
10:33:58:ST3_smx:INFO: List of broken channels: []
10:33:58:ST3_smx:INFO: Total # of broken channels: 0
10:33:58:ST3_smx:INFO: List of broken channels: []
10:33:58:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:34:02:ST3_smx:INFO: chip: 0-3 37.726682 C 1159.654860 mV
10:34:02:ST3_smx:INFO: # loops 0
10:34:03:ST3_smx:INFO: # loops 1
10:34:05:ST3_smx:INFO: # loops 2
10:34:07:ST3_smx:INFO: # loops 3
10:34:08:ST3_smx:INFO: # loops 4
10:34:10:ST3_smx:INFO: Total # of broken channels: 0
10:34:10:ST3_smx:INFO: List of broken channels: []
10:34:10:ST3_smx:INFO: Total # of broken channels: 0
10:34:10:ST3_smx:INFO: List of broken channels: []
10:34:10:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:34:14:ST3_smx:INFO: chip: 0-4 28.225000 C 1189.190035 mV
10:34:14:ST3_smx:INFO: # loops 0
10:34:16:ST3_smx:INFO: # loops 1
10:34:17:ST3_smx:INFO: # loops 2
10:34:19:ST3_smx:INFO: # loops 3
10:34:21:ST3_smx:INFO: # loops 4
10:34:22:ST3_smx:INFO: Total # of broken channels: 0
10:34:22:ST3_smx:INFO: List of broken channels: []
10:34:22:ST3_smx:INFO: Total # of broken channels: 0
10:34:22:ST3_smx:INFO: List of broken channels: []
10:34:23:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:34:26:ST3_smx:INFO: chip: 0-5 44.073563 C 1129.995435 mV
10:34:26:ST3_smx:INFO: # loops 0
10:34:28:ST3_smx:INFO: # loops 1
10:34:30:ST3_smx:INFO: # loops 2
10:34:31:ST3_smx:INFO: # loops 3
10:34:33:ST3_smx:INFO: # loops 4
10:34:34:ST3_smx:INFO: Total # of broken channels: 0
10:34:34:ST3_smx:INFO: List of broken channels: []
10:34:34:ST3_smx:INFO: Total # of broken channels: 0
10:34:34:ST3_smx:INFO: List of broken channels: []
10:34:35:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:34:39:ST3_smx:INFO: chip: 0-6 21.902970 C 1212.728715 mV
10:34:39:ST3_smx:INFO: # loops 0
10:34:40:ST3_smx:INFO: # loops 1
10:34:42:ST3_smx:INFO: # loops 2
10:34:43:ST3_smx:INFO: # loops 3
10:34:45:ST3_smx:INFO: # loops 4
10:34:46:ST3_smx:INFO: Total # of broken channels: 0
10:34:46:ST3_smx:INFO: List of broken channels: []
10:34:46:ST3_smx:INFO: Total # of broken channels: 0
10:34:46:ST3_smx:INFO: List of broken channels: []
10:34:47:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:34:51:ST3_smx:INFO: chip: 0-7 15.590880 C 1224.468235 mV
10:34:51:ST3_smx:INFO: # loops 0
10:34:52:ST3_smx:INFO: # loops 1
10:34:54:ST3_smx:INFO: # loops 2
10:34:55:ST3_smx:INFO: # loops 3
10:34:57:ST3_smx:INFO: # loops 4
10:34:59:ST3_smx:INFO: Total # of broken channels: 0
10:34:59:ST3_smx:INFO: List of broken channels: []
10:34:59:ST3_smx:INFO: Total # of broken channels: 0
10:34:59:ST3_smx:INFO: List of broken channels: []
10:34:59:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:34:59:febtest:INFO: 0-0 | XA-000-08-001-064-048-096-01 | 44.1 | 1135.9
10:35:00:febtest:INFO: 0-1 | XA-000-08-001-064-039-016-09 | 37.7 | 1153.7
10:35:00:febtest:INFO: 0-2 | XA-000-08-001-064-048-136-00 | 44.1 | 1135.9
10:35:00:febtest:INFO: 0-3 | XA-000-08-001-064-039-000-14 | 40.9 | 1147.8
10:35:00:febtest:INFO: 0-4 | XA-000-08-001-064-048-152-07 | 31.4 | 1183.3
10:35:01:febtest:INFO: 0-5 | XA-000-08-001-064-048-088-08 | 44.1 | 1130.0
10:35:01:febtest:INFO: 0-6 | XA-000-08-001-064-048-128-00 | 25.1 | 1212.7
10:35:01:febtest:INFO: 0-7 | XA-000-08-001-064-048-120-06 | 15.6 | 1224.5
10:35:15:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2016/B//TestDate_2023_10_04-10_33_06/