
FEB_2017 17.10.23 10:36:54
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10:36:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:36:54:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 10:36:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:36:55:febtest:INFO: Tsting FEB with SN 2017 10:36:56:smx_tester:INFO: Scanning setup 10:36:56:elinks:INFO: Disabling clock on downlink 0 10:36:56:elinks:INFO: Disabling clock on downlink 1 10:36:56:elinks:INFO: Disabling clock on downlink 2 10:36:56:elinks:INFO: Disabling clock on downlink 3 10:36:56:elinks:INFO: Disabling clock on downlink 4 10:36:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:36:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:36:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:36:56:elinks:INFO: Disabling clock on downlink 0 10:36:56:elinks:INFO: Disabling clock on downlink 1 10:36:56:elinks:INFO: Disabling clock on downlink 2 10:36:56:elinks:INFO: Disabling clock on downlink 3 10:36:56:elinks:INFO: Disabling clock on downlink 4 10:36:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:36:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:36:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:36:56:elinks:INFO: Disabling clock on downlink 0 10:36:56:elinks:INFO: Disabling clock on downlink 1 10:36:56:elinks:INFO: Disabling clock on downlink 2 10:36:56:elinks:INFO: Disabling clock on downlink 3 10:36:56:elinks:INFO: Disabling clock on downlink 4 10:36:56:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:36:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:36:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:36:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:36:57:elinks:INFO: Disabling clock on downlink 0 10:36:57:elinks:INFO: Disabling clock on downlink 1 10:36:57:elinks:INFO: Disabling clock on downlink 2 10:36:57:elinks:INFO: Disabling clock on downlink 3 10:36:57:elinks:INFO: Disabling clock on downlink 4 10:36:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:36:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:36:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:36:57:elinks:INFO: Disabling clock on downlink 0 10:36:57:elinks:INFO: Disabling clock on downlink 1 10:36:57:elinks:INFO: Disabling clock on downlink 2 10:36:57:elinks:INFO: Disabling clock on downlink 3 10:36:57:elinks:INFO: Disabling clock on downlink 4 10:36:57:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:36:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:36:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:36:57:setup_element:INFO: Scanning clock phase 10:36:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:36:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:36:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:36:57:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:36:57:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:36:57:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 10:36:57:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 10:36:57:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:36:57:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:36:57:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:36:57:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:36:57:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:36:57:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:36:57:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:36:57:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:36:57:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:36:57:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:36:57:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 10:36:57:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 10:36:57:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 10:36:57:setup_element:INFO: Scanning data phases 10:36:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:36:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:37:03:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:37:03:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX Data delay found: 18 10:37:03:setup_element:INFO: Eye window for uplink 17: ________________________________XXXXX___ Data delay found: 14 10:37:03:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX Data delay found: 18 10:37:03:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__ Data delay found: 15 10:37:03:setup_element:INFO: Eye window for uplink 20: ____________________________________XXXX Data delay found: 17 10:37:03:setup_element:INFO: Eye window for uplink 21: ___________________________________XXXXX Data delay found: 17 10:37:03:setup_element:INFO: Eye window for uplink 22: X_________________________________XXXXX_ Data delay found: 17 10:37:03:setup_element:INFO: Eye window for uplink 23: ________________________________XXXXX___ Data delay found: 14 10:37:03:setup_element:INFO: Eye window for uplink 24: _____XXXX_______________________________ Data delay found: 26 10:37:03:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________ Data delay found: 29 10:37:03:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________ Data delay found: 29 10:37:03:setup_element:INFO: Eye window for uplink 27: ___________XXXXX________________________ Data delay found: 33 10:37:03:setup_element:INFO: Eye window for uplink 28: ____________XXXX________________________ Data delay found: 33 10:37:03:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________ Data delay found: 35 10:37:03:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________ Data delay found: 37 10:37:03:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________ Data delay found: 35 10:37:03:setup_element:INFO: Setting the data phase to 18 for uplink 16 10:37:03:setup_element:INFO: Setting the data phase to 14 for uplink 17 10:37:03:setup_element:INFO: Setting the data phase to 18 for uplink 18 10:37:03:setup_element:INFO: Setting the data phase to 15 for uplink 19 10:37:03:setup_element:INFO: Setting the data phase to 17 for uplink 20 10:37:03:setup_element:INFO: Setting the data phase to 17 for uplink 21 10:37:03:setup_element:INFO: Setting the data phase to 17 for uplink 22 10:37:03:setup_element:INFO: Setting the data phase to 14 for uplink 23 10:37:03:setup_element:INFO: Setting the data phase to 26 for uplink 24 10:37:03:setup_element:INFO: Setting the data phase to 29 for uplink 25 10:37:03:setup_element:INFO: Setting the data phase to 29 for uplink 26 10:37:03:setup_element:INFO: Setting the data phase to 33 for uplink 27 10:37:03:setup_element:INFO: Setting the data phase to 33 for uplink 28 10:37:03:setup_element:INFO: Setting the data phase to 35 for uplink 29 10:37:03:setup_element:INFO: Setting the data phase to 37 for uplink 30 10:37:03:setup_element:INFO: Setting the data phase to 35 for uplink 31 10:37:03:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 71 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXXX_ Uplink 17: _______________________________________________________________________XXXXXXXX_ Uplink 18: _______________________________________________________________________XXXXXXX__ Uplink 19: _______________________________________________________________________XXXXXXX__ Uplink 20: ______________________________________________________________________XXXXXXXX__ Uplink 21: ______________________________________________________________________XXXXXXXX__ Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: ______________________________________________________________________XXXXXXXX__ Uplink 25: ______________________________________________________________________XXXXXXXX__ Uplink 26: ______________________________________________________________________XXXXXXXX__ Uplink 27: ______________________________________________________________________XXXXXXXX__ Uplink 28: _______________________________________________________________________XXXXXXXX_ Uplink 29: _______________________________________________________________________XXXXXXXX_ Uplink 30: ________________________________________________________________________XXXXXXX_ Uplink 31: ________________________________________________________________________XXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 17: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 20: Optimal Phase: 17 Window Length: 36 Eye Window: ____________________________________XXXX Uplink 21: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 22: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXX_ Uplink 23: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 24: Optimal Phase: 26 Window Length: 36 Eye Window: _____XXXX_______________________________ Uplink 25: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 26: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 27: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 28: Optimal Phase: 33 Window Length: 36 Eye Window: ____________XXXX________________________ Uplink 29: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 30: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 31: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ ] 10:37:03:setup_element:INFO: Beginning SMX ASICs map scan 10:37:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:37:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:37:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:37:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:37:03:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:37:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 10:37:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 10:37:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:37:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:37:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 10:37:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 10:37:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:37:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:37:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 10:37:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 10:37:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:37:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:37:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 10:37:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 10:37:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:37:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:37:06:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 71 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXXX_ Uplink 17: _______________________________________________________________________XXXXXXXX_ Uplink 18: _______________________________________________________________________XXXXXXX__ Uplink 19: _______________________________________________________________________XXXXXXX__ Uplink 20: ______________________________________________________________________XXXXXXXX__ Uplink 21: ______________________________________________________________________XXXXXXXX__ Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: ______________________________________________________________________XXXXXXXX__ Uplink 25: ______________________________________________________________________XXXXXXXX__ Uplink 26: ______________________________________________________________________XXXXXXXX__ Uplink 27: ______________________________________________________________________XXXXXXXX__ Uplink 28: _______________________________________________________________________XXXXXXXX_ Uplink 29: _______________________________________________________________________XXXXXXXX_ Uplink 30: ________________________________________________________________________XXXXXXX_ Uplink 31: ________________________________________________________________________XXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 17: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 20: Optimal Phase: 17 Window Length: 36 Eye Window: ____________________________________XXXX Uplink 21: Optimal Phase: 17 Window Length: 35 Eye Window: ___________________________________XXXXX Uplink 22: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXX_ Uplink 23: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 24: Optimal Phase: 26 Window Length: 36 Eye Window: _____XXXX_______________________________ Uplink 25: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 26: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 27: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ Uplink 28: Optimal Phase: 33 Window Length: 36 Eye Window: ____________XXXX________________________ Uplink 29: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 30: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 31: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ 10:37:06:setup_element:INFO: Performing Elink synchronization 10:37:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:37:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:37:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:37:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:37:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:37:06:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:37:06:ST3_emu:INFO: Number of chips: 8 10:37:06:ST3_emu:INFO: Chip address: 0x0 10:37:06:ST3_emu:INFO: Chip address: 0x1 10:37:06:ST3_emu:INFO: Chip address: 0x2 10:37:06:ST3_emu:INFO: Chip address: 0x3 10:37:06:ST3_emu:INFO: Chip address: 0x4 10:37:06:ST3_emu:INFO: Chip address: 0x5 10:37:06:ST3_emu:INFO: Chip address: 0x6 10:37:06:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2 10:37:07:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:37:07:febtest:INFO: 0-0 | XA-000-08-002-000-002-207-02 | 25.1 | 1230.3 10:37:07:febtest:INFO: 0-1 | XA-000-08-002-000-002-211-05 | 47.3 | 1147.8 10:37:08:febtest:INFO: 0-2 | XA-000-08-002-000-002-206-02 | 40.9 | 1171.5 10:37:08:febtest:INFO: 0-3 | XA-000-08-002-000-002-212-05 | 31.4 | 1206.9 10:37:08:febtest:INFO: 0-4 | XA-000-08-002-000-002-202-02 | 15.6 | 1265.4 10:37:08:febtest:INFO: 0-5 | XA-000-08-002-000-002-208-05 | 47.3 | 1141.9 10:37:09:febtest:INFO: 0-6 | XA-000-08-002-000-002-204-02 | 37.7 | 1189.2 10:37:09:febtest:INFO: 0-7 | XA-000-08-002-000-002-205-02 | 34.6 | 1201.0 10:37:09:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:37:12:ST3_smx:INFO: chip: 0-0 25.062742 C 1224.468235 mV 10:37:12:ST3_smx:INFO: # loops 0 10:37:14:ST3_smx:INFO: # loops 1 10:37:16:ST3_smx:INFO: # loops 2 10:37:17:ST3_smx:INFO: # loops 3 10:37:19:ST3_smx:INFO: # loops 4 10:37:20:ST3_smx:INFO: Total # of broken channels: 0 10:37:20:ST3_smx:INFO: List of broken channels: [] 10:37:20:ST3_smx:INFO: Total # of broken channels: 0 10:37:20:ST3_smx:INFO: List of broken channels: [] 10:37:21:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:37:24:ST3_smx:INFO: chip: 0-1 44.073563 C 1147.806000 mV 10:37:24:ST3_smx:INFO: # loops 0 10:37:26:ST3_smx:INFO: # loops 1 10:37:27:ST3_smx:INFO: # loops 2 10:37:29:ST3_smx:INFO: # loops 3 10:37:31:ST3_smx:INFO: # loops 4 10:37:32:ST3_smx:INFO: Total # of broken channels: 0 10:37:32:ST3_smx:INFO: List of broken channels: [] 10:37:32:ST3_smx:INFO: Total # of broken channels: 2 10:37:32:ST3_smx:INFO: List of broken channels: [19, 43] 10:37:33:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:37:36:ST3_smx:INFO: chip: 0-2 37.726682 C 1177.390875 mV 10:37:36:ST3_smx:INFO: # loops 0 10:37:38:ST3_smx:INFO: # loops 1 10:37:40:ST3_smx:INFO: # loops 2 10:37:41:ST3_smx:INFO: # loops 3 10:37:43:ST3_smx:INFO: # loops 4 10:37:45:ST3_smx:INFO: Total # of broken channels: 0 10:37:45:ST3_smx:INFO: List of broken channels: [] 10:37:45:ST3_smx:INFO: Total # of broken channels: 0 10:37:45:ST3_smx:INFO: List of broken channels: [] 10:37:45:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:37:49:ST3_smx:INFO: chip: 0-3 40.898880 C 1165.571835 mV 10:37:49:ST3_smx:INFO: # loops 0 10:37:51:ST3_smx:INFO: # loops 1 10:37:52:ST3_smx:INFO: # loops 2 10:37:54:ST3_smx:INFO: # loops 3 10:37:55:ST3_smx:INFO: # loops 4 10:37:57:ST3_smx:INFO: Total # of broken channels: 0 10:37:57:ST3_smx:INFO: List of broken channels: [] 10:37:57:ST3_smx:INFO: Total # of broken channels: 0 10:37:57:ST3_smx:INFO: List of broken channels: [] 10:37:58:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:38:01:ST3_smx:INFO: chip: 0-4 21.902970 C 1230.330540 mV 10:38:01:ST3_smx:INFO: # loops 0 10:38:03:ST3_smx:INFO: # loops 1 10:38:04:ST3_smx:INFO: # loops 2 10:38:06:ST3_smx:INFO: # loops 3 10:38:08:ST3_smx:INFO: # loops 4 10:38:09:ST3_smx:INFO: Total # of broken channels: 0 10:38:09:ST3_smx:INFO: List of broken channels: [] 10:38:09:ST3_smx:INFO: Total # of broken channels: 0 10:38:09:ST3_smx:INFO: List of broken channels: [] 10:38:10:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:38:13:ST3_smx:INFO: chip: 0-5 47.250730 C 1135.937260 mV 10:38:13:ST3_smx:INFO: # loops 0 10:38:15:ST3_smx:INFO: # loops 1 10:38:16:ST3_smx:INFO: # loops 2 10:38:18:ST3_smx:INFO: # loops 3 10:38:19:ST3_smx:INFO: # loops 4 10:38:21:ST3_smx:INFO: Total # of broken channels: 0 10:38:21:ST3_smx:INFO: List of broken channels: [] 10:38:21:ST3_smx:INFO: Total # of broken channels: 0 10:38:21:ST3_smx:INFO: List of broken channels: [] 10:38:22:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:38:25:ST3_smx:INFO: chip: 0-6 37.726682 C 1189.190035 mV 10:38:25:ST3_smx:INFO: # loops 0 10:38:27:ST3_smx:INFO: # loops 1 10:38:28:ST3_smx:INFO: # loops 2 10:38:30:ST3_smx:INFO: # loops 3 10:38:32:ST3_smx:INFO: # loops 4 10:38:33:ST3_smx:INFO: Total # of broken channels: 0 10:38:33:ST3_smx:INFO: List of broken channels: [] 10:38:33:ST3_smx:INFO: Total # of broken channels: 0 10:38:33:ST3_smx:INFO: List of broken channels: [] 10:38:34:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:38:37:ST3_smx:INFO: chip: 0-7 40.898880 C 1165.571835 mV 10:38:37:ST3_smx:INFO: # loops 0 10:38:39:ST3_smx:INFO: # loops 1 10:38:40:ST3_smx:INFO: # loops 2 10:38:42:ST3_smx:INFO: # loops 3 10:38:43:ST3_smx:INFO: # loops 4 10:38:45:ST3_smx:INFO: Total # of broken channels: 0 10:38:45:ST3_smx:INFO: List of broken channels: [] 10:38:45:ST3_smx:INFO: Total # of broken channels: 0 10:38:45:ST3_smx:INFO: List of broken channels: [] 10:38:46:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:38:46:febtest:INFO: 0-0 | XA-000-08-002-000-002-207-02 | 28.2 | 1212.7 10:38:46:febtest:INFO: 0-1 | XA-000-08-002-000-002-211-05 | 50.4 | 1141.9 10:38:46:febtest:INFO: 0-2 | XA-000-08-002-000-002-206-02 | 40.9 | 1165.6 10:38:47:febtest:INFO: 0-3 | XA-000-08-002-000-002-212-05 | 44.1 | 1159.7 10:38:47:febtest:INFO: 0-4 | XA-000-08-002-000-002-202-02 | 25.1 | 1224.5 10:38:47:febtest:INFO: 0-5 | XA-000-08-002-000-002-208-05 | 50.4 | 1135.9 10:38:47:febtest:INFO: 0-6 | XA-000-08-002-000-002-204-02 | 37.7 | 1189.2 10:38:47:febtest:INFO: 0-7 | XA-000-08-002-000-002-205-02 | 44.1 | 1165.6 10:39:33:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2017/TestDate_2023_10_17-10_36_54/
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