FEB_2018    31.08.23 11:18:28

TextEdit.txt
            11:17:30:ST3_Shared:INFO:	Listo of operators:Olga B.; Oleksandr S.; 
11:17:30:ST3_Shared:INFO:	Listo of operators:Kerstin S.; Olga B.; Oleksandr S.; 
11:18:28:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:18:28:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
11:18:28:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:18:28:febtest:INFO:	Tsting FEB with SN 2018
11:18:29:smx_tester:INFO:	Scanning setup
11:18:29:elinks:INFO:	Disabling clock on downlink 0
11:18:29:elinks:INFO:	Disabling clock on downlink 1
11:18:29:elinks:INFO:	Disabling clock on downlink 2
11:18:29:elinks:INFO:	Disabling clock on downlink 3
11:18:29:elinks:INFO:	Disabling clock on downlink 4
11:18:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:18:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:18:29:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:18:29:elinks:INFO:	Disabling clock on downlink 0
11:18:29:elinks:INFO:	Disabling clock on downlink 1
11:18:29:elinks:INFO:	Disabling clock on downlink 2
11:18:29:elinks:INFO:	Disabling clock on downlink 3
11:18:29:elinks:INFO:	Disabling clock on downlink 4
11:18:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:18:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:18:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:18:30:elinks:INFO:	Disabling clock on downlink 0
11:18:30:elinks:INFO:	Disabling clock on downlink 1
11:18:30:elinks:INFO:	Disabling clock on downlink 2
11:18:30:elinks:INFO:	Disabling clock on downlink 3
11:18:30:elinks:INFO:	Disabling clock on downlink 4
11:18:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:18:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:18:30:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
11:18:30:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
11:18:30:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
11:18:30:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
11:18:30:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
11:18:30:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
11:18:30:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
11:18:30:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
11:18:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:18:30:elinks:INFO:	Disabling clock on downlink 0
11:18:30:elinks:INFO:	Disabling clock on downlink 1
11:18:30:elinks:INFO:	Disabling clock on downlink 2
11:18:30:elinks:INFO:	Disabling clock on downlink 3
11:18:30:elinks:INFO:	Disabling clock on downlink 4
11:18:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:18:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:18:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:18:30:elinks:INFO:	Disabling clock on downlink 0
11:18:30:elinks:INFO:	Disabling clock on downlink 1
11:18:30:elinks:INFO:	Disabling clock on downlink 2
11:18:30:elinks:INFO:	Disabling clock on downlink 3
11:18:30:elinks:INFO:	Disabling clock on downlink 4
11:18:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:18:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:18:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:18:30:setup_element:INFO:	Scanning clock phase
11:18:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:18:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:18:31:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
11:18:31:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:18:31:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:18:31:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:18:31:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:18:31:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:18:31:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:18:31:setup_element:INFO:	Eye window for uplink 30: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:18:31:setup_element:INFO:	Eye window for uplink 31: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
11:18:31:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
11:18:31:setup_element:INFO:	Scanning data phases
11:18:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:18:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:18:36:setup_element:INFO:	Data phase scan results for group 0, downlink 2
11:18:36:setup_element:INFO:	Eye window for uplink 24: ___XXXXXX_______________________________
Data delay found: 25
11:18:36:setup_element:INFO:	Eye window for uplink 25: ______XXXXXX____________________________
Data delay found: 28
11:18:36:setup_element:INFO:	Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
11:18:36:setup_element:INFO:	Eye window for uplink 27: _________XXXXXX_________________________
Data delay found: 31
11:18:36:setup_element:INFO:	Eye window for uplink 28: __________XXXXXX________________________
Data delay found: 32
11:18:36:setup_element:INFO:	Eye window for uplink 29: ____________XXXXXX______________________
Data delay found: 34
11:18:36:setup_element:INFO:	Eye window for uplink 30: ____________XXXXXX______________________
Data delay found: 34
11:18:36:setup_element:INFO:	Eye window for uplink 31: __________XXXXXX________________________
Data delay found: 32
11:18:36:setup_element:INFO:	Setting the data phase to 25 for uplink 24
11:18:36:setup_element:INFO:	Setting the data phase to 28 for uplink 25
11:18:36:setup_element:INFO:	Setting the data phase to 28 for uplink 26
11:18:36:setup_element:INFO:	Setting the data phase to 31 for uplink 27
11:18:36:setup_element:INFO:	Setting the data phase to 32 for uplink 28
11:18:36:setup_element:INFO:	Setting the data phase to 34 for uplink 29
11:18:36:setup_element:INFO:	Setting the data phase to 34 for uplink 30
11:18:36:setup_element:INFO:	Setting the data phase to 32 for uplink 31
11:18:36:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 71
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: _____________________________________________________________________XXXXXXXX___
      Uplink 27: _____________________________________________________________________XXXXXXXX___
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: ____________________________________________________________________XXXXXXXX____
      Uplink 31: ____________________________________________________________________XXXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 25:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 28:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 29:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 30:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 31:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
]
11:18:36:setup_element:INFO:	Beginning SMX ASICs map scan
11:18:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:18:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:18:36:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:18:36:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:18:36:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:18:36:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:18:36:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:18:37:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:18:37:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:18:37:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:18:37:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:18:37:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:18:37:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:18:39:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 71
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: _____________________________________________________________________XXXXXXXX___
      Uplink 27: _____________________________________________________________________XXXXXXXX___
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: ____________________________________________________________________XXXXXXXX____
      Uplink 31: ____________________________________________________________________XXXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 25:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 28:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 29:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 30:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 31:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________

11:18:39:setup_element:INFO:	Performing Elink synchronization
11:18:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:18:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:18:39:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:18:39:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:18:39:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
11:18:39:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
11:18:39:ST3_emu:INFO:	Number of chips: 4
11:18:39:ST3_emu:INFO:	Chip address:  	0x1
11:18:39:ST3_emu:INFO:	Chip address:  	0x3
11:18:39:ST3_emu:INFO:	Chip address:  	0x5
11:18:39:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
11:18:40:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:18:40:febtest:INFO:	0-1 | XA-000-08-001-064-048-248-12 |  40.9 | 1189.2
11:18:40:febtest:INFO:	0-3 | XA-000-08-001-064-048-184-09 |  47.3 | 1165.6
11:18:40:febtest:INFO:	0-5 | XA-000-08-001-064-048-232-11 |  31.4 | 1206.9
11:18:41:febtest:INFO:	0-7 | XA-000-08-001-064-048-192-05 |  44.1 | 1165.6
11:18:41:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:18:44:ST3_smx:INFO:	chip: 0-1 	 44.073563 C 	 1159.654860 mV
11:18:44:ST3_smx:INFO:	# loops 0
11:18:46:ST3_smx:INFO:	# loops 1
11:18:48:ST3_smx:INFO:	# loops 2
11:18:49:ST3_smx:INFO:	# loops 3
11:18:51:ST3_smx:INFO:	# loops 4
11:18:52:ST3_smx:INFO:	Total # of broken channels: 0
11:18:52:ST3_smx:INFO:	List of broken channels: []
11:18:52:ST3_smx:INFO:	Total # of broken channels: 0
11:18:52:ST3_smx:INFO:	List of broken channels: []
11:18:53:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:18:57:ST3_smx:INFO:	chip: 0-3 	 50.430383 C 	 1141.874115 mV
11:18:57:ST3_smx:INFO:	# loops 0
11:18:58:ST3_smx:INFO:	# loops 1
11:19:00:ST3_smx:INFO:	# loops 2
11:19:01:ST3_smx:INFO:	# loops 3
11:19:03:ST3_smx:INFO:	# loops 4
11:19:05:ST3_smx:INFO:	Total # of broken channels: 0
11:19:05:ST3_smx:INFO:	List of broken channels: []
11:19:05:ST3_smx:INFO:	Total # of broken channels: 0
11:19:05:ST3_smx:INFO:	List of broken channels: []
11:19:05:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:19:09:ST3_smx:INFO:	chip: 0-5 	 40.898880 C 	 1171.483840 mV
11:19:09:ST3_smx:INFO:	# loops 0
11:19:11:ST3_smx:INFO:	# loops 1
11:19:12:ST3_smx:INFO:	# loops 2
11:19:14:ST3_smx:INFO:	# loops 3
11:19:15:ST3_smx:INFO:	# loops 4
11:19:17:ST3_smx:INFO:	Total # of broken channels: 0
11:19:17:ST3_smx:INFO:	List of broken channels: []
11:19:17:ST3_smx:INFO:	Total # of broken channels: 0
11:19:17:ST3_smx:INFO:	List of broken channels: []
11:19:17:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:19:21:ST3_smx:INFO:	chip: 0-7 	 47.250730 C 	 1141.874115 mV
11:19:21:ST3_smx:INFO:	# loops 0
11:19:22:ST3_smx:INFO:	# loops 1
11:19:24:ST3_smx:INFO:	# loops 2
11:19:26:ST3_smx:INFO:	# loops 3
11:19:27:ST3_smx:INFO:	# loops 4
11:19:29:ST3_smx:INFO:	Total # of broken channels: 0
11:19:29:ST3_smx:INFO:	List of broken channels: []
11:19:29:ST3_smx:INFO:	Total # of broken channels: 0
11:19:29:ST3_smx:INFO:	List of broken channels: []
11:19:30:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:19:30:febtest:INFO:	0-1 | XA-000-08-001-064-048-248-12 |  47.3 | 1153.7
11:19:30:febtest:INFO:	0-3 | XA-000-08-001-064-048-184-09 |  53.6 | 1135.9
11:19:30:febtest:INFO:	0-5 | XA-000-08-001-064-048-232-11 |  40.9 | 1165.6
11:19:31:febtest:INFO:	0-7 | XA-000-08-001-064-048-192-05 |  50.4 | 1135.9
11:19:36:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2018/B//TestDate_2023_08_31-11_18_28/

          
Comment.txt
M3DL1T1001121A2