Go Back
FEB_2018 05.10.23 11:30:08
Info
11:29:42:smx_tester:INFO: Setting Elink clock mode to 160 MHz
11:30:02:ST3_Shared:INFO: Listo of operators:Kerstin S.; Oleksandr S.;
11:30:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:30:08:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
11:30:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:30:08:febtest:INFO: Tsting FEB with SN 2018
11:30:10:smx_tester:INFO: Scanning setup
11:30:10:elinks:INFO: Disabling clock on downlink 0
11:30:10:elinks:INFO: Disabling clock on downlink 1
11:30:10:elinks:INFO: Disabling clock on downlink 2
11:30:10:elinks:INFO: Disabling clock on downlink 3
11:30:10:elinks:INFO: Disabling clock on downlink 4
11:30:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:30:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:30:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:30:10:elinks:INFO: Disabling clock on downlink 0
11:30:10:elinks:INFO: Disabling clock on downlink 1
11:30:10:elinks:INFO: Disabling clock on downlink 2
11:30:10:elinks:INFO: Disabling clock on downlink 3
11:30:10:elinks:INFO: Disabling clock on downlink 4
11:30:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:30:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:30:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:30:10:elinks:INFO: Disabling clock on downlink 0
11:30:10:elinks:INFO: Disabling clock on downlink 1
11:30:10:elinks:INFO: Disabling clock on downlink 2
11:30:10:elinks:INFO: Disabling clock on downlink 3
11:30:10:elinks:INFO: Disabling clock on downlink 4
11:30:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:30:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:30:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:30:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:30:10:elinks:INFO: Disabling clock on downlink 0
11:30:10:elinks:INFO: Disabling clock on downlink 1
11:30:10:elinks:INFO: Disabling clock on downlink 2
11:30:10:elinks:INFO: Disabling clock on downlink 3
11:30:10:elinks:INFO: Disabling clock on downlink 4
11:30:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:30:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:30:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:30:10:elinks:INFO: Disabling clock on downlink 0
11:30:10:elinks:INFO: Disabling clock on downlink 1
11:30:10:elinks:INFO: Disabling clock on downlink 2
11:30:10:elinks:INFO: Disabling clock on downlink 3
11:30:10:elinks:INFO: Disabling clock on downlink 4
11:30:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:30:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:30:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:30:11:setup_element:INFO: Scanning clock phase
11:30:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:30:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:30:11:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:30:11:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:30:11:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:30:11:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:30:11:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:30:11:setup_element:INFO: Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:30:11:setup_element:INFO: Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:30:11:setup_element:INFO: Eye window for uplink 22: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:30:11:setup_element:INFO: Eye window for uplink 23: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:30:11:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:30:11:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:30:11:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:30:11:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
11:30:11:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:30:11:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:30:11:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:30:11:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:30:11:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
11:30:11:setup_element:INFO: Scanning data phases
11:30:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:30:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:30:17:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:30:17:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX
Data delay found: 20
11:30:17:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
11:30:17:setup_element:INFO: Eye window for uplink 18: XXX_________________________________XXXX
Data delay found: 19
11:30:17:setup_element:INFO: Eye window for uplink 19: X_________________________________XXXXX_
Data delay found: 17
11:30:17:setup_element:INFO: Eye window for uplink 20: ________________________________XXXXX___
Data delay found: 14
11:30:17:setup_element:INFO: Eye window for uplink 21: _______________________________XXXXX____
Data delay found: 13
11:30:17:setup_element:INFO: Eye window for uplink 22: ________________________________XXXX____
Data delay found: 13
11:30:17:setup_element:INFO: Eye window for uplink 23: ______________________________XXXXX_____
Data delay found: 12
11:30:17:setup_element:INFO: Eye window for uplink 24: ___XXXXXX_______________________________
Data delay found: 25
11:30:17:setup_element:INFO: Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
11:30:17:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
11:30:17:setup_element:INFO: Eye window for uplink 27: _________XXXXXX_________________________
Data delay found: 31
11:30:17:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
11:30:17:setup_element:INFO: Eye window for uplink 29: ____________XXXXXX______________________
Data delay found: 34
11:30:17:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
11:30:17:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
11:30:17:setup_element:INFO: Setting the data phase to 20 for uplink 16
11:30:17:setup_element:INFO: Setting the data phase to 15 for uplink 17
11:30:17:setup_element:INFO: Setting the data phase to 19 for uplink 18
11:30:17:setup_element:INFO: Setting the data phase to 17 for uplink 19
11:30:17:setup_element:INFO: Setting the data phase to 14 for uplink 20
11:30:17:setup_element:INFO: Setting the data phase to 13 for uplink 21
11:30:17:setup_element:INFO: Setting the data phase to 13 for uplink 22
11:30:17:setup_element:INFO: Setting the data phase to 12 for uplink 23
11:30:17:setup_element:INFO: Setting the data phase to 25 for uplink 24
11:30:17:setup_element:INFO: Setting the data phase to 28 for uplink 25
11:30:17:setup_element:INFO: Setting the data phase to 28 for uplink 26
11:30:17:setup_element:INFO: Setting the data phase to 31 for uplink 27
11:30:17:setup_element:INFO: Setting the data phase to 33 for uplink 28
11:30:17:setup_element:INFO: Setting the data phase to 34 for uplink 29
11:30:17:setup_element:INFO: Setting the data phase to 37 for uplink 30
11:30:17:setup_element:INFO: Setting the data phase to 35 for uplink 31
11:30:17:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXX_
Uplink 17: _______________________________________________________________________XXXXXXXX_
Uplink 18: _______________________________________________________________________XXXXXXXXX
Uplink 19: _______________________________________________________________________XXXXXXXXX
Uplink 20: ____________________________________________________________________XXXXXXXXX___
Uplink 21: ____________________________________________________________________XXXXXXXXX___
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 19:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 20:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 21:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 22:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 23:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 24:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 25:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 28:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 30:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
]
11:30:17:setup_element:INFO: Beginning SMX ASICs map scan
11:30:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:30:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:30:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:30:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:30:17:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:30:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:30:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:30:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:30:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:30:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:30:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:30:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:30:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:30:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:30:18:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:30:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:30:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:30:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:30:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:30:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:30:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:30:19:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXX_
Uplink 17: _______________________________________________________________________XXXXXXXX_
Uplink 18: _______________________________________________________________________XXXXXXXXX
Uplink 19: _______________________________________________________________________XXXXXXXXX
Uplink 20: ____________________________________________________________________XXXXXXXXX___
Uplink 21: ____________________________________________________________________XXXXXXXXX___
Uplink 22: _____________________________________________________________________XXXXXXXX___
Uplink 23: _____________________________________________________________________XXXXXXXX___
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: _______________________________________________________________________XXXXXXXX_
Uplink 31: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 19:
Optimal Phase: 17
Window Length: 33
Eye Window: X_________________________________XXXXX_
Uplink 20:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 21:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 22:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 23:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 24:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 25:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 28:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 30:
Optimal Phase: 37
Window Length: 33
Eye Window: ______________XXXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
11:30:19:setup_element:INFO: Performing Elink synchronization
11:30:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:30:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:30:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:30:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:30:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:30:20:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:30:20:ST3_emu:INFO: Number of chips: 8
11:30:20:ST3_emu:INFO: Chip address: 0x0
11:30:20:ST3_emu:INFO: Chip address: 0x1
11:30:20:ST3_emu:INFO: Chip address: 0x2
11:30:20:ST3_emu:INFO: Chip address: 0x3
11:30:20:ST3_emu:INFO: Chip address: 0x4
11:30:20:ST3_emu:INFO: Chip address: 0x5
11:30:20:ST3_emu:INFO: Chip address: 0x6
11:30:20:ST3_emu:INFO: Chip address: 0x7
11:30:20:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:30:21:febtest:INFO: 0-0 | XA-000-08-001-064-050-064-12 | 21.9 | 1242.0
11:30:21:febtest:INFO: 0-1 | XA-000-08-001-064-048-248-12 | 34.6 | 1201.0
11:30:21:febtest:INFO: 0-2 | XA-000-08-001-064-050-072-12 | 37.7 | 1183.3
11:30:21:febtest:INFO: 0-3 | XA-000-08-001-064-048-184-09 | 37.7 | 1177.4
11:30:22:febtest:INFO: 0-4 | XA-000-08-001-064-048-216-02 | 37.7 | 1183.3
11:30:22:febtest:INFO: 0-5 | XA-000-08-001-064-048-232-11 | 28.2 | 1224.5
11:30:22:febtest:INFO: 0-6 | XA-000-08-001-064-049-120-11 | 25.1 | 1224.5
11:30:22:febtest:INFO: 0-7 | XA-000-08-001-064-048-192-05 | 40.9 | 1171.5
11:30:22:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:30:26:ST3_smx:INFO: chip: 0-0 28.225000 C 1206.851500 mV
11:30:26:ST3_smx:INFO: # loops 0
11:30:28:ST3_smx:INFO: # loops 1
11:30:29:ST3_smx:INFO: # loops 2
11:30:31:ST3_smx:INFO: # loops 3
11:30:33:ST3_smx:INFO: # loops 4
11:30:34:ST3_smx:INFO: Total # of broken channels: 0
11:30:34:ST3_smx:INFO: List of broken channels: []
11:30:34:ST3_smx:INFO: Total # of broken channels: 0
11:30:34:ST3_smx:INFO: List of broken channels: []
11:30:35:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:30:39:ST3_smx:INFO: chip: 0-1 37.726682 C 1165.571835 mV
11:30:39:ST3_smx:INFO: # loops 0
11:30:40:ST3_smx:INFO: # loops 1
11:30:42:ST3_smx:INFO: # loops 2
11:30:43:ST3_smx:INFO: # loops 3
11:30:45:ST3_smx:INFO: # loops 4
11:30:47:ST3_smx:INFO: Total # of broken channels: 2
11:30:47:ST3_smx:INFO: List of broken channels: [3, 5]
11:30:47:ST3_smx:INFO: Total # of broken channels: 2
11:30:47:ST3_smx:INFO: List of broken channels: [3, 5]
11:30:47:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:30:51:ST3_smx:INFO: chip: 0-2 44.073563 C 1153.732915 mV
11:30:51:ST3_smx:INFO: # loops 0
11:30:53:ST3_smx:INFO: # loops 1
11:30:54:ST3_smx:INFO: # loops 2
11:30:56:ST3_smx:INFO: # loops 3
11:30:58:ST3_smx:INFO: # loops 4
11:30:59:ST3_smx:INFO: Total # of broken channels: 0
11:30:59:ST3_smx:INFO: List of broken channels: []
11:30:59:ST3_smx:INFO: Total # of broken channels: 0
11:30:59:ST3_smx:INFO: List of broken channels: []
11:31:00:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:31:04:ST3_smx:INFO: chip: 0-3 44.073563 C 1153.732915 mV
11:31:04:ST3_smx:INFO: # loops 0
11:31:05:ST3_smx:INFO: # loops 1
11:31:07:ST3_smx:INFO: # loops 2
11:31:09:ST3_smx:INFO: # loops 3
11:31:10:ST3_smx:INFO: # loops 4
11:31:12:ST3_smx:INFO: Total # of broken channels: 0
11:31:12:ST3_smx:INFO: List of broken channels: []
11:31:12:ST3_smx:INFO: Total # of broken channels: 0
11:31:12:ST3_smx:INFO: List of broken channels: []
11:31:12:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:31:16:ST3_smx:INFO: chip: 0-4 37.726682 C 1177.390875 mV
11:31:16:ST3_smx:INFO: # loops 0
11:31:18:ST3_smx:INFO: # loops 1
11:31:19:ST3_smx:INFO: # loops 2
11:31:21:ST3_smx:INFO: # loops 3
11:31:23:ST3_smx:INFO: # loops 4
11:31:24:ST3_smx:INFO: Total # of broken channels: 0
11:31:24:ST3_smx:INFO: List of broken channels: []
11:31:24:ST3_smx:INFO: Total # of broken channels: 0
11:31:24:ST3_smx:INFO: List of broken channels: []
11:31:25:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:31:29:ST3_smx:INFO: chip: 0-5 37.726682 C 1183.292940 mV
11:31:29:ST3_smx:INFO: # loops 0
11:31:30:ST3_smx:INFO: # loops 1
11:31:32:ST3_smx:INFO: # loops 2
11:31:34:ST3_smx:INFO: # loops 3
11:31:35:ST3_smx:INFO: # loops 4
11:31:37:ST3_smx:INFO: Total # of broken channels: 0
11:31:37:ST3_smx:INFO: List of broken channels: []
11:31:37:ST3_smx:INFO: Total # of broken channels: 0
11:31:37:ST3_smx:INFO: List of broken channels: []
11:31:37:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:31:41:ST3_smx:INFO: chip: 0-6 34.556970 C 1195.082160 mV
11:31:41:ST3_smx:INFO: # loops 0
11:31:43:ST3_smx:INFO: # loops 1
11:31:44:ST3_smx:INFO: # loops 2
11:31:46:ST3_smx:INFO: # loops 3
11:31:48:ST3_smx:INFO: # loops 4
11:31:49:ST3_smx:INFO: Total # of broken channels: 0
11:31:49:ST3_smx:INFO: List of broken channels: []
11:31:49:ST3_smx:INFO: Total # of broken channels: 0
11:31:49:ST3_smx:INFO: List of broken channels: []
11:31:50:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
11:31:54:ST3_smx:INFO: chip: 0-7 47.250730 C 1141.874115 mV
11:31:54:ST3_smx:INFO: # loops 0
11:31:55:ST3_smx:INFO: # loops 1
11:31:57:ST3_smx:INFO: # loops 2
11:31:59:ST3_smx:INFO: # loops 3
11:32:00:ST3_smx:INFO: # loops 4
11:32:02:ST3_smx:INFO: Total # of broken channels: 0
11:32:02:ST3_smx:INFO: List of broken channels: []
11:32:02:ST3_smx:INFO: Total # of broken channels: 0
11:32:02:ST3_smx:INFO: List of broken channels: []
11:32:02:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:32:03:febtest:INFO: 0-0 | XA-000-08-001-064-050-064-12 | 37.7 | 1195.1
11:32:03:febtest:INFO: 0-1 | XA-000-08-001-064-048-248-12 | 47.3 | 1159.7
11:32:03:febtest:INFO: 0-2 | XA-000-08-001-064-050-072-12 | 50.4 | 1147.8
11:32:03:febtest:INFO: 0-3 | XA-000-08-001-064-048-184-09 | 50.4 | 1147.8
11:32:03:febtest:INFO: 0-4 | XA-000-08-001-064-048-216-02 | 40.9 | 1171.5
11:32:04:febtest:INFO: 0-5 | XA-000-08-001-064-048-232-11 | 37.7 | 1183.3
11:32:04:febtest:INFO: 0-6 | XA-000-08-001-064-049-120-11 | 34.6 | 1189.2
11:32:04:febtest:INFO: 0-7 | XA-000-08-001-064-048-192-05 | 47.3 | 1141.9
11:32:10:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2018/B//TestDate_2023_10_05-11_30_08/