11:32:30:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:32:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:32:31:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
11:32:31:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:32:31:febtest:INFO:	Tsting FEB with SN 2018
11:32:32:smx_tester:INFO:	Scanning setup
11:32:32:elinks:INFO:	Disabling clock on downlink 0
11:32:32:elinks:INFO:	Disabling clock on downlink 1
11:32:32:elinks:INFO:	Disabling clock on downlink 2
11:32:32:elinks:INFO:	Disabling clock on downlink 3
11:32:32:elinks:INFO:	Disabling clock on downlink 4
11:32:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:32:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:32:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:32:32:elinks:INFO:	Disabling clock on downlink 0
11:32:32:elinks:INFO:	Disabling clock on downlink 1
11:32:32:elinks:INFO:	Disabling clock on downlink 2
11:32:32:elinks:INFO:	Disabling clock on downlink 3
11:32:32:elinks:INFO:	Disabling clock on downlink 4
11:32:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:32:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:32:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:32:33:elinks:INFO:	Disabling clock on downlink 0
11:32:33:elinks:INFO:	Disabling clock on downlink 1
11:32:33:elinks:INFO:	Disabling clock on downlink 2
11:32:33:elinks:INFO:	Disabling clock on downlink 3
11:32:33:elinks:INFO:	Disabling clock on downlink 4
11:32:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:32:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
11:32:33:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
11:32:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:32:33:elinks:INFO:	Disabling clock on downlink 0
11:32:33:elinks:INFO:	Disabling clock on downlink 1
11:32:33:elinks:INFO:	Disabling clock on downlink 2
11:32:33:elinks:INFO:	Disabling clock on downlink 3
11:32:33:elinks:INFO:	Disabling clock on downlink 4
11:32:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:32:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:32:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:32:33:elinks:INFO:	Disabling clock on downlink 0
11:32:33:elinks:INFO:	Disabling clock on downlink 1
11:32:33:elinks:INFO:	Disabling clock on downlink 2
11:32:33:elinks:INFO:	Disabling clock on downlink 3
11:32:33:elinks:INFO:	Disabling clock on downlink 4
11:32:33:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:32:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:32:33:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:32:33:setup_element:INFO:	Scanning clock phase
11:32:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:32:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:32:34:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
11:32:34:setup_element:INFO:	Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:32:34:setup_element:INFO:	Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:32:34:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:32:34:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:32:34:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:32:34:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:32:34:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:32:34:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
11:32:34:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:32:34:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:32:34:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:32:34:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:32:34:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:32:34:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:32:34:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:32:34:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:32:34:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
11:32:34:setup_element:INFO:	Scanning data phases
11:32:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:32:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:32:39:setup_element:INFO:	Data phase scan results for group 0, downlink 2
11:32:39:setup_element:INFO:	Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
11:32:39:setup_element:INFO:	Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
11:32:39:setup_element:INFO:	Eye window for uplink 18: XXX_________________________________XXXX
Data delay found: 19
11:32:39:setup_element:INFO:	Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
11:32:39:setup_element:INFO:	Eye window for uplink 20: ________________________________XXXX____
Data delay found: 13
11:32:39:setup_element:INFO:	Eye window for uplink 21: ______________________________XXXXXX____
Data delay found: 12
11:32:39:setup_element:INFO:	Eye window for uplink 22: ________________________________XXXX____
Data delay found: 13
11:32:39:setup_element:INFO:	Eye window for uplink 23: ______________________________XXXX______
Data delay found: 11
11:32:39:setup_element:INFO:	Eye window for uplink 24: ___XXXXX________________________________
Data delay found: 25
11:32:39:setup_element:INFO:	Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
11:32:39:setup_element:INFO:	Eye window for uplink 26: _____XXXXXX_____________________________
Data delay found: 27
11:32:39:setup_element:INFO:	Eye window for uplink 27: ________XXXXXXX_________________________
Data delay found: 31
11:32:39:setup_element:INFO:	Eye window for uplink 28: __________XXXXXX________________________
Data delay found: 32
11:32:39:setup_element:INFO:	Eye window for uplink 29: ___________XXXXXX_______________________
Data delay found: 33
11:32:39:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
11:32:39:setup_element:INFO:	Eye window for uplink 31: ____________XXXXXX______________________
Data delay found: 34
11:32:39:setup_element:INFO:	Setting the data phase to 19 for uplink 16
11:32:39:setup_element:INFO:	Setting the data phase to 15 for uplink 17
11:32:39:setup_element:INFO:	Setting the data phase to 19 for uplink 18
11:32:39:setup_element:INFO:	Setting the data phase to 16 for uplink 19
11:32:39:setup_element:INFO:	Setting the data phase to 13 for uplink 20
11:32:39:setup_element:INFO:	Setting the data phase to 12 for uplink 21
11:32:39:setup_element:INFO:	Setting the data phase to 13 for uplink 22
11:32:39:setup_element:INFO:	Setting the data phase to 11 for uplink 23
11:32:39:setup_element:INFO:	Setting the data phase to 25 for uplink 24
11:32:39:setup_element:INFO:	Setting the data phase to 28 for uplink 25
11:32:39:setup_element:INFO:	Setting the data phase to 27 for uplink 26
11:32:39:setup_element:INFO:	Setting the data phase to 31 for uplink 27
11:32:39:setup_element:INFO:	Setting the data phase to 32 for uplink 28
11:32:39:setup_element:INFO:	Setting the data phase to 33 for uplink 29
11:32:39:setup_element:INFO:	Setting the data phase to 36 for uplink 30
11:32:39:setup_element:INFO:	Setting the data phase to 34 for uplink 31
11:32:39:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 68
    Eye Windows:
      Uplink 16: _______________________________________________________________________XXXXXXXX_
      Uplink 17: _______________________________________________________________________XXXXXXXX_
      Uplink 18: _______________________________________________________________________XXXXXXXXX
      Uplink 19: _______________________________________________________________________XXXXXXXXX
      Uplink 20: ____________________________________________________________________XXXXXXXXX___
      Uplink 21: ____________________________________________________________________XXXXXXXXX___
      Uplink 22: ____________________________________________________________________XXXXXXXXX___
      Uplink 23: ____________________________________________________________________XXXXXXXXX___
      Uplink 24: ______________________________________________________________________XXXXXXX___
      Uplink 25: ______________________________________________________________________XXXXXXX___
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXX__
      Uplink 29: _______________________________________________________________________XXXXXXX__
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 17:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 18:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 19:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 20:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 21:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 22:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 23:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 24:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 25:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 26:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 33
      Eye Window: ________XXXXXXX_________________________
    Uplink 28:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 30:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
]
11:32:39:setup_element:INFO:	Beginning SMX ASICs map scan
11:32:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:32:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:32:39:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:32:39:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:32:39:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:32:39:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:32:39:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:32:39:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:32:39:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:32:39:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:32:39:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:32:39:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:32:39:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:32:40:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:32:40:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:32:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:32:40:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:32:40:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:32:40:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:32:40:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:32:40:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:32:41:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 68
    Eye Windows:
      Uplink 16: _______________________________________________________________________XXXXXXXX_
      Uplink 17: _______________________________________________________________________XXXXXXXX_
      Uplink 18: _______________________________________________________________________XXXXXXXXX
      Uplink 19: _______________________________________________________________________XXXXXXXXX
      Uplink 20: ____________________________________________________________________XXXXXXXXX___
      Uplink 21: ____________________________________________________________________XXXXXXXXX___
      Uplink 22: ____________________________________________________________________XXXXXXXXX___
      Uplink 23: ____________________________________________________________________XXXXXXXXX___
      Uplink 24: ______________________________________________________________________XXXXXXX___
      Uplink 25: ______________________________________________________________________XXXXXXX___
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXX__
      Uplink 29: _______________________________________________________________________XXXXXXX__
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 17:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 18:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 19:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 20:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 21:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 22:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 23:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
    Uplink 24:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 25:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 26:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 33
      Eye Window: ________XXXXXXX_________________________
    Uplink 28:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 30:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________

11:32:41:setup_element:INFO:	Performing Elink synchronization
11:32:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:32:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:32:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:32:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:32:41:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
11:32:41:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:32:42:ST3_emu:INFO:	Number of chips: 8
11:32:42:ST3_emu:INFO:	Chip address:  	0x0
11:32:42:ST3_emu:INFO:	Chip address:  	0x1
11:32:42:ST3_emu:INFO:	Chip address:  	0x2
11:32:42:ST3_emu:INFO:	Chip address:  	0x3
11:32:42:ST3_emu:INFO:	Chip address:  	0x4
11:32:42:ST3_emu:INFO:	Chip address:  	0x5
11:32:42:ST3_emu:INFO:	Chip address:  	0x6
11:32:42:ST3_emu:INFO:	Chip address:  	0x7
11:32:42:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:32:42:febtest:INFO:	0-0 | XA-000-08-001-064-050-064-12 |  25.1 | 1247.9
11:32:42:febtest:INFO:	0-1 | XA-000-08-001-064-048-248-12 |  37.7 | 1195.1
11:32:43:febtest:INFO:	0-2 | XA-000-08-001-064-050-072-12 |  40.9 | 1183.3
11:32:43:febtest:INFO:	0-3 | XA-000-08-001-064-048-184-09 |  40.9 | 1177.4
11:32:43:febtest:INFO:	0-4 | XA-000-08-001-064-048-216-02 |  40.9 | 1189.2
11:32:43:febtest:INFO:	0-5 | XA-000-08-001-064-048-232-11 |  28.2 | 1224.5
11:32:43:febtest:INFO:	0-6 | XA-000-08-001-064-049-120-11 |  28.2 | 1224.5
11:32:44:febtest:INFO:	0-7 | XA-000-08-001-064-048-192-05 |  40.9 | 1177.4
11:32:44:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:32:48:ST3_smx:INFO:	chip: 0-0 	 34.556970 C 	 1206.851500 mV
11:32:48:ST3_smx:INFO:	# loops 0
11:32:49:ST3_smx:INFO:	# loops 1
11:32:51:ST3_smx:INFO:	# loops 2
11:32:53:ST3_smx:INFO:	# loops 3
11:32:55:ST3_smx:INFO:	# loops 4
11:32:56:ST3_smx:INFO:	Total # of broken channels: 0
11:32:56:ST3_smx:INFO:	List of broken channels: []
11:32:56:ST3_smx:INFO:	Total # of broken channels: 0
11:32:56:ST3_smx:INFO:	List of broken channels: []
11:32:57:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:33:00:ST3_smx:INFO:	chip: 0-1 	 40.898880 C 	 1165.571835 mV
11:33:00:ST3_smx:INFO:	# loops 0
11:33:02:ST3_smx:INFO:	# loops 1
11:33:04:ST3_smx:INFO:	# loops 2
11:33:05:ST3_smx:INFO:	# loops 3
11:33:07:ST3_smx:INFO:	# loops 4
11:33:08:ST3_smx:INFO:	Total # of broken channels: 0
11:33:08:ST3_smx:INFO:	List of broken channels: []
11:33:08:ST3_smx:INFO:	Total # of broken channels: 0
11:33:08:ST3_smx:INFO:	List of broken channels: []
11:33:09:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:33:13:ST3_smx:INFO:	chip: 0-2 	 47.250730 C 	 1153.732915 mV
11:33:13:ST3_smx:INFO:	# loops 0
11:33:15:ST3_smx:INFO:	# loops 1
11:33:16:ST3_smx:INFO:	# loops 2
11:33:18:ST3_smx:INFO:	# loops 3
11:33:20:ST3_smx:INFO:	# loops 4
11:33:21:ST3_smx:INFO:	Total # of broken channels: 0
11:33:21:ST3_smx:INFO:	List of broken channels: []
11:33:21:ST3_smx:INFO:	Total # of broken channels: 0
11:33:21:ST3_smx:INFO:	List of broken channels: []
11:33:22:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:33:25:ST3_smx:INFO:	chip: 0-3 	 47.250730 C 	 1153.732915 mV
11:33:25:ST3_smx:INFO:	# loops 0
11:33:27:ST3_smx:INFO:	# loops 1
11:33:29:ST3_smx:INFO:	# loops 2
11:33:30:ST3_smx:INFO:	# loops 3
11:33:32:ST3_smx:INFO:	# loops 4
11:33:34:ST3_smx:INFO:	Total # of broken channels: 0
11:33:34:ST3_smx:INFO:	List of broken channels: []
11:33:34:ST3_smx:INFO:	Total # of broken channels: 0
11:33:34:ST3_smx:INFO:	List of broken channels: []
11:33:34:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:33:38:ST3_smx:INFO:	chip: 0-4 	 40.898880 C 	 1177.390875 mV
11:33:38:ST3_smx:INFO:	# loops 0
11:33:40:ST3_smx:INFO:	# loops 1
11:33:41:ST3_smx:INFO:	# loops 2
11:33:43:ST3_smx:INFO:	# loops 3
11:33:45:ST3_smx:INFO:	# loops 4
11:33:46:ST3_smx:INFO:	Total # of broken channels: 0
11:33:46:ST3_smx:INFO:	List of broken channels: []
11:33:46:ST3_smx:INFO:	Total # of broken channels: 0
11:33:46:ST3_smx:INFO:	List of broken channels: []
11:33:47:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:33:51:ST3_smx:INFO:	chip: 0-5 	 37.726682 C 	 1183.292940 mV
11:33:51:ST3_smx:INFO:	# loops 0
11:33:53:ST3_smx:INFO:	# loops 1
11:33:54:ST3_smx:INFO:	# loops 2
11:33:56:ST3_smx:INFO:	# loops 3
11:33:57:ST3_smx:INFO:	# loops 4
11:33:59:ST3_smx:INFO:	Total # of broken channels: 0
11:33:59:ST3_smx:INFO:	List of broken channels: []
11:33:59:ST3_smx:INFO:	Total # of broken channels: 0
11:33:59:ST3_smx:INFO:	List of broken channels: []
11:33:59:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:34:03:ST3_smx:INFO:	chip: 0-6 	 34.556970 C 	 1195.082160 mV
11:34:03:ST3_smx:INFO:	# loops 0
11:34:05:ST3_smx:INFO:	# loops 1
11:34:06:ST3_smx:INFO:	# loops 2
11:34:08:ST3_smx:INFO:	# loops 3
11:34:10:ST3_smx:INFO:	# loops 4
11:34:11:ST3_smx:INFO:	Total # of broken channels: 0
11:34:11:ST3_smx:INFO:	List of broken channels: []
11:34:11:ST3_smx:INFO:	Total # of broken channels: 0
11:34:11:ST3_smx:INFO:	List of broken channels: []
11:34:12:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
11:34:16:ST3_smx:INFO:	chip: 0-7 	 47.250730 C 	 1147.806000 mV
11:34:16:ST3_smx:INFO:	# loops 0
11:34:17:ST3_smx:INFO:	# loops 1
11:34:19:ST3_smx:INFO:	# loops 2
11:34:21:ST3_smx:INFO:	# loops 3
11:34:23:ST3_smx:INFO:	# loops 4
11:34:24:ST3_smx:INFO:	Total # of broken channels: 0
11:34:24:ST3_smx:INFO:	List of broken channels: []
11:34:24:ST3_smx:INFO:	Total # of broken channels: 0
11:34:24:ST3_smx:INFO:	List of broken channels: []
11:34:25:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:34:25:febtest:INFO:	0-0 | XA-000-08-001-064-050-064-12 |  40.9 | 1195.1
11:34:25:febtest:INFO:	0-1 | XA-000-08-001-064-048-248-12 |  47.3 | 1159.7
11:34:26:febtest:INFO:	0-2 | XA-000-08-001-064-050-072-12 |  50.4 | 1147.8
11:34:26:febtest:INFO:	0-3 | XA-000-08-001-064-048-184-09 |  50.4 | 1147.8
11:34:26:febtest:INFO:	0-4 | XA-000-08-001-064-048-216-02 |  44.1 | 1177.4
11:34:26:febtest:INFO:	0-5 | XA-000-08-001-064-048-232-11 |  40.9 | 1183.3
11:34:27:febtest:INFO:	0-6 | XA-000-08-001-064-049-120-11 |  37.7 | 1189.2
11:34:27:febtest:INFO:	0-7 | XA-000-08-001-064-048-192-05 |  50.4 | 1141.9
11:34:34:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2018/B//TestDate_2023_10_05-11_32_31/