10:25:43:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:25:44:febtest:INFO:	FEB8.2 selected
10:25:44:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:25:49:ST3_Shared:INFO:	Listo of operators:Olga B.; 
10:25:49:ST3_Shared:INFO:	Listo of operators:Olga B.; Oleksandr S.; 
Traceback (most recent call last):
  File "febtest.py", line 441, in NewSN
    sn_number = int( self.leFEB_SN.text() )
ValueError: invalid literal for int() with base 10: ''
10:26:09:febtest:INFO:	FEB 8-2 B @ GSI
10:26:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:26:17:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
10:26:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:26:18:febtest:INFO:	Tsting FEB with SN 2020
10:26:19:smx_tester:INFO:	Scanning setup
10:26:19:elinks:INFO:	Disabling clock on downlink 0
10:26:19:elinks:INFO:	Disabling clock on downlink 1
10:26:19:elinks:INFO:	Disabling clock on downlink 2
10:26:19:elinks:INFO:	Disabling clock on downlink 3
10:26:19:elinks:INFO:	Disabling clock on downlink 4
10:26:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:26:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:26:19:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:26:19:elinks:INFO:	Disabling clock on downlink 0
10:26:19:elinks:INFO:	Disabling clock on downlink 1
10:26:19:elinks:INFO:	Disabling clock on downlink 2
10:26:19:elinks:INFO:	Disabling clock on downlink 3
10:26:19:elinks:INFO:	Disabling clock on downlink 4
10:26:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:26:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:26:19:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:26:19:elinks:INFO:	Disabling clock on downlink 0
10:26:19:elinks:INFO:	Disabling clock on downlink 1
10:26:19:elinks:INFO:	Disabling clock on downlink 2
10:26:19:elinks:INFO:	Disabling clock on downlink 3
10:26:19:elinks:INFO:	Disabling clock on downlink 4
10:26:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:26:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:26:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:26:19:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:26:19:elinks:INFO:	Disabling clock on downlink 0
10:26:19:elinks:INFO:	Disabling clock on downlink 1
10:26:19:elinks:INFO:	Disabling clock on downlink 2
10:26:19:elinks:INFO:	Disabling clock on downlink 3
10:26:19:elinks:INFO:	Disabling clock on downlink 4
10:26:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:26:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:26:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:26:20:elinks:INFO:	Disabling clock on downlink 0
10:26:20:elinks:INFO:	Disabling clock on downlink 1
10:26:20:elinks:INFO:	Disabling clock on downlink 2
10:26:20:elinks:INFO:	Disabling clock on downlink 3
10:26:20:elinks:INFO:	Disabling clock on downlink 4
10:26:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:26:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:26:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:26:20:setup_element:INFO:	Scanning clock phase
10:26:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:26:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:26:20:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:26:20:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
10:26:20:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
10:26:20:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:26:20:setup_element:INFO:	Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:26:20:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:26:20:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:26:20:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:26:20:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:26:20:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:26:20:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:26:20:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:26:20:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:26:20:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:26:20:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:26:20:setup_element:INFO:	Eye window for uplink 30: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:26:20:setup_element:INFO:	Eye window for uplink 31: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
10:26:20:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 2
10:26:20:setup_element:INFO:	Scanning data phases
10:26:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:26:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:26:26:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:26:26:setup_element:INFO:	Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
10:26:26:setup_element:INFO:	Eye window for uplink 17: ________________________________XXXXX___
Data delay found: 14
10:26:26:setup_element:INFO:	Eye window for uplink 18: _________________________________XXXXX__
Data delay found: 15
10:26:26:setup_element:INFO:	Eye window for uplink 19: _______________________________XXXXX____
Data delay found: 13
10:26:26:setup_element:INFO:	Eye window for uplink 20: __________________________________XXXXX_
Data delay found: 16
10:26:26:setup_element:INFO:	Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
10:26:26:setup_element:INFO:	Eye window for uplink 22: _________________________________XXXXXX_
Data delay found: 15
10:26:26:setup_element:INFO:	Eye window for uplink 23: ________________________________XXXXX___
Data delay found: 14
10:26:26:setup_element:INFO:	Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
10:26:26:setup_element:INFO:	Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
10:26:26:setup_element:INFO:	Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
10:26:26:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
10:26:26:setup_element:INFO:	Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
10:26:26:setup_element:INFO:	Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
10:26:26:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
10:26:26:setup_element:INFO:	Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
10:26:26:setup_element:INFO:	Setting the data phase to 18 for uplink 16
10:26:26:setup_element:INFO:	Setting the data phase to 14 for uplink 17
10:26:26:setup_element:INFO:	Setting the data phase to 15 for uplink 18
10:26:26:setup_element:INFO:	Setting the data phase to 13 for uplink 19
10:26:26:setup_element:INFO:	Setting the data phase to 16 for uplink 20
10:26:26:setup_element:INFO:	Setting the data phase to 15 for uplink 21
10:26:26:setup_element:INFO:	Setting the data phase to 15 for uplink 22
10:26:26:setup_element:INFO:	Setting the data phase to 14 for uplink 23
10:26:26:setup_element:INFO:	Setting the data phase to 30 for uplink 24
10:26:26:setup_element:INFO:	Setting the data phase to 33 for uplink 25
10:26:26:setup_element:INFO:	Setting the data phase to 28 for uplink 26
10:26:26:setup_element:INFO:	Setting the data phase to 33 for uplink 27
10:26:26:setup_element:INFO:	Setting the data phase to 34 for uplink 28
10:26:26:setup_element:INFO:	Setting the data phase to 35 for uplink 29
10:26:26:setup_element:INFO:	Setting the data phase to 36 for uplink 30
10:26:26:setup_element:INFO:	Setting the data phase to 35 for uplink 31
10:26:26:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 69
    Eye Windows:
      Uplink 16: ________________________________________________________________________________
      Uplink 17: ________________________________________________________________________________
      Uplink 18: ______________________________________________________________________XXXXXXXXX_
      Uplink 19: ______________________________________________________________________XXXXXXXXX_
      Uplink 20: ______________________________________________________________________XXXXXXXXX_
      Uplink 21: ______________________________________________________________________XXXXXXXXX_
      Uplink 22: ______________________________________________________________________XXXXXXXXX_
      Uplink 23: ______________________________________________________________________XXXXXXXXX_
      Uplink 24: _________________________________________________________________________XXXXXXX
      Uplink 25: _________________________________________________________________________XXXXXXX
      Uplink 26: _______________________________________________________________________XXXXXXXX_
      Uplink 27: _______________________________________________________________________XXXXXXXX_
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: X_______________________________________________________________________XXXXXXXX
      Uplink 31: X_______________________________________________________________________XXXXXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 17:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 18:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 19:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 20:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 21:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 22:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 23:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 24:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 30:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
]
10:26:26:setup_element:INFO:	Beginning SMX ASICs map scan
10:26:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:26:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:26:26:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:26:26:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:26:26:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:26:26:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:26:26:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:26:26:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:26:26:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:26:26:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:26:26:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:26:27:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:26:27:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:26:27:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:26:27:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:26:27:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:26:27:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:26:27:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:26:27:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:26:27:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:26:27:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:26:29:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 69
    Eye Windows:
      Uplink 16: ________________________________________________________________________________
      Uplink 17: ________________________________________________________________________________
      Uplink 18: ______________________________________________________________________XXXXXXXXX_
      Uplink 19: ______________________________________________________________________XXXXXXXXX_
      Uplink 20: ______________________________________________________________________XXXXXXXXX_
      Uplink 21: ______________________________________________________________________XXXXXXXXX_
      Uplink 22: ______________________________________________________________________XXXXXXXXX_
      Uplink 23: ______________________________________________________________________XXXXXXXXX_
      Uplink 24: _________________________________________________________________________XXXXXXX
      Uplink 25: _________________________________________________________________________XXXXXXX
      Uplink 26: _______________________________________________________________________XXXXXXXX_
      Uplink 27: _______________________________________________________________________XXXXXXXX_
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: X_______________________________________________________________________XXXXXXXX
      Uplink 31: X_______________________________________________________________________XXXXXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 17:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 18:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 19:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 20:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 21:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 22:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 23:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 24:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 25:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 30:
      Optimal Phase: 36
      Window Length: 34
      Eye Window: ______________XXXXXX____________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________

10:26:29:setup_element:INFO:	Performing Elink synchronization
10:26:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:26:29:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:26:29:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:26:29:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:26:29:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:26:29:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:26:29:ST3_emu:INFO:	Number of chips: 8
10:26:29:ST3_emu:INFO:	Chip address:  	0x0
10:26:29:ST3_emu:INFO:	Chip address:  	0x1
10:26:29:ST3_emu:INFO:	Chip address:  	0x2
10:26:29:ST3_emu:INFO:	Chip address:  	0x3
10:26:29:ST3_emu:INFO:	Chip address:  	0x4
10:26:29:ST3_emu:INFO:	Chip address:  	0x5
10:26:29:ST3_emu:INFO:	Chip address:  	0x6
10:26:29:ST3_emu:INFO:	Chip address:  	0x7
10:26:30:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:26:30:febtest:INFO:	0-0 | XA-000-08-001-064-047-240-04 |  25.1 | 1201.0
10:26:30:febtest:INFO:	0-1 | XA-000-08-001-064-048-080-08 |  28.2 | 1201.0
10:26:30:febtest:INFO:	0-2 | XA-000-08-001-064-048-024-13 |  28.2 | 1201.0
10:26:31:febtest:INFO:	0-3 | XA-000-08-001-064-047-200-13 |  28.2 | 1183.3
10:26:31:febtest:INFO:	0-4 | XA-000-08-001-064-047-224-03 |  47.3 | 1130.0
10:26:31:febtest:INFO:	0-5 | XA-000-08-001-064-047-144-15 |   3.0 | 1259.6
10:26:31:febtest:INFO:	0-6 | XA-000-08-001-064-048-008-10 |  31.4 | 1189.2
10:26:32:febtest:INFO:	0-7 | XA-000-08-001-064-047-184-01 |  34.6 | 1153.7
10:26:32:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:26:35:ST3_smx:INFO:	chip: 0-0 	 28.225000 C 	 1189.190035 mV
10:26:35:ST3_smx:INFO:	# loops 0
10:26:37:ST3_smx:INFO:	# loops 1
10:26:39:ST3_smx:INFO:	# loops 2
10:26:41:ST3_smx:INFO:	# loops 3
10:26:42:ST3_smx:INFO:	# loops 4
10:26:44:ST3_smx:INFO:	Total # of broken channels: 0
10:26:44:ST3_smx:INFO:	List of broken channels: []
10:26:44:ST3_smx:INFO:	Total # of broken channels: 0
10:26:44:ST3_smx:INFO:	List of broken channels: []
10:26:45:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:26:49:ST3_smx:INFO:	chip: 0-1 	 31.389742 C 	 1171.483840 mV
10:26:49:ST3_smx:INFO:	# loops 0
10:26:51:ST3_smx:INFO:	# loops 1
10:26:52:ST3_smx:INFO:	# loops 2
10:26:54:ST3_smx:INFO:	# loops 3
10:26:56:ST3_smx:INFO:	# loops 4
10:26:57:ST3_smx:INFO:	Total # of broken channels: 0
10:26:57:ST3_smx:INFO:	List of broken channels: []
10:26:57:ST3_smx:INFO:	Total # of broken channels: 0
10:26:57:ST3_smx:INFO:	List of broken channels: []
10:26:58:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:27:02:ST3_smx:INFO:	chip: 0-2 	 37.726682 C 	 1153.732915 mV
10:27:02:ST3_smx:INFO:	# loops 0
10:27:04:ST3_smx:INFO:	# loops 1
10:27:05:ST3_smx:INFO:	# loops 2
10:27:07:ST3_smx:INFO:	# loops 3
10:27:09:ST3_smx:INFO:	# loops 4
10:27:10:ST3_smx:INFO:	Total # of broken channels: 0
10:27:10:ST3_smx:INFO:	List of broken channels: []
10:27:10:ST3_smx:INFO:	Total # of broken channels: 0
10:27:10:ST3_smx:INFO:	List of broken channels: []
10:27:11:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:27:15:ST3_smx:INFO:	chip: 0-3 	 21.902970 C 	 1195.082160 mV
10:27:15:ST3_smx:INFO:	# loops 0
10:27:17:ST3_smx:INFO:	# loops 1
10:27:18:ST3_smx:INFO:	# loops 2
10:27:20:ST3_smx:INFO:	# loops 3
10:27:22:ST3_smx:INFO:	# loops 4
10:27:23:ST3_smx:INFO:	Total # of broken channels: 0
10:27:23:ST3_smx:INFO:	List of broken channels: []
10:27:23:ST3_smx:INFO:	Total # of broken channels: 0
10:27:23:ST3_smx:INFO:	List of broken channels: []
10:27:24:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:27:28:ST3_smx:INFO:	chip: 0-4 	 44.073563 C 	 1141.874115 mV
10:27:28:ST3_smx:INFO:	# loops 0
10:27:30:ST3_smx:INFO:	# loops 1
10:27:31:ST3_smx:INFO:	# loops 2
10:27:33:ST3_smx:INFO:	# loops 3
10:27:35:ST3_smx:INFO:	# loops 4
10:27:37:ST3_smx:INFO:	Total # of broken channels: 0
10:27:37:ST3_smx:INFO:	List of broken channels: []
10:27:37:ST3_smx:INFO:	Total # of broken channels: 0
10:27:37:ST3_smx:INFO:	List of broken channels: []
10:27:37:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:27:41:ST3_smx:INFO:	chip: 0-5 	 9.288730 C 	 1236.187875 mV
10:27:41:ST3_smx:INFO:	# loops 0
10:27:43:ST3_smx:INFO:	# loops 1
10:27:45:ST3_smx:INFO:	# loops 2
10:27:46:ST3_smx:INFO:	# loops 3
10:27:48:ST3_smx:INFO:	# loops 4
10:27:50:ST3_smx:INFO:	Total # of broken channels: 0
10:27:50:ST3_smx:INFO:	List of broken channels: []
10:27:50:ST3_smx:INFO:	Total # of broken channels: 0
10:27:50:ST3_smx:INFO:	List of broken channels: []
10:27:50:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:27:54:ST3_smx:INFO:	chip: 0-6 	 37.726682 C 	 1177.390875 mV
10:27:54:ST3_smx:INFO:	# loops 0
10:27:56:ST3_smx:INFO:	# loops 1
10:27:58:ST3_smx:INFO:	# loops 2
10:28:00:ST3_smx:INFO:	# loops 3
10:28:01:ST3_smx:INFO:	# loops 4
10:28:03:ST3_smx:INFO:	Total # of broken channels: 0
10:28:03:ST3_smx:INFO:	List of broken channels: []
10:28:03:ST3_smx:INFO:	Total # of broken channels: 0
10:28:03:ST3_smx:INFO:	List of broken channels: []
10:28:04:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:28:07:ST3_smx:INFO:	chip: 0-7 	 37.726682 C 	 1141.874115 mV
10:28:07:ST3_smx:INFO:	# loops 0
10:28:09:ST3_smx:INFO:	# loops 1
10:28:11:ST3_smx:INFO:	# loops 2
10:28:12:ST3_smx:INFO:	# loops 3
10:28:14:ST3_smx:INFO:	# loops 4
10:28:16:ST3_smx:INFO:	Total # of broken channels: 0
10:28:16:ST3_smx:INFO:	List of broken channels: []
10:28:16:ST3_smx:INFO:	Total # of broken channels: 0
10:28:16:ST3_smx:INFO:	List of broken channels: []
10:28:16:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:28:16:febtest:INFO:	0-0 | XA-000-08-001-064-047-240-04 |  37.7 | 1177.4
10:28:17:febtest:INFO:	0-1 | XA-000-08-001-064-048-080-08 |  37.7 | 1159.7
10:28:17:febtest:INFO:	0-2 | XA-000-08-001-064-048-024-13 |  44.1 | 1147.8
10:28:17:febtest:INFO:	0-3 | XA-000-08-001-064-047-200-13 |  25.1 | 1189.2
10:28:17:febtest:INFO:	0-4 | XA-000-08-001-064-047-224-03 |  47.3 | 1135.9
10:28:18:febtest:INFO:	0-5 | XA-000-08-001-064-047-144-15 |  12.4 | 1230.3
10:28:18:febtest:INFO:	0-6 | XA-000-08-001-064-048-008-10 |  37.7 | 1171.5
10:28:18:febtest:INFO:	0-7 | XA-000-08-001-064-047-184-01 |  37.7 | 1135.9
10:28:40:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2020/TestDate_2023_10_17-10_26_17/