FEB_2022    31.08.23 09:45:05

TextEdit.txt
            09:43:49:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
09:43:50:febtest:INFO:	FEB8.2 selected
09:43:50:febtest:INFO:	FEB8.2 selected
09:44:19:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
09:44:22:ST3_Shared:INFO:	Listo of operators:Kerstin S.; 
09:44:22:ST3_Shared:INFO:	Listo of operators:Kerstin S.; Olga B.; 
09:44:23:ST3_Shared:INFO:	Listo of operators:Kerstin S.; Olga B.; Oleksandr S.; 
09:45:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:45:05:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
09:45:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:45:05:febtest:INFO:	Tsting FEB with SN 2022
09:45:06:smx_tester:INFO:	Scanning setup
09:45:06:elinks:INFO:	Disabling clock on downlink 0
09:45:06:elinks:INFO:	Disabling clock on downlink 1
09:45:06:elinks:INFO:	Disabling clock on downlink 2
09:45:06:elinks:INFO:	Disabling clock on downlink 3
09:45:06:elinks:INFO:	Disabling clock on downlink 4
09:45:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:45:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:45:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:45:06:elinks:INFO:	Disabling clock on downlink 0
09:45:06:elinks:INFO:	Disabling clock on downlink 1
09:45:06:elinks:INFO:	Disabling clock on downlink 2
09:45:06:elinks:INFO:	Disabling clock on downlink 3
09:45:06:elinks:INFO:	Disabling clock on downlink 4
09:45:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:45:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:45:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:45:06:elinks:INFO:	Disabling clock on downlink 0
09:45:06:elinks:INFO:	Disabling clock on downlink 1
09:45:06:elinks:INFO:	Disabling clock on downlink 2
09:45:06:elinks:INFO:	Disabling clock on downlink 3
09:45:06:elinks:INFO:	Disabling clock on downlink 4
09:45:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:45:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:45:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:45:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:45:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:45:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:45:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:45:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:45:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:45:07:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:45:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:45:07:elinks:INFO:	Disabling clock on downlink 0
09:45:07:elinks:INFO:	Disabling clock on downlink 1
09:45:07:elinks:INFO:	Disabling clock on downlink 2
09:45:07:elinks:INFO:	Disabling clock on downlink 3
09:45:07:elinks:INFO:	Disabling clock on downlink 4
09:45:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:45:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:45:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:45:07:elinks:INFO:	Disabling clock on downlink 0
09:45:07:elinks:INFO:	Disabling clock on downlink 1
09:45:07:elinks:INFO:	Disabling clock on downlink 2
09:45:07:elinks:INFO:	Disabling clock on downlink 3
09:45:07:elinks:INFO:	Disabling clock on downlink 4
09:45:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:45:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:45:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:45:07:setup_element:INFO:	Scanning clock phase
09:45:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:45:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:45:07:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:45:07:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:45:07:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____
Clock Delay: 31
09:45:07:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:45:07:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
09:45:07:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:45:07:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
09:45:07:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:45:07:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:45:07:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
09:45:07:setup_element:INFO:	Scanning data phases
09:45:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:45:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:45:13:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:45:13:setup_element:INFO:	Eye window for uplink 24: ___XXXXX________________________________
Data delay found: 25
09:45:13:setup_element:INFO:	Eye window for uplink 25: ______XXXX______________________________
Data delay found: 27
09:45:13:setup_element:INFO:	Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
09:45:13:setup_element:INFO:	Eye window for uplink 27: __________XXXXX_________________________
Data delay found: 32
09:45:13:setup_element:INFO:	Eye window for uplink 28: _________XXXXXX_________________________
Data delay found: 31
09:45:13:setup_element:INFO:	Eye window for uplink 29: __________XXXXXX________________________
Data delay found: 32
09:45:13:setup_element:INFO:	Eye window for uplink 30: ___________XXXXXX_______________________
Data delay found: 33
09:45:13:setup_element:INFO:	Eye window for uplink 31: __________XXXXX_________________________
Data delay found: 32
09:45:13:setup_element:INFO:	Setting the data phase to 25 for uplink 24
09:45:13:setup_element:INFO:	Setting the data phase to 27 for uplink 25
09:45:13:setup_element:INFO:	Setting the data phase to 29 for uplink 26
09:45:13:setup_element:INFO:	Setting the data phase to 32 for uplink 27
09:45:13:setup_element:INFO:	Setting the data phase to 31 for uplink 28
09:45:13:setup_element:INFO:	Setting the data phase to 32 for uplink 29
09:45:13:setup_element:INFO:	Setting the data phase to 33 for uplink 30
09:45:13:setup_element:INFO:	Setting the data phase to 32 for uplink 31
09:45:13:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 69
    Eye Windows:
      Uplink 24: ___________________________________________________________________XXXXXXXXX____
      Uplink 25: ___________________________________________________________________XXXXXXXXX____
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: ____________________________________________________________________XXXXXXX_____
      Uplink 29: ____________________________________________________________________XXXXXXX_____
      Uplink 30: _____________________________________________________________________XXXXXXX____
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 25:
      Optimal Phase: 27
      Window Length: 36
      Eye Window: ______XXXX______________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 29:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 30:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 31:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
]
09:45:13:setup_element:INFO:	Beginning SMX ASICs map scan
09:45:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:45:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:45:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:45:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:45:13:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:45:13:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:45:13:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:45:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:45:14:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:45:14:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:45:14:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:45:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:45:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:45:16:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 69
    Eye Windows:
      Uplink 24: ___________________________________________________________________XXXXXXXXX____
      Uplink 25: ___________________________________________________________________XXXXXXXXX____
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: ____________________________________________________________________XXXXXXX_____
      Uplink 29: ____________________________________________________________________XXXXXXX_____
      Uplink 30: _____________________________________________________________________XXXXXXX____
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 25:
      Optimal Phase: 27
      Window Length: 36
      Eye Window: ______XXXX______________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 29:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 30:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 31:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________

09:45:16:setup_element:INFO:	Performing Elink synchronization
09:45:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:45:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:45:16:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:45:16:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:45:16:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:45:16:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
09:45:16:ST3_emu:INFO:	Number of chips: 4
09:45:16:ST3_emu:INFO:	Chip address:  	0x1
09:45:16:ST3_emu:INFO:	Chip address:  	0x3
09:45:16:ST3_emu:INFO:	Chip address:  	0x5
09:45:16:ST3_emu:INFO:	Chip address:  	0x7
09:45:17:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:45:17:febtest:INFO:	0-1 | XA-000-08-001-064-039-104-05 |  34.6 | 1201.0
09:45:17:febtest:INFO:	0-3 | XA-000-08-001-064-039-072-11 |  47.3 | 1165.6
09:45:17:febtest:INFO:	0-5 | XA-000-08-001-064-039-024-09 |  28.2 | 1212.7
09:45:18:febtest:INFO:	0-7 | XA-000-08-001-064-039-088-12 |  31.4 | 1206.9
09:45:18:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:45:21:ST3_smx:INFO:	chip: 0-1 	 34.556970 C 	 1189.190035 mV
09:45:21:ST3_smx:INFO:	# loops 0
09:45:23:ST3_smx:INFO:	# loops 1
09:45:24:ST3_smx:INFO:	# loops 2
09:45:26:ST3_smx:INFO:	# loops 3
09:45:27:ST3_smx:INFO:	# loops 4
09:45:29:ST3_smx:INFO:	Total # of broken channels: 0
09:45:29:ST3_smx:INFO:	List of broken channels: []
09:45:29:ST3_smx:INFO:	Total # of broken channels: 0
09:45:29:ST3_smx:INFO:	List of broken channels: []
09:45:30:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:45:33:ST3_smx:INFO:	chip: 0-3 	 50.430383 C 	 1135.937260 mV
09:45:33:ST3_smx:INFO:	# loops 0
09:45:35:ST3_smx:INFO:	# loops 1
09:45:37:ST3_smx:INFO:	# loops 2
09:45:38:ST3_smx:INFO:	# loops 3
09:45:40:ST3_smx:INFO:	# loops 4
09:45:41:ST3_smx:INFO:	Total # of broken channels: 0
09:45:41:ST3_smx:INFO:	List of broken channels: []
09:45:41:ST3_smx:INFO:	Total # of broken channels: 0
09:45:41:ST3_smx:INFO:	List of broken channels: []
09:45:42:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:45:45:ST3_smx:INFO:	chip: 0-5 	 40.898880 C 	 1159.654860 mV
09:45:45:ST3_smx:INFO:	# loops 0
09:45:47:ST3_smx:INFO:	# loops 1
09:45:48:ST3_smx:INFO:	# loops 2
09:45:50:ST3_smx:INFO:	# loops 3
09:45:51:ST3_smx:INFO:	# loops 4
09:45:53:ST3_smx:INFO:	Total # of broken channels: 0
09:45:53:ST3_smx:INFO:	List of broken channels: []
09:45:53:ST3_smx:INFO:	Total # of broken channels: 0
09:45:53:ST3_smx:INFO:	List of broken channels: []
09:45:53:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
09:45:57:ST3_smx:INFO:	chip: 0-7 	 40.898880 C 	 1171.483840 mV
09:45:57:ST3_smx:INFO:	# loops 0
09:45:59:ST3_smx:INFO:	# loops 1
09:46:00:ST3_smx:INFO:	# loops 2
09:46:02:ST3_smx:INFO:	# loops 3
09:46:03:ST3_smx:INFO:	# loops 4
09:46:05:ST3_smx:INFO:	Total # of broken channels: 1
09:46:05:ST3_smx:INFO:	List of broken channels: [75]
09:46:05:ST3_smx:INFO:	Total # of broken channels: 0
09:46:05:ST3_smx:INFO:	List of broken channels: []
09:46:05:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:46:05:febtest:INFO:	0-1 | XA-000-08-001-064-039-104-05 |  40.9 | 1183.3
09:46:06:febtest:INFO:	0-3 | XA-000-08-001-064-039-072-11 |  56.8 | 1130.0
09:46:06:febtest:INFO:	0-5 | XA-000-08-001-064-039-024-09 |  44.1 | 1159.7
09:46:06:febtest:INFO:	0-7 | XA-000-08-001-064-039-088-12 |  40.9 | 1165.6
09:46:43:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2022/B//TestDate_2023_08_31-09_45_05/