FEB_2031    06.09.23 14:12:52

TextEdit.txt
            14:11:27:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; Robert V.; 
14:11:57:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
14:12:52:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:12:52:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
14:12:52:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:12:52:febtest:INFO:	Tsting FEB with SN 2031
14:12:53:smx_tester:INFO:	Scanning setup
14:12:53:elinks:INFO:	Disabling clock on downlink 0
14:12:53:elinks:INFO:	Disabling clock on downlink 1
14:12:53:elinks:INFO:	Disabling clock on downlink 2
14:12:53:elinks:INFO:	Disabling clock on downlink 3
14:12:53:elinks:INFO:	Disabling clock on downlink 4
14:12:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:12:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:12:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:12:53:elinks:INFO:	Disabling clock on downlink 0
14:12:53:elinks:INFO:	Disabling clock on downlink 1
14:12:53:elinks:INFO:	Disabling clock on downlink 2
14:12:53:elinks:INFO:	Disabling clock on downlink 3
14:12:53:elinks:INFO:	Disabling clock on downlink 4
14:12:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:12:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:12:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:12:54:elinks:INFO:	Disabling clock on downlink 0
14:12:54:elinks:INFO:	Disabling clock on downlink 1
14:12:54:elinks:INFO:	Disabling clock on downlink 2
14:12:54:elinks:INFO:	Disabling clock on downlink 3
14:12:54:elinks:INFO:	Disabling clock on downlink 4
14:12:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:12:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:12:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:12:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:12:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:12:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:12:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:12:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:12:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:12:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:12:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:12:54:elinks:INFO:	Disabling clock on downlink 0
14:12:54:elinks:INFO:	Disabling clock on downlink 1
14:12:54:elinks:INFO:	Disabling clock on downlink 2
14:12:54:elinks:INFO:	Disabling clock on downlink 3
14:12:54:elinks:INFO:	Disabling clock on downlink 4
14:12:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:12:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:12:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:12:54:elinks:INFO:	Disabling clock on downlink 0
14:12:54:elinks:INFO:	Disabling clock on downlink 1
14:12:54:elinks:INFO:	Disabling clock on downlink 2
14:12:54:elinks:INFO:	Disabling clock on downlink 3
14:12:54:elinks:INFO:	Disabling clock on downlink 4
14:12:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:12:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:12:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:12:54:setup_element:INFO:	Scanning clock phase
14:12:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:12:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:12:54:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:12:54:setup_element:INFO:	Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:12:54:setup_element:INFO:	Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
14:12:54:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:12:54:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:12:54:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:12:54:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:12:54:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:12:54:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:12:54:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
14:12:54:setup_element:INFO:	Scanning data phases
14:12:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:12:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:12:59:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:12:59:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
14:13:00:setup_element:INFO:	Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
14:13:00:setup_element:INFO:	Eye window for uplink 26: _______XXXXXX___________________________
Data delay found: 29
14:13:00:setup_element:INFO:	Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
14:13:00:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
14:13:00:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXXX___________________
Data delay found: 37
14:13:00:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
14:13:00:setup_element:INFO:	Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
14:13:00:setup_element:INFO:	Setting the data phase to 28 for uplink 24
14:13:00:setup_element:INFO:	Setting the data phase to 31 for uplink 25
14:13:00:setup_element:INFO:	Setting the data phase to 29 for uplink 26
14:13:00:setup_element:INFO:	Setting the data phase to 32 for uplink 27
14:13:00:setup_element:INFO:	Setting the data phase to 35 for uplink 28
14:13:00:setup_element:INFO:	Setting the data phase to 37 for uplink 29
14:13:00:setup_element:INFO:	Setting the data phase to 35 for uplink 30
14:13:00:setup_element:INFO:	Setting the data phase to 34 for uplink 31
14:13:00:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 24: ____________________________________________________________________XXXXXXXXX___
      Uplink 25: ____________________________________________________________________XXXXXXXXX___
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: ______________________________________________________________________XXXXXXXX__
      Uplink 29: ______________________________________________________________________XXXXXXXX__
      Uplink 30: _____________________________________________________________________XXXXXXXX___
      Uplink 31: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
]
14:13:00:setup_element:INFO:	Beginning SMX ASICs map scan
14:13:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:13:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:13:00:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:13:00:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:13:00:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:13:00:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:13:00:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:13:00:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:13:00:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:13:01:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:13:01:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:13:01:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:13:01:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:13:02:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 24: ____________________________________________________________________XXXXXXXXX___
      Uplink 25: ____________________________________________________________________XXXXXXXXX___
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: ______________________________________________________________________XXXXXXXX__
      Uplink 29: ______________________________________________________________________XXXXXXXX__
      Uplink 30: _____________________________________________________________________XXXXXXXX___
      Uplink 31: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________

14:13:02:setup_element:INFO:	Performing Elink synchronization
14:13:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:13:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:13:02:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:13:02:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:13:02:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:13:02:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
14:13:03:ST3_emu:INFO:	Number of chips: 4
14:13:03:ST3_emu:INFO:	Chip address:  	0x1
14:13:03:ST3_emu:INFO:	Chip address:  	0x3
14:13:03:ST3_emu:INFO:	Chip address:  	0x5
14:13:03:ST3_emu:INFO:	Chip address:  	0x7
14:13:03:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
14:13:03:febtest:INFO:	0-1 | XA-000-08-002-000-002-238-12 |  12.4 | 1282.9
14:13:03:febtest:INFO:	0-3 | XA-000-08-002-000-002-236-12 |  47.3 | 1165.6
14:13:04:febtest:INFO:	0-5 | XA-000-08-002-000-002-235-12 |  60.0 | 1130.0
14:13:04:febtest:INFO:	0-7 | XA-000-08-002-000-002-241-11 |  50.4 | 1141.9
14:13:04:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:13:07:ST3_smx:INFO:	chip: 0-1 	 28.225000 C 	 1218.600960 mV
14:13:08:ST3_smx:INFO:	# loops 0
14:13:09:ST3_smx:INFO:	# loops 1
14:13:11:ST3_smx:INFO:	# loops 2
14:13:12:ST3_smx:INFO:	# loops 3
14:13:14:ST3_smx:INFO:	# loops 4
14:13:15:ST3_smx:INFO:	Total # of broken channels: 0
14:13:15:ST3_smx:INFO:	List of broken channels: []
14:13:15:ST3_smx:INFO:	Total # of broken channels: 4
14:13:15:ST3_smx:INFO:	List of broken channels: [7, 11, 23, 27]
14:13:16:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:13:20:ST3_smx:INFO:	chip: 0-3 	 44.073563 C 	 1165.571835 mV
14:13:20:ST3_smx:INFO:	# loops 0
14:13:21:ST3_smx:INFO:	# loops 1
14:13:23:ST3_smx:INFO:	# loops 2
14:13:25:ST3_smx:INFO:	# loops 3
14:13:26:ST3_smx:INFO:	# loops 4
14:13:28:ST3_smx:INFO:	Total # of broken channels: 0
14:13:28:ST3_smx:INFO:	List of broken channels: []
14:13:28:ST3_smx:INFO:	Total # of broken channels: 37
14:13:28:ST3_smx:INFO:	List of broken channels: [7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 41, 43, 47, 55, 79, 85, 87, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119]
14:13:28:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:13:32:ST3_smx:INFO:	chip: 0-5 	 50.430383 C 	 1153.732915 mV
14:13:32:ST3_smx:INFO:	# loops 0
14:13:34:ST3_smx:INFO:	# loops 1
14:13:35:ST3_smx:INFO:	# loops 2
14:13:37:ST3_smx:INFO:	# loops 3
14:13:38:ST3_smx:INFO:	# loops 4
14:13:40:ST3_smx:INFO:	Total # of broken channels: 0
14:13:40:ST3_smx:INFO:	List of broken channels: []
14:13:40:ST3_smx:INFO:	Total # of broken channels: 7
14:13:40:ST3_smx:INFO:	List of broken channels: [9, 11, 13, 15, 17, 19, 23]
14:13:40:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:13:44:ST3_smx:INFO:	chip: 0-7 	 47.250730 C 	 1159.654860 mV
14:13:44:ST3_smx:INFO:	# loops 0
14:13:46:ST3_smx:INFO:	# loops 1
14:13:47:ST3_smx:INFO:	# loops 2
14:13:49:ST3_smx:INFO:	# loops 3
14:13:50:ST3_smx:INFO:	# loops 4
14:13:52:ST3_smx:INFO:	Total # of broken channels: 0
14:13:52:ST3_smx:INFO:	List of broken channels: []
14:13:52:ST3_smx:INFO:	Total # of broken channels: 12
14:13:52:ST3_smx:INFO:	List of broken channels: [5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27]
14:13:52:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
14:13:53:febtest:INFO:	0-1 | XA-000-08-002-000-002-238-12 |  34.6 | 1206.9
14:13:53:febtest:INFO:	0-3 | XA-000-08-002-000-002-236-12 |  47.3 | 1159.7
14:13:53:febtest:INFO:	0-5 | XA-000-08-002-000-002-235-12 |  53.6 | 1147.8
14:13:53:febtest:INFO:	0-7 | XA-000-08-002-000-002-241-11 |  47.3 | 1153.7
14:14:06:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2031/B//TestDate_2023_09_06-14_12_52/