
FEB_2031 07.09.23 10:49:57
TextEdit.txt
14:25:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:25:46:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 14:25:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:25:46:febtest:INFO: Tsting FEB with SN 1032 14:25:48:smx_tester:INFO: Scanning setup 14:25:48:elinks:INFO: Disabling clock on downlink 0 14:25:48:elinks:INFO: Disabling clock on downlink 1 14:25:48:elinks:INFO: Disabling clock on downlink 2 14:25:48:elinks:INFO: Disabling clock on downlink 3 14:25:48:elinks:INFO: Disabling clock on downlink 4 14:25:48:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:25:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:25:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:25:48:elinks:INFO: Disabling clock on downlink 0 14:25:48:elinks:INFO: Disabling clock on downlink 1 14:25:48:elinks:INFO: Disabling clock on downlink 2 14:25:48:elinks:INFO: Disabling clock on downlink 3 14:25:48:elinks:INFO: Disabling clock on downlink 4 14:25:48:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:25:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:25:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:25:48:elinks:INFO: Disabling clock on downlink 0 14:25:48:elinks:INFO: Disabling clock on downlink 1 14:25:48:elinks:INFO: Disabling clock on downlink 2 14:25:48:elinks:INFO: Disabling clock on downlink 3 14:25:48:elinks:INFO: Disabling clock on downlink 4 14:25:48:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:25:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:25:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:25:48:elinks:INFO: Disabling clock on downlink 0 14:25:48:elinks:INFO: Disabling clock on downlink 1 14:25:48:elinks:INFO: Disabling clock on downlink 2 14:25:48:elinks:INFO: Disabling clock on downlink 3 14:25:48:elinks:INFO: Disabling clock on downlink 4 14:25:48:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:25:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:25:48:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 24 14:25:48:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 25 14:25:48:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 26 14:25:48:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 27 14:25:48:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 28 14:25:48:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 29 14:25:48:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 30 14:25:48:setup_element:INFO: SOS detected for group 0, downlink 3, uplink 31 14:25:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:25:48:elinks:INFO: Disabling clock on downlink 0 14:25:48:elinks:INFO: Disabling clock on downlink 1 14:25:48:elinks:INFO: Disabling clock on downlink 2 14:25:48:elinks:INFO: Disabling clock on downlink 3 14:25:48:elinks:INFO: Disabling clock on downlink 4 14:25:48:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:25:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:25:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:25:49:setup_element:INFO: Scanning clock phase 14:25:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:25:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 14:25:49:setup_element:INFO: Clock phase scan results for group 0, downlink 3 14:25:49:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 14:25:49:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXXXX____ Clock Delay: 31 14:25:49:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 14:25:49:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXXXXX_____ Clock Delay: 30 14:25:49:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXXX______ Clock Delay: 30 14:25:49:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXXX______ Clock Delay: 30 14:25:49:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 14:25:49:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____ Clock Delay: 30 14:25:49:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 3 14:25:49:setup_element:INFO: Scanning data phases 14:25:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:25:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 14:25:54:setup_element:INFO: Data phase scan results for group 0, downlink 3 14:25:54:setup_element:INFO: Eye window for uplink 24: _XXXXX_________________________________X Data delay found: 22 14:25:54:setup_element:INFO: Eye window for uplink 25: ____XXXX________________________________ Data delay found: 25 14:25:54:setup_element:INFO: Eye window for uplink 26: XXXX__________________________________XX Data delay found: 20 14:25:54:setup_element:INFO: Eye window for uplink 27: ___XXXXX________________________________ Data delay found: 25 14:25:54:setup_element:INFO: Eye window for uplink 28: XXXX___________________________________X Data delay found: 21 14:25:54:setup_element:INFO: Eye window for uplink 29: _XXXXX__________________________________ Data delay found: 23 14:25:54:setup_element:INFO: Eye window for uplink 30: XXXXXX__________________________________ Data delay found: 22 14:25:54:setup_element:INFO: Eye window for uplink 31: XXXX__________________________________XX Data delay found: 20 14:25:54:setup_element:INFO: Setting the data phase to 22 for uplink 24 14:25:54:setup_element:INFO: Setting the data phase to 25 for uplink 25 14:25:54:setup_element:INFO: Setting the data phase to 20 for uplink 26 14:25:54:setup_element:INFO: Setting the data phase to 25 for uplink 27 14:25:54:setup_element:INFO: Setting the data phase to 21 for uplink 28 14:25:54:setup_element:INFO: Setting the data phase to 23 for uplink 29 14:25:54:setup_element:INFO: Setting the data phase to 22 for uplink 30 14:25:54:setup_element:INFO: Setting the data phase to 20 for uplink 31 14:25:54:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 3 Uplinks: [24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 30 Window Length: 70 Eye Windows: Uplink 24: ___________________________________________________________________XXXXXXXXX____ Uplink 25: ___________________________________________________________________XXXXXXXXX____ Uplink 26: __________________________________________________________________XXXXXXXXX_____ Uplink 27: __________________________________________________________________XXXXXXXXX_____ Uplink 28: ___________________________________________________________________XXXXXXX______ Uplink 29: ___________________________________________________________________XXXXXXX______ Uplink 30: ___________________________________________________________________XXXXXXXX_____ Uplink 31: ___________________________________________________________________XXXXXXXX_____ Data phase characteristics: Uplink 24: Optimal Phase: 22 Window Length: 33 Eye Window: _XXXXX_________________________________X Uplink 25: Optimal Phase: 25 Window Length: 36 Eye Window: ____XXXX________________________________ Uplink 26: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 27: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 28: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 29: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 30: Optimal Phase: 22 Window Length: 34 Eye Window: XXXXXX__________________________________ Uplink 31: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX ] 14:25:54:setup_element:INFO: Beginning SMX ASICs map scan 14:25:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:25:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 14:25:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3] 14:25:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3] 14:25:54:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 14:25:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 24 14:25:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 25 14:25:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 26 14:25:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 27 14:25:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 28 14:25:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 29 14:25:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 30 14:25:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 31 14:25:57:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 3 Uplinks: [24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x1: (ASIC uplink, uplink): (0, 24), (1, 25) ASIC address 0x3: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x5: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x7: (ASIC uplink, uplink): (0, 30), (1, 31) Clock Phase Characteristic: Optimal Phase: 30 Window Length: 70 Eye Windows: Uplink 24: ___________________________________________________________________XXXXXXXXX____ Uplink 25: ___________________________________________________________________XXXXXXXXX____ Uplink 26: __________________________________________________________________XXXXXXXXX_____ Uplink 27: __________________________________________________________________XXXXXXXXX_____ Uplink 28: ___________________________________________________________________XXXXXXX______ Uplink 29: ___________________________________________________________________XXXXXXX______ Uplink 30: ___________________________________________________________________XXXXXXXX_____ Uplink 31: ___________________________________________________________________XXXXXXXX_____ Data phase characteristics: Uplink 24: Optimal Phase: 22 Window Length: 33 Eye Window: _XXXXX_________________________________X Uplink 25: Optimal Phase: 25 Window Length: 36 Eye Window: ____XXXX________________________________ Uplink 26: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX Uplink 27: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 28: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 29: Optimal Phase: 23 Window Length: 35 Eye Window: _XXXXX__________________________________ Uplink 30: Optimal Phase: 22 Window Length: 34 Eye Window: XXXXXX__________________________________ Uplink 31: Optimal Phase: 20 Window Length: 34 Eye Window: XXXX__________________________________XX 14:25:57:setup_element:INFO: Performing Elink synchronization 14:25:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:25:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [3] 14:25:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [3] 14:25:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [3] 14:25:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 3 14:25:57:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] 14:25:57:ST3_emu:INFO: Number of chips: 4 14:25:57:ST3_emu:INFO: Chip address: 0x1 14:25:57:ST3_emu:INFO: Chip address: 0x3 14:25:57:ST3_emu:INFO: Chip address: 0x5 14:25:57:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 14:25:58:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 14:25:58:febtest:INFO: 0-1 | XA-000-08-002-000-002-173-09 | 21.9 | 1224.5 14:25:58:febtest:INFO: 0-3 | XA-000-08-002-000-002-174-09 | 34.6 | 1177.4 14:25:58:febtest:INFO: 0-5 | XA-000-08-002-000-002-177-14 | 21.9 | 1224.5 14:25:59:febtest:INFO: 0-7 | XA-000-08-002-000-002-172-09 | 21.9 | 1224.5 14:25:59:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 14:26:02:ST3_smx:INFO: chip: 0-1 12.438562 C 1253.730060 mV 14:26:02:ST3_smx:INFO: # loops 0 14:26:04:ST3_smx:INFO: # loops 1 14:26:06:ST3_smx:INFO: # loops 2 14:26:07:ST3_smx:INFO: # loops 3 14:26:09:ST3_smx:INFO: # loops 4 14:26:11:ST3_smx:INFO: Total # of broken channels: 0 14:26:11:ST3_smx:INFO: List of broken channels: [] 14:26:11:ST3_smx:INFO: Total # of broken channels: 0 14:26:11:ST3_smx:INFO: List of broken channels: [] 14:26:11:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 14:26:15:ST3_smx:INFO: chip: 0-3 28.225000 C 1183.292940 mV 14:26:15:ST3_smx:INFO: # loops 0 14:26:17:ST3_smx:INFO: # loops 1 14:26:18:ST3_smx:INFO: # loops 2 14:26:20:ST3_smx:INFO: # loops 3 14:26:22:ST3_smx:INFO: # loops 4 14:26:23:ST3_smx:INFO: Total # of broken channels: 0 14:26:23:ST3_smx:INFO: List of broken channels: [] 14:26:23:ST3_smx:INFO: Total # of broken channels: 0 14:26:23:ST3_smx:INFO: List of broken channels: [] 14:26:24:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 14:26:28:ST3_smx:INFO: chip: 0-5 25.062742 C 1206.851500 mV 14:26:28:ST3_smx:INFO: # loops 0 14:26:29:ST3_smx:INFO: # loops 1 14:26:31:ST3_smx:INFO: # loops 2 14:26:33:ST3_smx:INFO: # loops 3 14:26:34:ST3_smx:INFO: # loops 4 14:26:36:ST3_smx:INFO: Total # of broken channels: 0 14:26:36:ST3_smx:INFO: List of broken channels: [] 14:26:36:ST3_smx:INFO: Total # of broken channels: 0 14:26:36:ST3_smx:INFO: List of broken channels: [] 14:26:37:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 14:26:41:ST3_smx:INFO: chip: 0-7 25.062742 C 1195.082160 mV 14:26:41:ST3_smx:INFO: # loops 0 14:26:42:ST3_smx:INFO: # loops 1 14:26:44:ST3_smx:INFO: # loops 2 14:26:46:ST3_smx:INFO: # loops 3 14:26:47:ST3_smx:INFO: # loops 4 14:26:49:ST3_smx:INFO: Total # of broken channels: 0 14:26:49:ST3_smx:INFO: List of broken channels: [] 14:26:49:ST3_smx:INFO: Total # of broken channels: 0 14:26:49:ST3_smx:INFO: List of broken channels: [] 14:26:49:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 14:26:50:febtest:INFO: 0-1 | XA-000-08-002-000-002-173-09 | 15.6 | 1242.0 14:26:50:febtest:INFO: 0-3 | XA-000-08-002-000-002-174-09 | 34.6 | 1171.5 14:26:50:febtest:INFO: 0-5 | XA-000-08-002-000-002-177-14 | 28.2 | 1201.0 14:26:50:febtest:INFO: 0-7 | XA-000-08-002-000-002-172-09 | 28.2 | 1189.2 10:47:54:ST3_Shared:INFO: Listo of operators:Oleksandr S.; 10:49:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:49:57:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 10:49:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:49:57:febtest:INFO: Tsting FEB with SN 2031 10:49:59:smx_tester:INFO: Scanning setup 10:49:59:elinks:INFO: Disabling clock on downlink 0 10:49:59:elinks:INFO: Disabling clock on downlink 1 10:49:59:elinks:INFO: Disabling clock on downlink 2 10:49:59:elinks:INFO: Disabling clock on downlink 3 10:49:59:elinks:INFO: Disabling clock on downlink 4 10:49:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:49:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:49:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:49:59:elinks:INFO: Disabling clock on downlink 0 10:49:59:elinks:INFO: Disabling clock on downlink 1 10:49:59:elinks:INFO: Disabling clock on downlink 2 10:49:59:elinks:INFO: Disabling clock on downlink 3 10:49:59:elinks:INFO: Disabling clock on downlink 4 10:49:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:49:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:49:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:49:59:elinks:INFO: Disabling clock on downlink 0 10:49:59:elinks:INFO: Disabling clock on downlink 1 10:49:59:elinks:INFO: Disabling clock on downlink 2 10:49:59:elinks:INFO: Disabling clock on downlink 3 10:49:59:elinks:INFO: Disabling clock on downlink 4 10:49:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:49:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:49:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:49:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:49:59:elinks:INFO: Disabling clock on downlink 0 10:49:59:elinks:INFO: Disabling clock on downlink 1 10:49:59:elinks:INFO: Disabling clock on downlink 2 10:49:59:elinks:INFO: Disabling clock on downlink 3 10:49:59:elinks:INFO: Disabling clock on downlink 4 10:49:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:49:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:49:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:49:59:elinks:INFO: Disabling clock on downlink 0 10:49:59:elinks:INFO: Disabling clock on downlink 1 10:49:59:elinks:INFO: Disabling clock on downlink 2 10:49:59:elinks:INFO: Disabling clock on downlink 3 10:49:59:elinks:INFO: Disabling clock on downlink 4 10:49:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:49:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:49:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:49:59:setup_element:INFO: Scanning clock phase 10:49:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:50:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:50:00:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:50:00:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:50:00:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:50:00:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:50:00:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:50:00:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 10:50:00:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 10:50:00:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:50:00:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 10:50:00:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:50:00:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 10:50:00:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXXXXX Clock Delay: 35 10:50:00:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXXXXX Clock Delay: 35 10:50:00:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXXXX Clock Delay: 35 10:50:00:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXXXX Clock Delay: 35 10:50:00:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXXX Clock Delay: 35 10:50:00:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXXX Clock Delay: 35 10:50:00:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 10:50:00:setup_element:INFO: Scanning data phases 10:50:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:50:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:50:05:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:50:05:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX Data delay found: 19 10:50:05:setup_element:INFO: Eye window for uplink 17: _________________________________XXXX___ Data delay found: 14 10:50:05:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX Data delay found: 19 10:50:05:setup_element:INFO: Eye window for uplink 19: __________________________________XXXXX_ Data delay found: 16 10:50:05:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX Data delay found: 19 10:50:06:setup_element:INFO: Eye window for uplink 21: X___________________________________XXXX Data delay found: 18 10:50:06:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX Data delay found: 17 10:50:06:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__ Data delay found: 15 10:50:06:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________ Data delay found: 26 10:50:06:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________ Data delay found: 29 10:50:06:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________ Data delay found: 29 10:50:06:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________ Data delay found: 32 10:50:06:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________ Data delay found: 34 10:50:06:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________ Data delay found: 36 10:50:06:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________ Data delay found: 37 10:50:06:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________ Data delay found: 36 10:50:06:setup_element:INFO: Setting the data phase to 19 for uplink 16 10:50:06:setup_element:INFO: Setting the data phase to 14 for uplink 17 10:50:06:setup_element:INFO: Setting the data phase to 19 for uplink 18 10:50:06:setup_element:INFO: Setting the data phase to 16 for uplink 19 10:50:06:setup_element:INFO: Setting the data phase to 19 for uplink 20 10:50:06:setup_element:INFO: Setting the data phase to 18 for uplink 21 10:50:06:setup_element:INFO: Setting the data phase to 17 for uplink 22 10:50:06:setup_element:INFO: Setting the data phase to 15 for uplink 23 10:50:06:setup_element:INFO: Setting the data phase to 26 for uplink 24 10:50:06:setup_element:INFO: Setting the data phase to 29 for uplink 25 10:50:06:setup_element:INFO: Setting the data phase to 29 for uplink 26 10:50:06:setup_element:INFO: Setting the data phase to 32 for uplink 27 10:50:06:setup_element:INFO: Setting the data phase to 34 for uplink 28 10:50:06:setup_element:INFO: Setting the data phase to 36 for uplink 29 10:50:06:setup_element:INFO: Setting the data phase to 37 for uplink 30 10:50:06:setup_element:INFO: Setting the data phase to 36 for uplink 31 10:50:06:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXXX_ Uplink 17: _______________________________________________________________________XXXXXXXX_ Uplink 18: _______________________________________________________________________XXXXXXXX_ Uplink 19: _______________________________________________________________________XXXXXXXX_ Uplink 20: _______________________________________________________________________XXXXXXXXX Uplink 21: _______________________________________________________________________XXXXXXXXX Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: ______________________________________________________________________XXXXXXXX__ Uplink 25: ______________________________________________________________________XXXXXXXX__ Uplink 26: ________________________________________________________________________XXXXXXXX Uplink 27: ________________________________________________________________________XXXXXXXX Uplink 28: ________________________________________________________________________XXXXXXXX Uplink 29: ________________________________________________________________________XXXXXXXX Uplink 30: ________________________________________________________________________XXXXXXXX Uplink 31: ________________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 16: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 17: Optimal Phase: 14 Window Length: 36 Eye Window: _________________________________XXXX___ Uplink 18: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 19: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 20: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 21: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 23: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 24: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 25: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 26: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 27: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 28: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 29: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 30: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 31: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ ] 10:50:06:setup_element:INFO: Beginning SMX ASICs map scan 10:50:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:50:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:50:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:50:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:50:06:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:50:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 10:50:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 10:50:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:50:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:50:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 10:50:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 10:50:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:50:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:50:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 10:50:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 10:50:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:50:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:50:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 10:50:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 10:50:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:50:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:50:08:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXXX_ Uplink 17: _______________________________________________________________________XXXXXXXX_ Uplink 18: _______________________________________________________________________XXXXXXXX_ Uplink 19: _______________________________________________________________________XXXXXXXX_ Uplink 20: _______________________________________________________________________XXXXXXXXX Uplink 21: _______________________________________________________________________XXXXXXXXX Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: ______________________________________________________________________XXXXXXXX__ Uplink 25: ______________________________________________________________________XXXXXXXX__ Uplink 26: ________________________________________________________________________XXXXXXXX Uplink 27: ________________________________________________________________________XXXXXXXX Uplink 28: ________________________________________________________________________XXXXXXXX Uplink 29: ________________________________________________________________________XXXXXXXX Uplink 30: ________________________________________________________________________XXXXXXXX Uplink 31: ________________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 16: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 17: Optimal Phase: 14 Window Length: 36 Eye Window: _________________________________XXXX___ Uplink 18: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 19: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 20: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 21: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 23: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 24: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 25: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 26: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 27: Optimal Phase: 32 Window Length: 34 Eye Window: __________XXXXXX________________________ Uplink 28: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 29: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 30: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ Uplink 31: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ 10:50:08:setup_element:INFO: Performing Elink synchronization 10:50:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:50:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:50:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:50:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:50:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:50:08:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 10:50:09:ST3_emu:INFO: Number of chips: 8 10:50:09:ST3_emu:INFO: Chip address: 0x0 10:50:09:ST3_emu:INFO: Chip address: 0x1 10:50:09:ST3_emu:INFO: Chip address: 0x2 10:50:09:ST3_emu:INFO: Chip address: 0x3 10:50:09:ST3_emu:INFO: Chip address: 0x4 10:50:09:ST3_emu:INFO: Chip address: 0x5 10:50:09:ST3_emu:INFO: Chip address: 0x6 10:50:09:ST3_emu:INFO: Chip address: 0x7 10:50:09:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:50:09:febtest:INFO: 0-0 | XA-000-08-002-000-002-244-11 | 25.1 | 1201.0 10:50:09:febtest:INFO: 0-1 | XA-000-08-002-000-002-238-12 | -3.3 | 1300.3 10:50:10:febtest:INFO: 0-2 | XA-000-08-002-000-002-239-12 | 21.9 | 1201.0 10:50:10:febtest:INFO: 0-3 | XA-000-08-002-000-002-236-12 | 28.2 | 1189.2 10:50:10:febtest:INFO: 0-4 | XA-000-08-002-000-002-237-12 | 18.7 | 1212.7 10:50:10:febtest:INFO: 0-5 | XA-000-08-002-000-002-235-12 | 40.9 | 1147.8 10:50:11:febtest:INFO: 0-6 | XA-000-08-002-000-002-246-11 | 37.7 | 1153.7 10:50:11:febtest:INFO: 0-7 | XA-000-08-002-000-002-241-11 | 40.9 | 1141.9 10:50:11:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:50:15:ST3_smx:INFO: chip: 0-0 25.062742 C 1195.082160 mV 10:50:15:ST3_smx:INFO: # loops 0 10:50:16:ST3_smx:INFO: # loops 1 10:50:18:ST3_smx:INFO: # loops 2 10:50:20:ST3_smx:INFO: # loops 3 10:50:21:ST3_smx:INFO: # loops 4 10:50:23:ST3_smx:INFO: Total # of broken channels: 0 10:50:23:ST3_smx:INFO: List of broken channels: [] 10:50:23:ST3_smx:INFO: Total # of broken channels: 0 10:50:23:ST3_smx:INFO: List of broken channels: [] 10:50:24:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:50:28:ST3_smx:INFO: chip: 0-1 12.438562 C 1236.187875 mV 10:50:28:ST3_smx:INFO: # loops 0 10:50:29:ST3_smx:INFO: # loops 1 10:50:31:ST3_smx:INFO: # loops 2 10:50:33:ST3_smx:INFO: # loops 3 10:50:34:ST3_smx:INFO: # loops 4 10:50:36:ST3_smx:INFO: Total # of broken channels: 0 10:50:36:ST3_smx:INFO: List of broken channels: [] 10:50:36:ST3_smx:INFO: Total # of broken channels: 0 10:50:36:ST3_smx:INFO: List of broken channels: [] 10:50:37:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:50:40:ST3_smx:INFO: chip: 0-2 25.062742 C 1183.292940 mV 10:50:40:ST3_smx:INFO: # loops 0 10:50:42:ST3_smx:INFO: # loops 1 10:50:44:ST3_smx:INFO: # loops 2 10:50:46:ST3_smx:INFO: # loops 3 10:50:47:ST3_smx:INFO: # loops 4 10:50:49:ST3_smx:INFO: Total # of broken channels: 1 10:50:49:ST3_smx:INFO: List of broken channels: [1] 10:50:49:ST3_smx:INFO: Total # of broken channels: 1 10:50:49:ST3_smx:INFO: List of broken channels: [1] 10:50:49:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:50:53:ST3_smx:INFO: chip: 0-3 31.389742 C 1177.390875 mV 10:50:53:ST3_smx:INFO: # loops 0 10:50:55:ST3_smx:INFO: # loops 1 10:50:57:ST3_smx:INFO: # loops 2 10:50:58:ST3_smx:INFO: # loops 3 10:51:00:ST3_smx:INFO: # loops 4 10:51:01:ST3_smx:INFO: Total # of broken channels: 0 10:51:01:ST3_smx:INFO: List of broken channels: [] 10:51:01:ST3_smx:INFO: Total # of broken channels: 0 10:51:01:ST3_smx:INFO: List of broken channels: [] 10:51:02:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:51:05:ST3_smx:INFO: chip: 0-4 31.389742 C 1153.732915 mV 10:51:05:ST3_smx:INFO: # loops 0 10:51:07:ST3_smx:INFO: # loops 1 10:51:09:ST3_smx:INFO: # loops 2 10:51:10:ST3_smx:INFO: # loops 3 10:51:12:ST3_smx:INFO: # loops 4 10:51:13:ST3_smx:INFO: Total # of broken channels: 0 10:51:13:ST3_smx:INFO: List of broken channels: [] 10:51:13:ST3_smx:INFO: Total # of broken channels: 0 10:51:13:ST3_smx:INFO: List of broken channels: [] 10:51:14:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:51:17:ST3_smx:INFO: chip: 0-5 34.556970 C 1165.571835 mV 10:51:17:ST3_smx:INFO: # loops 0 10:51:19:ST3_smx:INFO: # loops 1 10:51:20:ST3_smx:INFO: # loops 2 10:51:22:ST3_smx:INFO: # loops 3 10:51:24:ST3_smx:INFO: # loops 4 10:51:25:ST3_smx:INFO: Total # of broken channels: 0 10:51:25:ST3_smx:INFO: List of broken channels: [] 10:51:25:ST3_smx:INFO: Total # of broken channels: 0 10:51:25:ST3_smx:INFO: List of broken channels: [] 10:51:26:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:51:29:ST3_smx:INFO: chip: 0-6 37.726682 C 1147.806000 mV 10:51:29:ST3_smx:INFO: # loops 0 10:51:31:ST3_smx:INFO: # loops 1 10:51:33:ST3_smx:INFO: # loops 2 10:51:34:ST3_smx:INFO: # loops 3 10:51:36:ST3_smx:INFO: # loops 4 10:51:37:ST3_smx:INFO: Total # of broken channels: 0 10:51:37:ST3_smx:INFO: List of broken channels: [] 10:51:37:ST3_smx:INFO: Total # of broken channels: 0 10:51:37:ST3_smx:INFO: List of broken channels: [] 10:51:38:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 10:51:41:ST3_smx:INFO: chip: 0-7 37.726682 C 1147.806000 mV 10:51:41:ST3_smx:INFO: # loops 0 10:51:43:ST3_smx:INFO: # loops 1 10:51:45:ST3_smx:INFO: # loops 2 10:51:46:ST3_smx:INFO: # loops 3 10:51:48:ST3_smx:INFO: # loops 4 10:51:49:ST3_smx:INFO: Total # of broken channels: 0 10:51:49:ST3_smx:INFO: List of broken channels: [] 10:51:49:ST3_smx:INFO: Total # of broken channels: 0 10:51:49:ST3_smx:INFO: List of broken channels: [] 10:51:50:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 10:51:50:febtest:INFO: 0-0 | XA-000-08-002-000-002-244-11 | 31.4 | 1183.3 10:51:50:febtest:INFO: 0-1 | XA-000-08-002-000-002-238-12 | 18.7 | 1224.5 10:51:51:febtest:INFO: 0-2 | XA-000-08-002-000-002-239-12 | 31.4 | 1177.4 10:51:51:febtest:INFO: 0-3 | XA-000-08-002-000-002-236-12 | 34.6 | 1171.5 10:51:51:febtest:INFO: 0-4 | XA-000-08-002-000-002-237-12 | 34.6 | 1153.7 10:51:51:febtest:INFO: 0-5 | XA-000-08-002-000-002-235-12 | 37.7 | 1159.7 10:51:52:febtest:INFO: 0-6 | XA-000-08-002-000-002-246-11 | 37.7 | 1147.8 10:51:52:febtest:INFO: 0-7 | XA-000-08-002-000-002-241-11 | 37.7 | 1147.8 10:52:02:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2031/B//TestDate_2023_09_07-10_49_57/