10:24:55:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:24:56:febtest:INFO:	FEB8.2 selected
10:24:56:febtest:INFO:	FEB8.2 selected
10:25:03:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
10:26:56:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:28:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:28:58:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:28:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:28:58:febtest:INFO:	Tsting FEB with SN 2023
10:28:59:smx_tester:INFO:	Scanning setup
10:28:59:elinks:INFO:	Disabling clock on downlink 0
10:28:59:elinks:INFO:	Disabling clock on downlink 1
10:28:59:elinks:INFO:	Disabling clock on downlink 2
10:28:59:elinks:INFO:	Disabling clock on downlink 3
10:28:59:elinks:INFO:	Disabling clock on downlink 4
10:28:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:28:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:28:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:28:59:elinks:INFO:	Disabling clock on downlink 0
10:28:59:elinks:INFO:	Disabling clock on downlink 1
10:28:59:elinks:INFO:	Disabling clock on downlink 2
10:28:59:elinks:INFO:	Disabling clock on downlink 3
10:28:59:elinks:INFO:	Disabling clock on downlink 4
10:28:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:28:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:28:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:28:59:elinks:INFO:	Disabling clock on downlink 0
10:28:59:elinks:INFO:	Disabling clock on downlink 1
10:28:59:elinks:INFO:	Disabling clock on downlink 2
10:28:59:elinks:INFO:	Disabling clock on downlink 3
10:28:59:elinks:INFO:	Disabling clock on downlink 4
10:29:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:29:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:29:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:29:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:29:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:29:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:29:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:29:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:29:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:29:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:29:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:29:00:elinks:INFO:	Disabling clock on downlink 0
10:29:00:elinks:INFO:	Disabling clock on downlink 1
10:29:00:elinks:INFO:	Disabling clock on downlink 2
10:29:00:elinks:INFO:	Disabling clock on downlink 3
10:29:00:elinks:INFO:	Disabling clock on downlink 4
10:29:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:29:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:29:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:29:00:elinks:INFO:	Disabling clock on downlink 0
10:29:00:elinks:INFO:	Disabling clock on downlink 1
10:29:00:elinks:INFO:	Disabling clock on downlink 2
10:29:00:elinks:INFO:	Disabling clock on downlink 3
10:29:00:elinks:INFO:	Disabling clock on downlink 4
10:29:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:29:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:29:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:29:00:setup_element:INFO:	Scanning clock phase
10:29:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:29:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:29:00:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:29:00:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:29:00:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:29:00:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
10:29:00:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
10:29:00:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:29:00:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:29:00:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:29:00:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:29:00:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
10:29:00:setup_element:INFO:	Scanning data phases
10:29:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:29:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:29:06:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:29:06:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
10:29:06:setup_element:INFO:	Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
10:29:06:setup_element:INFO:	Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
10:29:06:setup_element:INFO:	Eye window for uplink 27: _________XXXXXX_________________________
Data delay found: 31
10:29:06:setup_element:INFO:	Eye window for uplink 28: __________XXXXXX________________________
Data delay found: 32
10:29:06:setup_element:INFO:	Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
10:29:06:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
10:29:06:setup_element:INFO:	Eye window for uplink 31: ____________XXXXXX______________________
Data delay found: 34
10:29:06:setup_element:INFO:	Setting the data phase to 28 for uplink 24
10:29:06:setup_element:INFO:	Setting the data phase to 30 for uplink 25
10:29:06:setup_element:INFO:	Setting the data phase to 29 for uplink 26
10:29:06:setup_element:INFO:	Setting the data phase to 31 for uplink 27
10:29:06:setup_element:INFO:	Setting the data phase to 32 for uplink 28
10:29:06:setup_element:INFO:	Setting the data phase to 34 for uplink 29
10:29:06:setup_element:INFO:	Setting the data phase to 37 for uplink 30
10:29:06:setup_element:INFO:	Setting the data phase to 34 for uplink 31
10:29:06:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 71
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXXX__
      Uplink 25: _____________________________________________________________________XXXXXXXXX__
      Uplink 26: ________________________________________________________________________________
      Uplink 27: ________________________________________________________________________________
      Uplink 28: ______________________________________________________________________XXXXXXX___
      Uplink 29: ______________________________________________________________________XXXXXXX___
      Uplink 30: _______________________________________________________________________XXXXXXX__
      Uplink 31: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 28:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 29:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
]
10:29:06:setup_element:INFO:	Beginning SMX ASICs map scan
10:29:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:29:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:29:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:29:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:29:06:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:29:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:29:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:29:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:29:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:29:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:29:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:29:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:29:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:29:08:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 71
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXXX__
      Uplink 25: _____________________________________________________________________XXXXXXXXX__
      Uplink 26: ________________________________________________________________________________
      Uplink 27: ________________________________________________________________________________
      Uplink 28: ______________________________________________________________________XXXXXXX___
      Uplink 29: ______________________________________________________________________XXXXXXX___
      Uplink 30: _______________________________________________________________________XXXXXXX__
      Uplink 31: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 28:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 29:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________

10:29:08:setup_element:INFO:	Performing Elink synchronization
10:29:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:29:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:29:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:29:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:29:08:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:29:08:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
10:29:08:ST3_emu:INFO:	Number of chips: 4
10:29:08:ST3_emu:INFO:	Chip address:  	0x1
10:29:08:ST3_emu:INFO:	Chip address:  	0x3
10:29:08:ST3_emu:INFO:	Chip address:  	0x5
10:29:08:ST3_emu:INFO:	Chip address:  	0x7
10:29:09:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:29:10:febtest:INFO:	0-1 | XA-000-08-002-000-001-030-04 |  28.2 | 1206.9
10:29:10:febtest:INFO:	0-3 | XA-000-08-002-000-001-033-13 |  47.3 | 1130.0
10:29:10:febtest:INFO:	0-5 | XA-000-08-002-000-001-031-04 |  44.1 | 1153.7
10:29:10:febtest:INFO:	0-7 | XA-000-08-002-000-001-032-13 |  31.4 | 1206.9
10:29:10:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:29:14:ST3_smx:INFO:	chip: 0-1 	 40.898880 C 	 1147.806000 mV
10:29:14:ST3_smx:INFO:	# loops 0
10:29:16:ST3_smx:INFO:	# loops 1
10:29:17:ST3_smx:INFO:	# loops 2
10:29:19:ST3_smx:INFO:	# loops 3
10:29:21:ST3_smx:INFO:	# loops 4
10:29:22:ST3_smx:INFO:	Total # of broken channels: 0
10:29:22:ST3_smx:INFO:	List of broken channels: []
10:29:22:ST3_smx:INFO:	Total # of broken channels: 0
10:29:22:ST3_smx:INFO:	List of broken channels: []
10:29:23:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:29:27:ST3_smx:INFO:	chip: 0-3 	 47.250730 C 	 1124.048640 mV
10:29:27:ST3_smx:INFO:	# loops 0
10:29:29:ST3_smx:INFO:	# loops 1
10:29:30:ST3_smx:INFO:	# loops 2
10:29:32:ST3_smx:INFO:	# loops 3
10:29:34:ST3_smx:INFO:	# loops 4
10:29:35:ST3_smx:INFO:	Total # of broken channels: 0
10:29:35:ST3_smx:INFO:	List of broken channels: []
10:29:35:ST3_smx:INFO:	Total # of broken channels: 0
10:29:35:ST3_smx:INFO:	List of broken channels: []
10:29:36:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:29:40:ST3_smx:INFO:	chip: 0-5 	 50.430383 C 	 1118.096875 mV
10:29:40:ST3_smx:INFO:	# loops 0
10:29:41:ST3_smx:INFO:	# loops 1
10:29:43:ST3_smx:INFO:	# loops 2
10:29:45:ST3_smx:INFO:	# loops 3
10:29:46:ST3_smx:INFO:	# loops 4
10:29:48:ST3_smx:INFO:	Total # of broken channels: 0
10:29:48:ST3_smx:INFO:	List of broken channels: []
10:29:48:ST3_smx:INFO:	Total # of broken channels: 0
10:29:48:ST3_smx:INFO:	List of broken channels: []
10:29:49:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:29:52:ST3_smx:INFO:	chip: 0-7 	 37.726682 C 	 1159.654860 mV
10:29:52:ST3_smx:INFO:	# loops 0
10:29:54:ST3_smx:INFO:	# loops 1
10:29:56:ST3_smx:INFO:	# loops 2
10:29:57:ST3_smx:INFO:	# loops 3
10:29:59:ST3_smx:INFO:	# loops 4
10:30:01:ST3_smx:INFO:	Total # of broken channels: 0
10:30:01:ST3_smx:INFO:	List of broken channels: []
10:30:01:ST3_smx:INFO:	Total # of broken channels: 0
10:30:01:ST3_smx:INFO:	List of broken channels: []
10:30:01:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:30:02:febtest:INFO:	0-1 | XA-000-08-002-000-001-030-04 |  44.1 | 1141.9
10:30:02:febtest:INFO:	0-3 | XA-000-08-002-000-001-033-13 |  50.4 | 1118.1
10:30:02:febtest:INFO:	0-5 | XA-000-08-002-000-001-031-04 |  50.4 | 1112.1
10:30:02:febtest:INFO:	0-7 | XA-000-08-002-000-001-032-13 |  40.9 | 1159.7
10:32:02:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:02:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:32:02:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:32:02:febtest:INFO:	Tsting FEB with SN 2033
10:32:03:smx_tester:INFO:	Scanning setup
10:32:03:elinks:INFO:	Disabling clock on downlink 0
10:32:03:elinks:INFO:	Disabling clock on downlink 1
10:32:03:elinks:INFO:	Disabling clock on downlink 2
10:32:03:elinks:INFO:	Disabling clock on downlink 3
10:32:03:elinks:INFO:	Disabling clock on downlink 4
10:32:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:32:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:32:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:32:03:elinks:INFO:	Disabling clock on downlink 0
10:32:03:elinks:INFO:	Disabling clock on downlink 1
10:32:03:elinks:INFO:	Disabling clock on downlink 2
10:32:03:elinks:INFO:	Disabling clock on downlink 3
10:32:03:elinks:INFO:	Disabling clock on downlink 4
10:32:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:32:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:32:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:32:04:elinks:INFO:	Disabling clock on downlink 0
10:32:04:elinks:INFO:	Disabling clock on downlink 1
10:32:04:elinks:INFO:	Disabling clock on downlink 2
10:32:04:elinks:INFO:	Disabling clock on downlink 3
10:32:04:elinks:INFO:	Disabling clock on downlink 4
10:32:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:32:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:32:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:32:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:32:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:32:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:32:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:32:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:32:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:32:04:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:32:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:32:04:elinks:INFO:	Disabling clock on downlink 0
10:32:04:elinks:INFO:	Disabling clock on downlink 1
10:32:04:elinks:INFO:	Disabling clock on downlink 2
10:32:04:elinks:INFO:	Disabling clock on downlink 3
10:32:04:elinks:INFO:	Disabling clock on downlink 4
10:32:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:32:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:32:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:32:04:elinks:INFO:	Disabling clock on downlink 0
10:32:04:elinks:INFO:	Disabling clock on downlink 1
10:32:04:elinks:INFO:	Disabling clock on downlink 2
10:32:04:elinks:INFO:	Disabling clock on downlink 3
10:32:04:elinks:INFO:	Disabling clock on downlink 4
10:32:04:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:32:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:32:04:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:32:04:setup_element:INFO:	Scanning clock phase
10:32:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:32:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:32:04:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:32:04:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:32:04:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:32:04:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:32:04:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:32:04:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:32:04:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:32:04:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:32:04:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:32:04:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
10:32:04:setup_element:INFO:	Scanning data phases
10:32:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:32:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:32:10:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:32:10:setup_element:INFO:	Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
10:32:10:setup_element:INFO:	Eye window for uplink 25: ________XXXX____________________________
Data delay found: 29
10:32:10:setup_element:INFO:	Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
10:32:10:setup_element:INFO:	Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
10:32:10:setup_element:INFO:	Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
10:32:10:setup_element:INFO:	Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
10:32:10:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
10:32:10:setup_element:INFO:	Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
10:32:10:setup_element:INFO:	Setting the data phase to 27 for uplink 24
10:32:10:setup_element:INFO:	Setting the data phase to 29 for uplink 25
10:32:10:setup_element:INFO:	Setting the data phase to 28 for uplink 26
10:32:10:setup_element:INFO:	Setting the data phase to 31 for uplink 27
10:32:10:setup_element:INFO:	Setting the data phase to 33 for uplink 28
10:32:10:setup_element:INFO:	Setting the data phase to 35 for uplink 29
10:32:10:setup_element:INFO:	Setting the data phase to 35 for uplink 30
10:32:10:setup_element:INFO:	Setting the data phase to 34 for uplink 31
10:32:10:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 72
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: _____________________________________________________________________XXXXXXXX___
      Uplink 27: _____________________________________________________________________XXXXXXXX___
      Uplink 28: _____________________________________________________________________XXXXXXX____
      Uplink 29: _____________________________________________________________________XXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXXX____
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
]
10:32:10:setup_element:INFO:	Beginning SMX ASICs map scan
10:32:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:32:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:32:10:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:32:10:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:32:10:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:32:10:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:32:10:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:32:10:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:32:10:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:32:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:32:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:32:11:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:32:11:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:32:12:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 72
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: _____________________________________________________________________XXXXXXXX___
      Uplink 27: _____________________________________________________________________XXXXXXXX___
      Uplink 28: _____________________________________________________________________XXXXXXX____
      Uplink 29: _____________________________________________________________________XXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXXX____
      Uplink 31: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________

10:32:12:setup_element:INFO:	Performing Elink synchronization
10:32:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:32:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:32:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:32:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:32:13:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:32:13:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
10:32:13:ST3_emu:INFO:	Number of chips: 4
10:32:13:ST3_emu:INFO:	Chip address:  	0x1
10:32:13:ST3_emu:INFO:	Chip address:  	0x3
10:32:13:ST3_emu:INFO:	Chip address:  	0x5
10:32:13:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
10:32:13:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:32:13:febtest:INFO:	0-1 | XA-000-08-002-000-002-021-10 |  37.7 | 1183.3
10:32:14:febtest:INFO:	0-3 | XA-000-08-002-000-002-019-10 |  47.3 | 1147.8
10:32:14:febtest:INFO:	0-5 | XA-000-08-002-000-001-017-04 |  47.3 | 1153.7
10:32:14:febtest:INFO:	0-7 | XA-000-08-002-000-001-016-04 |  56.8 | 1106.2
10:32:14:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:32:18:ST3_smx:INFO:	chip: 0-1 	 37.726682 C 	 1171.483840 mV
10:32:18:ST3_smx:INFO:	# loops 0
10:32:20:ST3_smx:INFO:	# loops 1
10:32:21:ST3_smx:INFO:	# loops 2
10:32:23:ST3_smx:INFO:	# loops 3
10:32:24:ST3_smx:INFO:	# loops 4
10:32:26:ST3_smx:INFO:	Total # of broken channels: 0
10:32:26:ST3_smx:INFO:	List of broken channels: []
10:32:26:ST3_smx:INFO:	Total # of broken channels: 1
10:32:26:ST3_smx:INFO:	List of broken channels: [15]
10:32:26:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:32:30:ST3_smx:INFO:	chip: 0-3 	 47.250730 C 	 1129.995435 mV
10:32:30:ST3_smx:INFO:	# loops 0
10:32:32:ST3_smx:INFO:	# loops 1
10:32:34:ST3_smx:INFO:	# loops 2
10:32:35:ST3_smx:INFO:	# loops 3
10:32:37:ST3_smx:INFO:	# loops 4
10:32:39:ST3_smx:INFO:	Total # of broken channels: 1
10:32:39:ST3_smx:INFO:	List of broken channels: [113]
10:32:39:ST3_smx:INFO:	Total # of broken channels: 1
10:32:39:ST3_smx:INFO:	List of broken channels: [113]
10:32:39:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:32:43:ST3_smx:INFO:	chip: 0-5 	 40.898880 C 	 1153.732915 mV
10:32:43:ST3_smx:INFO:	# loops 0
10:32:45:ST3_smx:INFO:	# loops 1
10:32:46:ST3_smx:INFO:	# loops 2
10:32:48:ST3_smx:INFO:	# loops 3
10:32:50:ST3_smx:INFO:	# loops 4
10:32:51:ST3_smx:INFO:	Total # of broken channels: 0
10:32:51:ST3_smx:INFO:	List of broken channels: []
10:32:52:ST3_smx:INFO:	Total # of broken channels: 0
10:32:52:ST3_smx:INFO:	List of broken channels: []
10:32:52:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:32:56:ST3_smx:INFO:	chip: 0-7 	 53.612520 C 	 1106.178435 mV
10:32:56:ST3_smx:INFO:	# loops 0
10:32:57:ST3_smx:INFO:	# loops 1
10:32:59:ST3_smx:INFO:	# loops 2
10:33:01:ST3_smx:INFO:	# loops 3
10:33:02:ST3_smx:INFO:	# loops 4
10:33:04:ST3_smx:INFO:	Total # of broken channels: 0
10:33:04:ST3_smx:INFO:	List of broken channels: []
10:33:04:ST3_smx:INFO:	Total # of broken channels: 0
10:33:04:ST3_smx:INFO:	List of broken channels: []
10:33:04:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:33:05:febtest:INFO:	0-1 | XA-000-08-002-000-002-021-10 |  40.9 | 1159.7
10:33:05:febtest:INFO:	0-3 | XA-000-08-002-000-002-019-10 |  50.4 | 1124.0
10:33:05:febtest:INFO:	0-5 | XA-000-08-002-000-001-017-04 |  44.1 | 1147.8
10:33:05:febtest:INFO:	0-7 | XA-000-08-002-000-001-016-04 |  53.6 | 1100.2
10:33:23:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2033/B//TestDate_2023_09_15-10_32_02/