FEB_2036    02.11.23 14:03:29

TextEdit.txt
            14:03:03:ST3_hmp4040:INFO:	
14:03:04:febtest:INFO:	FEB8.2 selected
14:03:04:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
14:03:05:ST3_Shared:INFO:	Listo of operators:Robert V.; 
14:03:07:ST3_Shared:INFO:	Listo of operators:Robert V.; Irakli K.; 
14:03:21:febtest:INFO:	FEB 8-2 B @ GSI
14:03:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:03:29:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
14:03:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:03:29:febtest:INFO:	Tsting FEB with SN 2036
14:03:30:smx_tester:INFO:	Scanning setup
14:03:30:elinks:INFO:	Disabling clock on downlink 0
14:03:30:elinks:INFO:	Disabling clock on downlink 1
14:03:30:elinks:INFO:	Disabling clock on downlink 2
14:03:30:elinks:INFO:	Disabling clock on downlink 3
14:03:30:elinks:INFO:	Disabling clock on downlink 4
14:03:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:03:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:03:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:03:30:elinks:INFO:	Disabling clock on downlink 0
14:03:30:elinks:INFO:	Disabling clock on downlink 1
14:03:30:elinks:INFO:	Disabling clock on downlink 2
14:03:30:elinks:INFO:	Disabling clock on downlink 3
14:03:30:elinks:INFO:	Disabling clock on downlink 4
14:03:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:03:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:03:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:03:30:elinks:INFO:	Disabling clock on downlink 0
14:03:30:elinks:INFO:	Disabling clock on downlink 1
14:03:30:elinks:INFO:	Disabling clock on downlink 2
14:03:30:elinks:INFO:	Disabling clock on downlink 3
14:03:30:elinks:INFO:	Disabling clock on downlink 4
14:03:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:03:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:03:31:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:03:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:03:31:elinks:INFO:	Disabling clock on downlink 0
14:03:31:elinks:INFO:	Disabling clock on downlink 1
14:03:31:elinks:INFO:	Disabling clock on downlink 2
14:03:31:elinks:INFO:	Disabling clock on downlink 3
14:03:31:elinks:INFO:	Disabling clock on downlink 4
14:03:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:03:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:03:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:03:31:elinks:INFO:	Disabling clock on downlink 0
14:03:31:elinks:INFO:	Disabling clock on downlink 1
14:03:31:elinks:INFO:	Disabling clock on downlink 2
14:03:31:elinks:INFO:	Disabling clock on downlink 3
14:03:31:elinks:INFO:	Disabling clock on downlink 4
14:03:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:03:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:03:31:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:03:31:setup_element:INFO:	Scanning clock phase
14:03:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:03:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:03:31:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:03:31:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:03:31:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
14:03:31:setup_element:INFO:	Eye window for uplink 18: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:03:31:setup_element:INFO:	Eye window for uplink 19: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
14:03:31:setup_element:INFO:	Eye window for uplink 20: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:03:31:setup_element:INFO:	Eye window for uplink 21: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:03:31:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:03:31:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:03:31:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:03:31:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:03:31:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:03:31:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:03:31:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:03:31:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:03:31:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:03:31:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:03:31:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
14:03:31:setup_element:INFO:	Scanning data phases
14:03:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:03:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:03:37:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:03:37:setup_element:INFO:	Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
14:03:37:setup_element:INFO:	Eye window for uplink 17: ________________________________XXXX____
Data delay found: 13
14:03:37:setup_element:INFO:	Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
14:03:37:setup_element:INFO:	Eye window for uplink 19: _______________________________XXXXX____
Data delay found: 13
14:03:37:setup_element:INFO:	Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
14:03:37:setup_element:INFO:	Eye window for uplink 21: ________________________________XXXXXX__
Data delay found: 14
14:03:37:setup_element:INFO:	Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
14:03:37:setup_element:INFO:	Eye window for uplink 23: X__________________________________XXXXX
Data delay found: 17
14:03:37:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
14:03:37:setup_element:INFO:	Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
14:03:37:setup_element:INFO:	Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
14:03:37:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
14:03:37:setup_element:INFO:	Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
14:03:37:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
14:03:37:setup_element:INFO:	Eye window for uplink 30: _________________XXXXX__________________
Data delay found: 39
14:03:37:setup_element:INFO:	Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
14:03:37:setup_element:INFO:	Setting the data phase to 18 for uplink 16
14:03:37:setup_element:INFO:	Setting the data phase to 13 for uplink 17
14:03:37:setup_element:INFO:	Setting the data phase to 16 for uplink 18
14:03:37:setup_element:INFO:	Setting the data phase to 13 for uplink 19
14:03:37:setup_element:INFO:	Setting the data phase to 15 for uplink 20
14:03:37:setup_element:INFO:	Setting the data phase to 14 for uplink 21
14:03:37:setup_element:INFO:	Setting the data phase to 19 for uplink 22
14:03:37:setup_element:INFO:	Setting the data phase to 17 for uplink 23
14:03:37:setup_element:INFO:	Setting the data phase to 28 for uplink 24
14:03:37:setup_element:INFO:	Setting the data phase to 30 for uplink 25
14:03:37:setup_element:INFO:	Setting the data phase to 29 for uplink 26
14:03:37:setup_element:INFO:	Setting the data phase to 33 for uplink 27
14:03:37:setup_element:INFO:	Setting the data phase to 36 for uplink 28
14:03:37:setup_element:INFO:	Setting the data phase to 37 for uplink 29
14:03:37:setup_element:INFO:	Setting the data phase to 39 for uplink 30
14:03:37:setup_element:INFO:	Setting the data phase to 38 for uplink 31
14:03:37:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXXXX__
      Uplink 17: ______________________________________________________________________XXXXXXXX__
      Uplink 18: _____________________________________________________________________XXXXXXXXX__
      Uplink 19: _____________________________________________________________________XXXXXXXXX__
      Uplink 20: _____________________________________________________________________XXXXXXXX___
      Uplink 21: _____________________________________________________________________XXXXXXXX___
      Uplink 22: ______________________________________________________________________XXXXXXXXX_
      Uplink 23: ______________________________________________________________________XXXXXXXXX_
      Uplink 24: _______________________________________________________________________XXXXXXX__
      Uplink 25: _______________________________________________________________________XXXXXXX__
      Uplink 26: _______________________________________________________________________XXXXXXX__
      Uplink 27: _______________________________________________________________________XXXXXXX__
      Uplink 28: ________________________________________________________________________XXXXXXX_
      Uplink 29: ________________________________________________________________________XXXXXXX_
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 17:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 18:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 19:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 20:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 21:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 22:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 23:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 31:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
]
14:03:37:setup_element:INFO:	Beginning SMX ASICs map scan
14:03:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:03:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:03:37:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:03:37:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:03:37:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:03:37:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:03:37:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:03:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:03:37:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:03:37:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:03:37:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:03:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:03:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:03:38:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:03:38:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:03:38:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:03:38:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:03:38:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:03:38:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:03:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:03:38:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:03:40:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXXXX__
      Uplink 17: ______________________________________________________________________XXXXXXXX__
      Uplink 18: _____________________________________________________________________XXXXXXXXX__
      Uplink 19: _____________________________________________________________________XXXXXXXXX__
      Uplink 20: _____________________________________________________________________XXXXXXXX___
      Uplink 21: _____________________________________________________________________XXXXXXXX___
      Uplink 22: ______________________________________________________________________XXXXXXXXX_
      Uplink 23: ______________________________________________________________________XXXXXXXXX_
      Uplink 24: _______________________________________________________________________XXXXXXX__
      Uplink 25: _______________________________________________________________________XXXXXXX__
      Uplink 26: _______________________________________________________________________XXXXXXX__
      Uplink 27: _______________________________________________________________________XXXXXXX__
      Uplink 28: ________________________________________________________________________XXXXXXX_
      Uplink 29: ________________________________________________________________________XXXXXXX_
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 17:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 18:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 19:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 20:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 21:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 22:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 23:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 31:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________

14:03:40:setup_element:INFO:	Performing Elink synchronization
14:03:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:03:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:03:40:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:03:40:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:03:40:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:03:40:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:03:40:ST3_emu:INFO:	Number of chips: 8
14:03:40:ST3_emu:INFO:	Chip address:  	0x0
14:03:40:ST3_emu:INFO:	Chip address:  	0x1
14:03:40:ST3_emu:INFO:	Chip address:  	0x2
14:03:40:ST3_emu:INFO:	Chip address:  	0x3
14:03:40:ST3_emu:INFO:	Chip address:  	0x4
14:03:40:ST3_emu:INFO:	Chip address:  	0x5
14:03:40:ST3_emu:INFO:	Chip address:  	0x6
14:03:40:ST3_emu:INFO:	Chip address:  	0x7
14:03:41:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
14:03:41:febtest:INFO:	0-0 | XA-000-08-002-000-000-052-07 |  40.9 | 1147.8
14:03:41:febtest:INFO:	0-1 | XA-000-08-002-000-005-121-09 |  25.1 | 1201.0
14:03:41:febtest:INFO:	0-2 | XA-000-08-002-000-000-033-00 |  21.9 | 1218.6
14:03:42:febtest:INFO:	0-3 | XA-000-08-002-000-005-125-09 |  15.6 | 1230.3
14:03:42:febtest:INFO:	0-4 | XA-000-08-002-000-000-037-00 |  34.6 | 1183.3
14:03:42:febtest:INFO:	0-5 | XA-000-08-002-000-005-123-09 |  31.4 | 1171.5
14:03:42:febtest:INFO:	0-6 | XA-000-08-002-000-000-038-00 |  31.4 | 1189.2
14:03:43:febtest:INFO:	0-7 | XA-000-08-002-000-005-122-09 |  18.7 | 1224.5
14:03:43:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:03:46:ST3_smx:INFO:	chip: 0-0 	 34.556970 C 	 1159.654860 mV
14:03:46:ST3_smx:INFO:	# loops 0
14:03:48:ST3_smx:INFO:	# loops 1
14:03:50:ST3_smx:INFO:	# loops 2
14:03:52:ST3_smx:INFO:	# loops 3
14:03:53:ST3_smx:INFO:	# loops 4
14:03:55:ST3_smx:INFO:	Total # of broken channels: 0
14:03:55:ST3_smx:INFO:	List of broken channels: []
14:03:55:ST3_smx:INFO:	Total # of broken channels: 0
14:03:55:ST3_smx:INFO:	List of broken channels: []
14:03:56:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:04:00:ST3_smx:INFO:	chip: 0-1 	 28.225000 C 	 1189.190035 mV
14:04:00:ST3_smx:INFO:	# loops 0
14:04:01:ST3_smx:INFO:	# loops 1
14:04:03:ST3_smx:INFO:	# loops 2
14:04:05:ST3_smx:INFO:	# loops 3
14:04:07:ST3_smx:INFO:	# loops 4
14:04:08:ST3_smx:INFO:	Total # of broken channels: 0
14:04:08:ST3_smx:INFO:	List of broken channels: []
14:04:08:ST3_smx:INFO:	Total # of broken channels: 0
14:04:08:ST3_smx:INFO:	List of broken channels: []
14:04:09:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:04:13:ST3_smx:INFO:	chip: 0-2 	 31.389742 C 	 1189.190035 mV
14:04:13:ST3_smx:INFO:	# loops 0
14:04:14:ST3_smx:INFO:	# loops 1
14:04:16:ST3_smx:INFO:	# loops 2
14:04:18:ST3_smx:INFO:	# loops 3
14:04:19:ST3_smx:INFO:	# loops 4
14:04:21:ST3_smx:INFO:	Total # of broken channels: 0
14:04:21:ST3_smx:INFO:	List of broken channels: []
14:04:21:ST3_smx:INFO:	Total # of broken channels: 0
14:04:21:ST3_smx:INFO:	List of broken channels: []
14:04:22:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:04:26:ST3_smx:INFO:	chip: 0-3 	 31.389742 C 	 1171.483840 mV
14:04:26:ST3_smx:INFO:	# loops 0
14:04:27:ST3_smx:INFO:	# loops 1
14:04:29:ST3_smx:INFO:	# loops 2
14:04:31:ST3_smx:INFO:	# loops 3
14:04:32:ST3_smx:INFO:	# loops 4
14:04:34:ST3_smx:INFO:	Total # of broken channels: 0
14:04:34:ST3_smx:INFO:	List of broken channels: []
14:04:34:ST3_smx:INFO:	Total # of broken channels: 0
14:04:34:ST3_smx:INFO:	List of broken channels: []
14:04:35:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:04:38:ST3_smx:INFO:	chip: 0-4 	 47.250730 C 	 1135.937260 mV
14:04:38:ST3_smx:INFO:	# loops 0
14:04:40:ST3_smx:INFO:	# loops 1
14:04:42:ST3_smx:INFO:	# loops 2
14:04:43:ST3_smx:INFO:	# loops 3
14:04:45:ST3_smx:INFO:	# loops 4
14:04:47:ST3_smx:INFO:	Total # of broken channels: 0
14:04:47:ST3_smx:INFO:	List of broken channels: []
14:04:47:ST3_smx:INFO:	Total # of broken channels: 0
14:04:47:ST3_smx:INFO:	List of broken channels: []
14:04:47:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:04:51:ST3_smx:INFO:	chip: 0-5 	 28.225000 C 	 1183.292940 mV
14:04:51:ST3_smx:INFO:	# loops 0
14:04:53:ST3_smx:INFO:	# loops 1
14:04:55:ST3_smx:INFO:	# loops 2
14:04:57:ST3_smx:INFO:	# loops 3
14:04:58:ST3_smx:INFO:	# loops 4
14:05:00:ST3_smx:INFO:	Total # of broken channels: 0
14:05:00:ST3_smx:INFO:	List of broken channels: []
14:05:00:ST3_smx:INFO:	Total # of broken channels: 0
14:05:00:ST3_smx:INFO:	List of broken channels: []
14:05:01:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:05:04:ST3_smx:INFO:	chip: 0-6 	 28.225000 C 	 1195.082160 mV
14:05:05:ST3_smx:INFO:	# loops 0
14:05:06:ST3_smx:INFO:	# loops 1
14:05:08:ST3_smx:INFO:	# loops 2
14:05:10:ST3_smx:INFO:	# loops 3
14:05:11:ST3_smx:INFO:	# loops 4
14:05:13:ST3_smx:INFO:	Total # of broken channels: 0
14:05:13:ST3_smx:INFO:	List of broken channels: []
14:05:13:ST3_smx:INFO:	Total # of broken channels: 0
14:05:13:ST3_smx:INFO:	List of broken channels: []
14:05:14:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:05:17:ST3_smx:INFO:	chip: 0-7 	 25.062742 C 	 1200.969315 mV
14:05:17:ST3_smx:INFO:	# loops 0
14:05:19:ST3_smx:INFO:	# loops 1
14:05:21:ST3_smx:INFO:	# loops 2
14:05:22:ST3_smx:INFO:	# loops 3
14:05:24:ST3_smx:INFO:	# loops 4
14:05:26:ST3_smx:INFO:	Total # of broken channels: 0
14:05:26:ST3_smx:INFO:	List of broken channels: []
14:05:26:ST3_smx:INFO:	Total # of broken channels: 0
14:05:26:ST3_smx:INFO:	List of broken channels: []
14:05:26:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
14:05:27:febtest:INFO:	0-0 | XA-000-08-002-000-000-052-07 |  44.1 | 1147.8
14:05:27:febtest:INFO:	0-1 | XA-000-08-002-000-005-121-09 |  34.6 | 1177.4
14:05:27:febtest:INFO:	0-2 | XA-000-08-002-000-000-033-00 |  34.6 | 1183.3
14:05:27:febtest:INFO:	0-3 | XA-000-08-002-000-005-125-09 |  34.6 | 1159.7
14:05:28:febtest:INFO:	0-4 | XA-000-08-002-000-000-037-00 |  50.4 | 1130.0
14:05:28:febtest:INFO:	0-5 | XA-000-08-002-000-005-123-09 |  31.4 | 1177.4
14:05:28:febtest:INFO:	0-6 | XA-000-08-002-000-000-038-00 |  31.4 | 1195.1
14:05:28:febtest:INFO:	0-7 | XA-000-08-002-000-005-122-09 |  25.1 | 1201.0
14:06:10:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2036/TestDate_2023_11_02-14_03_29/