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FEB_2040 25.09.23 12:43:32
TextEdit.txt
12:43:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:43:32:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
12:43:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:43:32:febtest:INFO: Tsting FEB with SN 2040
12:43:34:smx_tester:INFO: Scanning setup
12:43:34:elinks:INFO: Disabling clock on downlink 0
12:43:34:elinks:INFO: Disabling clock on downlink 1
12:43:34:elinks:INFO: Disabling clock on downlink 2
12:43:34:elinks:INFO: Disabling clock on downlink 3
12:43:34:elinks:INFO: Disabling clock on downlink 4
12:43:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:43:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:43:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:43:34:elinks:INFO: Disabling clock on downlink 0
12:43:34:elinks:INFO: Disabling clock on downlink 1
12:43:34:elinks:INFO: Disabling clock on downlink 2
12:43:34:elinks:INFO: Disabling clock on downlink 3
12:43:34:elinks:INFO: Disabling clock on downlink 4
12:43:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:43:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:43:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:43:34:elinks:INFO: Disabling clock on downlink 0
12:43:34:elinks:INFO: Disabling clock on downlink 1
12:43:34:elinks:INFO: Disabling clock on downlink 2
12:43:34:elinks:INFO: Disabling clock on downlink 3
12:43:34:elinks:INFO: Disabling clock on downlink 4
12:43:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:43:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
12:43:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
12:43:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:43:34:elinks:INFO: Disabling clock on downlink 0
12:43:34:elinks:INFO: Disabling clock on downlink 1
12:43:34:elinks:INFO: Disabling clock on downlink 2
12:43:34:elinks:INFO: Disabling clock on downlink 3
12:43:34:elinks:INFO: Disabling clock on downlink 4
12:43:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:43:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:43:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:43:34:elinks:INFO: Disabling clock on downlink 0
12:43:34:elinks:INFO: Disabling clock on downlink 1
12:43:34:elinks:INFO: Disabling clock on downlink 2
12:43:34:elinks:INFO: Disabling clock on downlink 3
12:43:34:elinks:INFO: Disabling clock on downlink 4
12:43:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:43:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:43:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:43:35:setup_element:INFO: Scanning clock phase
12:43:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:43:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:43:35:setup_element:INFO: Clock phase scan results for group 0, downlink 2
12:43:35:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:43:35:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
12:43:35:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
12:43:35:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
12:43:35:setup_element:INFO: Scanning data phases
12:43:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:43:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:43:41:setup_element:INFO: Data phase scan results for group 0, downlink 2
12:43:41:setup_element:INFO: Eye window for uplink 16: XX____________________________________XX
Data delay found: 19
12:43:41:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
12:43:41:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
12:43:41:setup_element:INFO: Eye window for uplink 19: __________________________________XXXX__
Data delay found: 15
12:43:41:setup_element:INFO: Eye window for uplink 20: X____________________________________XXX
Data delay found: 18
12:43:41:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
12:43:41:setup_element:INFO: Eye window for uplink 22: X___________________________________XXXX
Data delay found: 18
12:43:41:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
12:43:41:setup_element:INFO: Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
12:43:41:setup_element:INFO: Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
12:43:41:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
12:43:41:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
12:43:41:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________
Data delay found: 33
12:43:41:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
12:43:41:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
12:43:41:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
12:43:41:setup_element:INFO: Setting the data phase to 19 for uplink 16
12:43:41:setup_element:INFO: Setting the data phase to 15 for uplink 17
12:43:41:setup_element:INFO: Setting the data phase to 18 for uplink 18
12:43:41:setup_element:INFO: Setting the data phase to 15 for uplink 19
12:43:41:setup_element:INFO: Setting the data phase to 18 for uplink 20
12:43:41:setup_element:INFO: Setting the data phase to 17 for uplink 21
12:43:41:setup_element:INFO: Setting the data phase to 18 for uplink 22
12:43:41:setup_element:INFO: Setting the data phase to 15 for uplink 23
12:43:41:setup_element:INFO: Setting the data phase to 27 for uplink 24
12:43:41:setup_element:INFO: Setting the data phase to 30 for uplink 25
12:43:41:setup_element:INFO: Setting the data phase to 30 for uplink 26
12:43:41:setup_element:INFO: Setting the data phase to 33 for uplink 27
12:43:41:setup_element:INFO: Setting the data phase to 33 for uplink 28
12:43:41:setup_element:INFO: Setting the data phase to 35 for uplink 29
12:43:41:setup_element:INFO: Setting the data phase to 36 for uplink 30
12:43:41:setup_element:INFO: Setting the data phase to 35 for uplink 31
12:43:41:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXX_
Uplink 17: _______________________________________________________________________XXXXXXXX_
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: ________________________________________________________________________XXXXXXXX
Uplink 31: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 36
Eye Window: XX____________________________________XX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 20:
Optimal Phase: 18
Window Length: 36
Eye Window: X____________________________________XXX
Uplink 21:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 23:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 24:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 26:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 27:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 28:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
]
12:43:41:setup_element:INFO: Beginning SMX ASICs map scan
12:43:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:43:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:43:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:43:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:43:41:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:43:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:43:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:43:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:43:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:43:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:43:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:43:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:43:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:43:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:43:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:43:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:43:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:43:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:43:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:43:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:43:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:43:43:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXX_
Uplink 17: _______________________________________________________________________XXXXXXXX_
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: ________________________________________________________________________XXXXXXXX
Uplink 31: ________________________________________________________________________XXXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 36
Eye Window: XX____________________________________XX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 20:
Optimal Phase: 18
Window Length: 36
Eye Window: X____________________________________XXX
Uplink 21:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 23:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 24:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 26:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 27:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 28:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
12:43:43:setup_element:INFO: Performing Elink synchronization
12:43:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:43:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:43:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:43:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:43:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
12:43:43:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:43:44:ST3_emu:INFO: Number of chips: 8
12:43:44:ST3_emu:INFO: Chip address: 0x0
12:43:44:ST3_emu:INFO: Chip address: 0x1
12:43:44:ST3_emu:INFO: Chip address: 0x2
12:43:44:ST3_emu:INFO: Chip address: 0x3
12:43:44:ST3_emu:INFO: Chip address: 0x4
12:43:44:ST3_emu:INFO: Chip address: 0x5
12:43:44:ST3_emu:INFO: Chip address: 0x6
12:43:44:ST3_emu:INFO: Chip address: 0x7
12:43:44:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
12:43:45:febtest:INFO: 0-0 | XA-000-08-002-000-002-216-05 | 31.4 | 1201.0
12:43:45:febtest:INFO: 0-1 | XA-000-08-002-000-002-219-05 | 21.9 | 1212.7
12:43:45:febtest:INFO: 0-2 | XA-000-08-002-000-002-214-05 | 37.7 | 1171.5
12:43:45:febtest:INFO: 0-3 | XA-000-08-002-000-002-220-05 | 31.4 | 1189.2
12:43:45:febtest:INFO: 0-4 | XA-000-08-002-000-002-213-05 | 28.2 | 1201.0
12:43:46:febtest:INFO: 0-5 | XA-000-08-002-000-002-224-12 | 37.7 | 1159.7
12:43:46:febtest:INFO: 0-6 | XA-000-08-002-000-002-210-05 | 25.1 | 1206.9
12:43:46:febtest:INFO: 0-7 | XA-000-08-002-000-002-223-05 | 31.4 | 1177.4
12:43:46:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
12:43:50:ST3_smx:INFO: chip: 0-0 34.556970 C 1177.390875 mV
12:43:50:ST3_smx:INFO: # loops 0
12:43:52:ST3_smx:INFO: # loops 1
12:43:53:ST3_smx:INFO: # loops 2
12:43:55:ST3_smx:INFO: # loops 3
12:43:57:ST3_smx:INFO: # loops 4
12:43:58:ST3_smx:INFO: Total # of broken channels: 0
12:43:58:ST3_smx:INFO: List of broken channels: []
12:43:58:ST3_smx:INFO: Total # of broken channels: 0
12:43:58:ST3_smx:INFO: List of broken channels: []
12:43:59:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
12:44:03:ST3_smx:INFO: chip: 0-1 31.389742 C 1183.292940 mV
12:44:03:ST3_smx:INFO: # loops 0
12:44:04:ST3_smx:INFO: # loops 1
12:44:06:ST3_smx:INFO: # loops 2
12:44:08:ST3_smx:INFO: # loops 3
12:44:09:ST3_smx:INFO: # loops 4
12:44:11:ST3_smx:INFO: Total # of broken channels: 0
12:44:11:ST3_smx:INFO: List of broken channels: []
12:44:11:ST3_smx:INFO: Total # of broken channels: 0
12:44:11:ST3_smx:INFO: List of broken channels: []
12:44:12:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
12:44:15:ST3_smx:INFO: chip: 0-2 40.898880 C 1165.571835 mV
12:44:15:ST3_smx:INFO: # loops 0
12:44:17:ST3_smx:INFO: # loops 1
12:44:19:ST3_smx:INFO: # loops 2
12:44:20:ST3_smx:INFO: # loops 3
12:44:22:ST3_smx:INFO: # loops 4
12:44:24:ST3_smx:INFO: Total # of broken channels: 0
12:44:24:ST3_smx:INFO: List of broken channels: []
12:44:24:ST3_smx:INFO: Total # of broken channels: 0
12:44:24:ST3_smx:INFO: List of broken channels: []
12:44:24:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
12:44:28:ST3_smx:INFO: chip: 0-3 34.556970 C 1183.292940 mV
12:44:28:ST3_smx:INFO: # loops 0
12:44:30:ST3_smx:INFO: # loops 1
12:44:31:ST3_smx:INFO: # loops 2
12:44:33:ST3_smx:INFO: # loops 3
12:44:35:ST3_smx:INFO: # loops 4
12:44:36:ST3_smx:INFO: Total # of broken channels: 2
12:44:36:ST3_smx:INFO: List of broken channels: [13, 15]
12:44:36:ST3_smx:INFO: Total # of broken channels: 2
12:44:36:ST3_smx:INFO: List of broken channels: [13, 15]
12:44:37:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
12:44:41:ST3_smx:INFO: chip: 0-4 28.225000 C 1189.190035 mV
12:44:41:ST3_smx:INFO: # loops 0
12:44:42:ST3_smx:INFO: # loops 1
12:44:44:ST3_smx:INFO: # loops 2
12:44:46:ST3_smx:INFO: # loops 3
12:44:47:ST3_smx:INFO: # loops 4
12:44:49:ST3_smx:INFO: Total # of broken channels: 0
12:44:49:ST3_smx:INFO: List of broken channels: []
12:44:49:ST3_smx:INFO: Total # of broken channels: 0
12:44:49:ST3_smx:INFO: List of broken channels: []
12:44:50:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
12:44:53:ST3_smx:INFO: chip: 0-5 34.556970 C 1171.483840 mV
12:44:53:ST3_smx:INFO: # loops 0
12:44:55:ST3_smx:INFO: # loops 1
12:44:57:ST3_smx:INFO: # loops 2
12:44:58:ST3_smx:INFO: # loops 3
12:45:00:ST3_smx:INFO: # loops 4
12:45:02:ST3_smx:INFO: Total # of broken channels: 1
12:45:02:ST3_smx:INFO: List of broken channels: [1]
12:45:02:ST3_smx:INFO: Total # of broken channels: 1
12:45:02:ST3_smx:INFO: List of broken channels: [1]
12:45:02:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
12:45:06:ST3_smx:INFO: chip: 0-6 28.225000 C 1189.190035 mV
12:45:06:ST3_smx:INFO: # loops 0
12:45:08:ST3_smx:INFO: # loops 1
12:45:09:ST3_smx:INFO: # loops 2
12:45:11:ST3_smx:INFO: # loops 3
12:45:13:ST3_smx:INFO: # loops 4
12:45:14:ST3_smx:INFO: Total # of broken channels: 0
12:45:14:ST3_smx:INFO: List of broken channels: []
12:45:14:ST3_smx:INFO: Total # of broken channels: 2
12:45:14:ST3_smx:INFO: List of broken channels: [109, 111]
12:45:15:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
12:45:19:ST3_smx:INFO: chip: 0-7 34.556970 C 1165.571835 mV
12:45:19:ST3_smx:INFO: # loops 0
12:45:20:ST3_smx:INFO: # loops 1
12:45:22:ST3_smx:INFO: # loops 2
12:45:23:ST3_smx:INFO: # loops 3
12:45:25:ST3_smx:INFO: # loops 4
12:45:27:ST3_smx:INFO: Total # of broken channels: 3
12:45:27:ST3_smx:INFO: List of broken channels: [65, 67, 69]
12:45:27:ST3_smx:INFO: Total # of broken channels: 3
12:45:27:ST3_smx:INFO: List of broken channels: [65, 67, 69]
12:45:27:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
12:45:28:febtest:INFO: 0-0 | XA-000-08-002-000-002-216-05 | 44.1 | 1165.6
12:45:28:febtest:INFO: 0-1 | XA-000-08-002-000-002-219-05 | 37.7 | 1171.5
12:45:28:febtest:INFO: 0-2 | XA-000-08-002-000-002-214-05 | 47.3 | 1153.7
12:45:28:febtest:INFO: 0-3 | XA-000-08-002-000-002-220-05 | 40.9 | 1171.5
12:45:28:febtest:INFO: 0-4 | XA-000-08-002-000-002-213-05 | 31.4 | 1189.2
12:45:29:febtest:INFO: 0-5 | XA-000-08-002-000-002-224-12 | 37.7 | 1165.6
12:45:29:febtest:INFO: 0-6 | XA-000-08-002-000-002-210-05 | 31.4 | 1183.3
12:45:29:febtest:INFO: 0-7 | XA-000-08-002-000-002-223-05 | 34.6 | 1165.6
12:46:08:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2040/B//TestDate_2023_09_25-12_43_32/