FEB_2041 27.09.23 09:55:55
Info
09:55:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:55:55:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
09:55:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:55:55:febtest:INFO: Tsting FEB with SN 2041
09:55:56:smx_tester:INFO: Scanning setup
09:55:56:elinks:INFO: Disabling clock on downlink 0
09:55:56:elinks:INFO: Disabling clock on downlink 1
09:55:56:elinks:INFO: Disabling clock on downlink 2
09:55:56:elinks:INFO: Disabling clock on downlink 3
09:55:56:elinks:INFO: Disabling clock on downlink 4
09:55:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:55:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:55:56:elinks:INFO: Disabling clock on downlink 0
09:55:56:elinks:INFO: Disabling clock on downlink 1
09:55:56:elinks:INFO: Disabling clock on downlink 2
09:55:56:elinks:INFO: Disabling clock on downlink 3
09:55:56:elinks:INFO: Disabling clock on downlink 4
09:55:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:55:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:55:57:elinks:INFO: Disabling clock on downlink 0
09:55:57:elinks:INFO: Disabling clock on downlink 1
09:55:57:elinks:INFO: Disabling clock on downlink 2
09:55:57:elinks:INFO: Disabling clock on downlink 3
09:55:57:elinks:INFO: Disabling clock on downlink 4
09:55:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:55:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:55:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:55:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:55:57:elinks:INFO: Disabling clock on downlink 0
09:55:57:elinks:INFO: Disabling clock on downlink 1
09:55:57:elinks:INFO: Disabling clock on downlink 2
09:55:57:elinks:INFO: Disabling clock on downlink 3
09:55:57:elinks:INFO: Disabling clock on downlink 4
09:55:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:55:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:55:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:55:57:elinks:INFO: Disabling clock on downlink 0
09:55:57:elinks:INFO: Disabling clock on downlink 1
09:55:57:elinks:INFO: Disabling clock on downlink 2
09:55:57:elinks:INFO: Disabling clock on downlink 3
09:55:57:elinks:INFO: Disabling clock on downlink 4
09:55:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:55:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:55:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:55:57:setup_element:INFO: Scanning clock phase
09:55:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:55:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:55:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:55:57:setup_element:INFO: Eye window for uplink 16: X________________________________________________________________________XXXXXXX
Clock Delay: 36
09:55:57:setup_element:INFO: Eye window for uplink 17: X________________________________________________________________________XXXXXXX
Clock Delay: 36
09:55:57:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:55:57:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:55:58:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:55:58:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:55:58:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:55:58:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:55:58:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:55:58:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:55:58:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:55:58:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:55:58:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:55:58:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:55:58:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:55:58:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:55:58:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2
09:55:58:setup_element:INFO: Scanning data phases
09:55:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:55:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:56:03:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:56:03:setup_element:INFO: Eye window for uplink 16: XXXX___________________________________X
Data delay found: 21
09:56:03:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
09:56:03:setup_element:INFO: Eye window for uplink 18: XXX_________________________________XXXX
Data delay found: 19
09:56:03:setup_element:INFO: Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
09:56:03:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX
Data delay found: 19
09:56:03:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
09:56:03:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
09:56:03:setup_element:INFO: Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
09:56:03:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
09:56:03:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________
Data delay found: 31
09:56:03:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
09:56:03:setup_element:INFO: Eye window for uplink 27: __________XXXX__________________________
Data delay found: 31
09:56:03:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
09:56:03:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
09:56:03:setup_element:INFO: Eye window for uplink 30: ______________XXXXX_____________________
Data delay found: 36
09:56:03:setup_element:INFO: Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
09:56:03:setup_element:INFO: Setting the data phase to 21 for uplink 16
09:56:03:setup_element:INFO: Setting the data phase to 17 for uplink 17
09:56:03:setup_element:INFO: Setting the data phase to 19 for uplink 18
09:56:03:setup_element:INFO: Setting the data phase to 16 for uplink 19
09:56:03:setup_element:INFO: Setting the data phase to 19 for uplink 20
09:56:03:setup_element:INFO: Setting the data phase to 17 for uplink 21
09:56:03:setup_element:INFO: Setting the data phase to 17 for uplink 22
09:56:03:setup_element:INFO: Setting the data phase to 15 for uplink 23
09:56:03:setup_element:INFO: Setting the data phase to 29 for uplink 24
09:56:03:setup_element:INFO: Setting the data phase to 31 for uplink 25
09:56:03:setup_element:INFO: Setting the data phase to 28 for uplink 26
09:56:03:setup_element:INFO: Setting the data phase to 31 for uplink 27
09:56:03:setup_element:INFO: Setting the data phase to 34 for uplink 28
09:56:03:setup_element:INFO: Setting the data phase to 36 for uplink 29
09:56:03:setup_element:INFO: Setting the data phase to 36 for uplink 30
09:56:03:setup_element:INFO: Setting the data phase to 34 for uplink 31
09:56:03:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 16: X________________________________________________________________________XXXXXXX
Uplink 17: X________________________________________________________________________XXXXXXX
Uplink 18: ________________________________________________________________________XXXXXXX_
Uplink 19: ________________________________________________________________________XXXXXXX_
Uplink 20: ________________________________________________________________________XXXXXXXX
Uplink 21: ________________________________________________________________________XXXXXXXX
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: _______________________________________________________________________XXXXXXXXX
Uplink 25: _______________________________________________________________________XXXXXXXXX
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: ________________________________________________________________________XXXXXXXX
Uplink 29: ________________________________________________________________________XXXXXXXX
Uplink 30: ________________________________________________________________________XXXXXXX_
Uplink 31: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 19:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 20:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 21:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 23:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 24:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 28:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 29:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 31:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
]
09:56:03:setup_element:INFO: Beginning SMX ASICs map scan
09:56:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:56:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:56:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:56:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:56:03:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:56:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:56:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:56:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:56:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:56:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:56:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:56:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:56:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:56:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:56:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:56:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:56:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:56:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:56:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:56:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:56:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:56:06:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 16: X________________________________________________________________________XXXXXXX
Uplink 17: X________________________________________________________________________XXXXXXX
Uplink 18: ________________________________________________________________________XXXXXXX_
Uplink 19: ________________________________________________________________________XXXXXXX_
Uplink 20: ________________________________________________________________________XXXXXXXX
Uplink 21: ________________________________________________________________________XXXXXXXX
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: _______________________________________________________________________XXXXXXXXX
Uplink 25: _______________________________________________________________________XXXXXXXXX
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: ________________________________________________________________________XXXXXXXX
Uplink 29: ________________________________________________________________________XXXXXXXX
Uplink 30: ________________________________________________________________________XXXXXXX_
Uplink 31: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 21
Window Length: 35
Eye Window: XXXX___________________________________X
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 19:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 20:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 21:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 23:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 24:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 28:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 29:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 31:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
09:56:06:setup_element:INFO: Performing Elink synchronization
09:56:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:56:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:56:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:56:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:56:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:56:06:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:56:06:ST3_emu:INFO: Number of chips: 8
09:56:06:ST3_emu:INFO: Chip address: 0x0
09:56:06:ST3_emu:INFO: Chip address: 0x1
09:56:06:ST3_emu:INFO: Chip address: 0x2
09:56:06:ST3_emu:INFO: Chip address: 0x3
09:56:06:ST3_emu:INFO: Chip address: 0x4
09:56:06:ST3_emu:INFO: Chip address: 0x5
09:56:06:ST3_emu:INFO: Chip address: 0x6
09:56:06:ST3_emu:INFO: Chip address: 0x7
09:56:07:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:56:07:febtest:INFO: 0-0 | XA-000-08-002-000-003-024-07 | 31.4 | 1183.3
09:56:07:febtest:INFO: 0-1 | XA-000-08-002-000-003-019-07 | 34.6 | 1171.5
09:56:08:febtest:INFO: 0-2 | XA-000-08-002-000-003-018-07 | 25.1 | 1206.9
09:56:08:febtest:INFO: 0-3 | XA-000-08-002-000-003-052-09 | 21.9 | 1212.7
09:56:08:febtest:INFO: 0-4 | XA-000-08-002-000-003-057-09 | 9.3 | 1271.2
09:56:08:febtest:INFO: 0-5 | XA-000-08-002-000-003-027-07 | 31.4 | 1171.5
09:56:08:febtest:INFO: 0-6 | XA-000-08-002-000-003-061-09 | 18.7 | 1218.6
09:56:09:febtest:INFO: 0-7 | XA-000-08-002-000-003-017-07 | 31.4 | 1171.5
09:56:09:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
09:56:12:ST3_smx:INFO: chip: 0-0 34.556970 C 1165.571835 mV
09:56:12:ST3_smx:INFO: # loops 0
09:56:14:ST3_smx:INFO: # loops 1
09:56:16:ST3_smx:INFO: # loops 2
09:56:18:ST3_smx:INFO: # loops 3
09:56:19:ST3_smx:INFO: # loops 4
09:56:21:ST3_smx:INFO: Total # of broken channels: 0
09:56:21:ST3_smx:INFO: List of broken channels: []
09:56:21:ST3_smx:INFO: Total # of broken channels: 0
09:56:21:ST3_smx:INFO: List of broken channels: []
09:56:22:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
09:56:25:ST3_smx:INFO: chip: 0-1 37.726682 C 1159.654860 mV
09:56:25:ST3_smx:INFO: # loops 0
09:56:27:ST3_smx:INFO: # loops 1
09:56:29:ST3_smx:INFO: # loops 2
09:56:31:ST3_smx:INFO: # loops 3
09:56:32:ST3_smx:INFO: # loops 4
09:56:34:ST3_smx:INFO: Total # of broken channels: 0
09:56:34:ST3_smx:INFO: List of broken channels: []
09:56:34:ST3_smx:INFO: Total # of broken channels: 0
09:56:34:ST3_smx:INFO: List of broken channels: []
09:56:35:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
09:56:38:ST3_smx:INFO: chip: 0-2 31.389742 C 1177.390875 mV
09:56:38:ST3_smx:INFO: # loops 0
09:56:40:ST3_smx:INFO: # loops 1
09:56:42:ST3_smx:INFO: # loops 2
09:56:43:ST3_smx:INFO: # loops 3
09:56:45:ST3_smx:INFO: # loops 4
09:56:46:ST3_smx:INFO: Total # of broken channels: 0
09:56:46:ST3_smx:INFO: List of broken channels: []
09:56:46:ST3_smx:INFO: Total # of broken channels: 0
09:56:46:ST3_smx:INFO: List of broken channels: []
09:56:47:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
09:56:50:ST3_smx:INFO: chip: 0-3 15.590880 C 1230.330540 mV
09:56:51:ST3_smx:INFO: # loops 0
09:56:52:ST3_smx:INFO: # loops 1
09:56:54:ST3_smx:INFO: # loops 2
09:56:55:ST3_smx:INFO: # loops 3
09:56:57:ST3_smx:INFO: # loops 4
09:56:59:ST3_smx:INFO: Total # of broken channels: 0
09:56:59:ST3_smx:INFO: List of broken channels: []
09:56:59:ST3_smx:INFO: Total # of broken channels: 0
09:56:59:ST3_smx:INFO: List of broken channels: []
09:56:59:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
09:57:03:ST3_smx:INFO: chip: 0-4 25.062742 C 1200.969315 mV
09:57:03:ST3_smx:INFO: # loops 0
09:57:05:ST3_smx:INFO: # loops 1
09:57:06:ST3_smx:INFO: # loops 2
09:57:08:ST3_smx:INFO: # loops 3
09:57:09:ST3_smx:INFO: # loops 4
09:57:11:ST3_smx:INFO: Total # of broken channels: 0
09:57:11:ST3_smx:INFO: List of broken channels: []
09:57:11:ST3_smx:INFO: Total # of broken channels: 0
09:57:11:ST3_smx:INFO: List of broken channels: []
09:57:11:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
09:57:15:ST3_smx:INFO: chip: 0-5 37.726682 C 1153.732915 mV
09:57:15:ST3_smx:INFO: # loops 0
09:57:17:ST3_smx:INFO: # loops 1
09:57:18:ST3_smx:INFO: # loops 2
09:57:20:ST3_smx:INFO: # loops 3
09:57:21:ST3_smx:INFO: # loops 4
09:57:23:ST3_smx:INFO: Total # of broken channels: 0
09:57:23:ST3_smx:INFO: List of broken channels: []
09:57:23:ST3_smx:INFO: Total # of broken channels: 0
09:57:23:ST3_smx:INFO: List of broken channels: []
09:57:23:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
09:57:27:ST3_smx:INFO: chip: 0-6 31.389742 C 1177.390875 mV
09:57:27:ST3_smx:INFO: # loops 0
09:57:29:ST3_smx:INFO: # loops 1
09:57:30:ST3_smx:INFO: # loops 2
09:57:32:ST3_smx:INFO: # loops 3
09:57:33:ST3_smx:INFO: # loops 4
09:57:35:ST3_smx:INFO: Total # of broken channels: 0
09:57:35:ST3_smx:INFO: List of broken channels: []
09:57:35:ST3_smx:INFO: Total # of broken channels: 0
09:57:35:ST3_smx:INFO: List of broken channels: []
09:57:35:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
09:57:39:ST3_smx:INFO: chip: 0-7 34.556970 C 1159.654860 mV
09:57:39:ST3_smx:INFO: # loops 0
09:57:41:ST3_smx:INFO: # loops 1
09:57:43:ST3_smx:INFO: # loops 2
09:57:44:ST3_smx:INFO: # loops 3
09:57:46:ST3_smx:INFO: # loops 4
09:57:47:ST3_smx:INFO: Total # of broken channels: 0
09:57:47:ST3_smx:INFO: List of broken channels: []
09:57:47:ST3_smx:INFO: Total # of broken channels: 0
09:57:47:ST3_smx:INFO: List of broken channels: []
09:57:48:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:57:48:febtest:INFO: 0-0 | XA-000-08-002-000-003-024-07 | 44.1 | 1153.7
09:57:48:febtest:INFO: 0-1 | XA-000-08-002-000-003-019-07 | 44.1 | 1153.7
09:57:49:febtest:INFO: 0-2 | XA-000-08-002-000-003-018-07 | 37.7 | 1171.5
09:57:49:febtest:INFO: 0-3 | XA-000-08-002-000-003-052-09 | 21.9 | 1224.5
09:57:49:febtest:INFO: 0-4 | XA-000-08-002-000-003-057-09 | 31.4 | 1189.2
09:57:49:febtest:INFO: 0-5 | XA-000-08-002-000-003-027-07 | 40.9 | 1147.8
09:57:49:febtest:INFO: 0-6 | XA-000-08-002-000-003-061-09 | 34.6 | 1177.4
09:57:50:febtest:INFO: 0-7 | XA-000-08-002-000-003-017-07 | 34.6 | 1153.7
09:57:52:ST3_Shared:INFO: Listo of operators:Oleksandr S.; Robert V.;
09:57:53:ST3_Shared:INFO: Listo of operators:Robert V.;
09:57:55:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2041/B//TestDate_2023_09_27-09_55_55/