08:07:41:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
08:07:42:febtest:INFO:	FEB 8-2 selected
08:07:42:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
08:07:44:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
08:07:46:febtest:INFO:	FEB 8-2 selected
08:07:46:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
08:10:17:febtest:INFO:	FEB 8-2 selected
08:10:17:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
08:10:21:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:10:21:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
08:10:21:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:11:04:ST3_ModuleSelector:INFO:	L3DL500114 M3DL5T1001141A2 62 C

08:11:04:ST3_ModuleSelector:INFO:	15403

08:11:05:febtest:INFO:	Testing FEB with SN 2042
08:11:06:smx_tester:INFO:	Scanning setup
08:11:06:elinks:INFO:	Disabling clock on downlink 0
08:11:06:elinks:INFO:	Disabling clock on downlink 1
08:11:06:elinks:INFO:	Disabling clock on downlink 2
08:11:06:elinks:INFO:	Disabling clock on downlink 3
08:11:06:elinks:INFO:	Disabling clock on downlink 4
08:11:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:11:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:11:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:11:06:elinks:INFO:	Disabling clock on downlink 0
08:11:06:elinks:INFO:	Disabling clock on downlink 1
08:11:06:elinks:INFO:	Disabling clock on downlink 2
08:11:06:elinks:INFO:	Disabling clock on downlink 3
08:11:06:elinks:INFO:	Disabling clock on downlink 4
08:11:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:11:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:11:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:11:06:elinks:INFO:	Disabling clock on downlink 0
08:11:06:elinks:INFO:	Disabling clock on downlink 1
08:11:06:elinks:INFO:	Disabling clock on downlink 2
08:11:06:elinks:INFO:	Disabling clock on downlink 3
08:11:06:elinks:INFO:	Disabling clock on downlink 4
08:11:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:11:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
08:11:06:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
08:11:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:11:06:elinks:INFO:	Disabling clock on downlink 0
08:11:06:elinks:INFO:	Disabling clock on downlink 1
08:11:06:elinks:INFO:	Disabling clock on downlink 2
08:11:06:elinks:INFO:	Disabling clock on downlink 3
08:11:06:elinks:INFO:	Disabling clock on downlink 4
08:11:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:11:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:11:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:11:06:elinks:INFO:	Disabling clock on downlink 0
08:11:06:elinks:INFO:	Disabling clock on downlink 1
08:11:06:elinks:INFO:	Disabling clock on downlink 2
08:11:07:elinks:INFO:	Disabling clock on downlink 3
08:11:07:elinks:INFO:	Disabling clock on downlink 4
08:11:07:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:11:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:11:07:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:11:07:setup_element:INFO:	Scanning clock phase
08:11:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:11:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:11:07:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
08:11:07:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:11:07:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:11:07:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:11:07:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:11:07:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:11:07:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:11:07:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:11:07:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:11:07:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:11:07:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:11:07:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:11:07:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
08:11:07:setup_element:INFO:	Eye window for uplink 28: X________________________________________________________________________XXXXXXX
Clock Delay: 36
08:11:07:setup_element:INFO:	Eye window for uplink 29: X________________________________________________________________________XXXXXXX
Clock Delay: 36
08:11:07:setup_element:INFO:	Eye window for uplink 30: X________________________________________________________________________XXXXXXX
Clock Delay: 36
08:11:07:setup_element:INFO:	Eye window for uplink 31: X________________________________________________________________________XXXXXXX
Clock Delay: 36
08:11:07:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 2
08:11:07:setup_element:INFO:	Scanning data phases
08:11:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:11:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:11:13:setup_element:INFO:	Data phase scan results for group 0, downlink 2
08:11:13:setup_element:INFO:	Eye window for uplink 16: XXX____________________________________X
Data delay found: 20
08:11:13:setup_element:INFO:	Eye window for uplink 17: ___________________________________XXXX_
Data delay found: 16
08:11:13:setup_element:INFO:	Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
08:11:13:setup_element:INFO:	Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
08:11:13:setup_element:INFO:	Eye window for uplink 20: XX___________________________________XXX
Data delay found: 19
08:11:13:setup_element:INFO:	Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
08:11:13:setup_element:INFO:	Eye window for uplink 22: XX_________________________________XXXXX
Data delay found: 18
08:11:13:setup_element:INFO:	Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
08:11:13:setup_element:INFO:	Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
08:11:13:setup_element:INFO:	Eye window for uplink 25: ________XXXX____________________________
Data delay found: 29
08:11:13:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
08:11:13:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
08:11:13:setup_element:INFO:	Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
08:11:13:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXXX___________________
Data delay found: 37
08:11:13:setup_element:INFO:	Eye window for uplink 30: _________________XXXXX__________________
Data delay found: 39
08:11:13:setup_element:INFO:	Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
08:11:13:setup_element:INFO:	Setting the data phase to 20 for uplink 16
08:11:13:setup_element:INFO:	Setting the data phase to 16 for uplink 17
08:11:13:setup_element:INFO:	Setting the data phase to 18 for uplink 18
08:11:13:setup_element:INFO:	Setting the data phase to 15 for uplink 19
08:11:13:setup_element:INFO:	Setting the data phase to 19 for uplink 20
08:11:13:setup_element:INFO:	Setting the data phase to 17 for uplink 21
08:11:13:setup_element:INFO:	Setting the data phase to 18 for uplink 22
08:11:13:setup_element:INFO:	Setting the data phase to 15 for uplink 23
08:11:13:setup_element:INFO:	Setting the data phase to 27 for uplink 24
08:11:13:setup_element:INFO:	Setting the data phase to 29 for uplink 25
08:11:13:setup_element:INFO:	Setting the data phase to 30 for uplink 26
08:11:13:setup_element:INFO:	Setting the data phase to 33 for uplink 27
08:11:13:setup_element:INFO:	Setting the data phase to 35 for uplink 28
08:11:13:setup_element:INFO:	Setting the data phase to 37 for uplink 29
08:11:13:setup_element:INFO:	Setting the data phase to 39 for uplink 30
08:11:13:setup_element:INFO:	Setting the data phase to 37 for uplink 31
08:11:13:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________XXXXXXXX
      Uplink 17: ________________________________________________________________________XXXXXXXX
      Uplink 18: _______________________________________________________________________XXXXXXX__
      Uplink 19: _______________________________________________________________________XXXXXXX__
      Uplink 20: ________________________________________________________________________XXXXXXXX
      Uplink 21: ________________________________________________________________________XXXXXXXX
      Uplink 22: ________________________________________________________________________XXXXXXXX
      Uplink 23: ________________________________________________________________________XXXXXXXX
      Uplink 24: _______________________________________________________________________XXXXXXXXX
      Uplink 25: _______________________________________________________________________XXXXXXXXX
      Uplink 26: _______________________________________________________________________XXXXXXXXX
      Uplink 27: _______________________________________________________________________XXXXXXXXX
      Uplink 28: X________________________________________________________________________XXXXXXX
      Uplink 29: X________________________________________________________________________XXXXXXX
      Uplink 30: X________________________________________________________________________XXXXXXX
      Uplink 31: X________________________________________________________________________XXXXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 20
      Window Length: 36
      Eye Window: XXX____________________________________X
    Uplink 17:
      Optimal Phase: 16
      Window Length: 36
      Eye Window: ___________________________________XXXX_
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 20:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 21:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 22:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 23:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 24:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
]
08:11:13:setup_element:INFO:	Beginning SMX ASICs map scan
08:11:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:11:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:11:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:11:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:11:13:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:11:13:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:11:13:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:11:13:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:11:13:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:11:13:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:11:13:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:11:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:11:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:11:14:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:11:14:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:11:14:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:11:14:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:11:14:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:11:14:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:11:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:11:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:11:16:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________XXXXXXXX
      Uplink 17: ________________________________________________________________________XXXXXXXX
      Uplink 18: _______________________________________________________________________XXXXXXX__
      Uplink 19: _______________________________________________________________________XXXXXXX__
      Uplink 20: ________________________________________________________________________XXXXXXXX
      Uplink 21: ________________________________________________________________________XXXXXXXX
      Uplink 22: ________________________________________________________________________XXXXXXXX
      Uplink 23: ________________________________________________________________________XXXXXXXX
      Uplink 24: _______________________________________________________________________XXXXXXXXX
      Uplink 25: _______________________________________________________________________XXXXXXXXX
      Uplink 26: _______________________________________________________________________XXXXXXXXX
      Uplink 27: _______________________________________________________________________XXXXXXXXX
      Uplink 28: X________________________________________________________________________XXXXXXX
      Uplink 29: X________________________________________________________________________XXXXXXX
      Uplink 30: X________________________________________________________________________XXXXXXX
      Uplink 31: X________________________________________________________________________XXXXXXX
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 20
      Window Length: 36
      Eye Window: XXX____________________________________X
    Uplink 17:
      Optimal Phase: 16
      Window Length: 36
      Eye Window: ___________________________________XXXX_
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 20:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 21:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 22:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 23:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 24:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXXXX___________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 35
      Eye Window: _________________XXXXX__________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________

08:11:16:setup_element:INFO:	Performing Elink synchronization
08:11:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:11:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:11:16:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:11:16:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:11:16:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
08:11:16:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:11:16:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
08:11:17:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:11:17:febtest:INFO:	23-0 | XA-000-08-002-000-003-071-05 |  21.9 | 1236.2
08:11:18:febtest:INFO:	30-1 | XA-000-08-002-000-003-064-05 |  18.7 | 1259.6
08:11:18:febtest:INFO:	21-2 | XA-000-08-002-000-003-070-05 |  18.7 | 1259.6
08:11:18:febtest:INFO:	28-3 | XA-000-08-002-000-003-068-05 |  28.2 | 1230.3
08:11:18:febtest:INFO:	19-4 | XA-000-08-002-000-003-047-14 |  44.1 | 1165.6
08:11:19:febtest:INFO:	26-5 | XA-000-08-002-000-003-067-05 |  40.9 | 1177.4
08:11:19:febtest:INFO:	17-6 | XA-000-08-002-000-003-063-09 |  44.1 | 1171.5
08:11:19:febtest:INFO:	24-7 | XA-000-08-002-000-003-066-05 |  21.9 | 1230.3
08:11:19:ST3_smx:INFO:	Configuring SMX FAST
08:11:21:ST3_smx:INFO:	chip: 23-0 	 31.389742 C 	 1212.728715 mV
08:11:21:ST3_smx:INFO:		Electrons
08:11:21:ST3_smx:INFO:	# loops 0
08:11:23:ST3_smx:INFO:	# loops 1
08:11:24:ST3_smx:INFO:	# loops 2
08:11:26:ST3_smx:INFO:	# loops 3
08:11:28:ST3_smx:INFO:	# loops 4
08:11:29:ST3_smx:INFO:	Total # of broken channels: 0
08:11:29:ST3_smx:INFO:	List of broken channels: []
08:11:29:ST3_smx:INFO:	Total # of broken channels: 0
08:11:29:ST3_smx:INFO:	List of broken channels: []
08:11:30:ST3_smx:INFO:	Configuring SMX FAST
08:11:32:ST3_smx:INFO:	chip: 30-1 	 25.062742 C 	 1242.040240 mV
08:11:32:ST3_smx:INFO:		Electrons
08:11:32:ST3_smx:INFO:	# loops 0
08:11:33:ST3_smx:INFO:	# loops 1
08:11:35:ST3_smx:INFO:	# loops 2
08:11:37:ST3_smx:INFO:	# loops 3
08:11:38:ST3_smx:INFO:	# loops 4
08:11:40:ST3_smx:INFO:	Total # of broken channels: 0
08:11:40:ST3_smx:INFO:	List of broken channels: []
08:11:40:ST3_smx:INFO:	Total # of broken channels: 0
08:11:40:ST3_smx:INFO:	List of broken channels: []
08:11:40:ST3_smx:INFO:	Configuring SMX FAST
08:11:42:ST3_smx:INFO:	chip: 21-2 	 28.225000 C 	 1236.187875 mV
08:11:42:ST3_smx:INFO:		Electrons
08:11:42:ST3_smx:INFO:	# loops 0
08:11:44:ST3_smx:INFO:	# loops 1
08:11:45:ST3_smx:INFO:	# loops 2
08:11:47:ST3_smx:INFO:	# loops 3
08:11:48:ST3_smx:INFO:	# loops 4
08:11:50:ST3_smx:INFO:	Total # of broken channels: 0
08:11:50:ST3_smx:INFO:	List of broken channels: []
08:11:50:ST3_smx:INFO:	Total # of broken channels: 0
08:11:50:ST3_smx:INFO:	List of broken channels: []
08:11:50:ST3_smx:INFO:	Configuring SMX FAST
08:11:52:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1242.040240 mV
08:11:52:ST3_smx:INFO:		Electrons
08:11:52:ST3_smx:INFO:	# loops 0
08:11:54:ST3_smx:INFO:	# loops 1
08:11:56:ST3_smx:INFO:	# loops 2
08:11:58:ST3_smx:INFO:	# loops 3
08:11:59:ST3_smx:INFO:	# loops 4
08:12:01:ST3_smx:INFO:	Total # of broken channels: 0
08:12:01:ST3_smx:INFO:	List of broken channels: []
08:12:01:ST3_smx:INFO:	Total # of broken channels: 0
08:12:01:ST3_smx:INFO:	List of broken channels: []
08:12:01:ST3_smx:INFO:	Configuring SMX FAST
08:12:03:ST3_smx:INFO:	chip: 19-4 	 47.250730 C 	 1171.483840 mV
08:12:03:ST3_smx:INFO:		Electrons
08:12:03:ST3_smx:INFO:	# loops 0
08:12:05:ST3_smx:INFO:	# loops 1
08:12:06:ST3_smx:INFO:	# loops 2
08:12:08:ST3_smx:INFO:	# loops 3
08:12:10:ST3_smx:INFO:	# loops 4
08:12:11:ST3_smx:INFO:	Total # of broken channels: 0
08:12:11:ST3_smx:INFO:	List of broken channels: []
08:12:11:ST3_smx:INFO:	Total # of broken channels: 0
08:12:11:ST3_smx:INFO:	List of broken channels: []
08:12:11:ST3_smx:INFO:	Configuring SMX FAST
08:12:13:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1177.390875 mV
08:12:13:ST3_smx:INFO:		Electrons
08:12:13:ST3_smx:INFO:	# loops 0
08:12:15:ST3_smx:INFO:	# loops 1
08:12:17:ST3_smx:INFO:	# loops 2
08:12:18:ST3_smx:INFO:	# loops 3
08:12:20:ST3_smx:INFO:	# loops 4
08:12:21:ST3_smx:INFO:	Total # of broken channels: 0
08:12:21:ST3_smx:INFO:	List of broken channels: []
08:12:21:ST3_smx:INFO:	Total # of broken channels: 0
08:12:21:ST3_smx:INFO:	List of broken channels: []
08:12:22:ST3_smx:INFO:	Configuring SMX FAST
08:12:24:ST3_smx:INFO:	chip: 17-6 	 47.250730 C 	 1171.483840 mV
08:12:24:ST3_smx:INFO:		Electrons
08:12:24:ST3_smx:INFO:	# loops 0
08:12:25:ST3_smx:INFO:	# loops 1
08:12:27:ST3_smx:INFO:	# loops 2
08:12:29:ST3_smx:INFO:	# loops 3
08:12:30:ST3_smx:INFO:	# loops 4
08:12:32:ST3_smx:INFO:	Total # of broken channels: 0
08:12:32:ST3_smx:INFO:	List of broken channels: []
08:12:32:ST3_smx:INFO:	Total # of broken channels: 3
08:12:32:ST3_smx:INFO:	List of broken channels: [123, 125, 127]
08:12:32:ST3_smx:INFO:	Configuring SMX FAST
08:12:34:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1206.851500 mV
08:12:34:ST3_smx:INFO:		Electrons
08:12:34:ST3_smx:INFO:	# loops 0
08:12:36:ST3_smx:INFO:	# loops 1
08:12:38:ST3_smx:INFO:	# loops 2
08:12:40:ST3_smx:INFO:	# loops 3
08:12:42:ST3_smx:INFO:	# loops 4
08:12:43:ST3_smx:INFO:	Total # of broken channels: 0
08:12:43:ST3_smx:INFO:	List of broken channels: []
08:12:43:ST3_smx:INFO:	Total # of broken channels: 0
08:12:43:ST3_smx:INFO:	List of broken channels: []
08:12:44:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:12:44:febtest:INFO:	23-0 | XA-000-08-002-000-003-071-05 |  37.7 | 1206.9
08:12:44:febtest:INFO:	30-1 | XA-000-08-002-000-003-064-05 |  28.2 | 1242.0
08:12:44:febtest:INFO:	21-2 | XA-000-08-002-000-003-070-05 |  31.4 | 1230.3
08:12:45:febtest:INFO:	28-3 | XA-000-08-002-000-003-068-05 |  28.2 | 1242.0
08:12:45:febtest:INFO:	19-4 | XA-000-08-002-000-003-047-14 |  50.4 | 1171.5
08:12:45:febtest:INFO:	26-5 | XA-000-08-002-000-003-067-05 |  44.1 | 1183.3
08:12:45:febtest:INFO:	17-6 | XA-000-08-002-000-003-063-09 |  47.3 | 1171.5
08:12:45:febtest:INFO:	24-7 | XA-000-08-002-000-003-066-05 |  34.6 | 1201.0
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_12_01-08_10_21
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L3DL500114 M3DL5T1001141A2 62 C

FEB_SN : 2042
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	15403

MODULE_NAME:	L3DL500114 M3DL5T1001141A2 62 C

MODULE_TYPE:	
MODULE_LADDER:	L3DL500114
MODULE_MODULE:	M3DL5T1001141A2
MODULE_SIZE:	62
MODULE_GRADE:	C
---------------------------------------
VI_before_Init : ['2.450', '1.8810', '1.851', '0.5118', '7.000', '1.5470', '7.000', '1.5470']
VI_after__Init : ['2.450', '1.9850', '1.850', '0.5967', '7.000', '1.5480', '7.000', '1.5480']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
08:13:14:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2042/TestDate_2023_12_01-08_10_21/