14:50:58:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
14:50:59:febtest:INFO:	FEB 8-2 selected
14:50:59:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
14:51:04:ST3_Shared:INFO:	Listo of operators:Kerstin S.; 
14:51:05:ST3_Shared:INFO:	Listo of operators:Kerstin S.; Irakli K.; 
14:51:08:febtest:INFO:	FEB 8-2 selected
14:51:08:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
14:51:13:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:51:13:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
14:51:13:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:51:52:ST3_ModuleSelector:INFO:	L3DL500114 M3DL5T2001142A2 124 C

14:51:52:ST3_ModuleSelector:INFO:	
14:51:53:febtest:INFO:	Testing FEB with SN 2043
14:51:54:smx_tester:INFO:	Scanning setup
14:51:54:elinks:INFO:	Disabling clock on downlink 0
14:51:54:elinks:INFO:	Disabling clock on downlink 1
14:51:54:elinks:INFO:	Disabling clock on downlink 2
14:51:54:elinks:INFO:	Disabling clock on downlink 3
14:51:54:elinks:INFO:	Disabling clock on downlink 4
14:51:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:51:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:51:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:51:54:elinks:INFO:	Disabling clock on downlink 0
14:51:54:elinks:INFO:	Disabling clock on downlink 1
14:51:54:elinks:INFO:	Disabling clock on downlink 2
14:51:54:elinks:INFO:	Disabling clock on downlink 3
14:51:54:elinks:INFO:	Disabling clock on downlink 4
14:51:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:51:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:51:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:51:54:elinks:INFO:	Disabling clock on downlink 0
14:51:54:elinks:INFO:	Disabling clock on downlink 1
14:51:54:elinks:INFO:	Disabling clock on downlink 2
14:51:54:elinks:INFO:	Disabling clock on downlink 3
14:51:54:elinks:INFO:	Disabling clock on downlink 4
14:51:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:51:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:51:54:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:51:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:51:54:elinks:INFO:	Disabling clock on downlink 0
14:51:54:elinks:INFO:	Disabling clock on downlink 1
14:51:54:elinks:INFO:	Disabling clock on downlink 2
14:51:54:elinks:INFO:	Disabling clock on downlink 3
14:51:54:elinks:INFO:	Disabling clock on downlink 4
14:51:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:51:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:51:54:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:51:54:elinks:INFO:	Disabling clock on downlink 0
14:51:54:elinks:INFO:	Disabling clock on downlink 1
14:51:54:elinks:INFO:	Disabling clock on downlink 2
14:51:54:elinks:INFO:	Disabling clock on downlink 3
14:51:54:elinks:INFO:	Disabling clock on downlink 4
14:51:54:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:51:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:51:55:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:51:55:setup_element:INFO:	Scanning clock phase
14:51:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:51:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:51:55:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:51:55:setup_element:INFO:	Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:51:55:setup_element:INFO:	Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:51:55:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
14:51:55:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
14:51:55:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
14:51:55:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
14:51:55:setup_element:INFO:	Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:51:55:setup_element:INFO:	Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
14:51:55:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:51:55:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:51:55:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
14:51:55:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
14:51:55:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:51:55:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:51:55:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:51:55:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
14:51:55:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 2
14:51:55:setup_element:INFO:	Scanning data phases
14:51:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:51:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:52:01:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:52:01:setup_element:INFO:	Eye window for uplink 16: ____________________________________XXX_
Data delay found: 17
14:52:01:setup_element:INFO:	Eye window for uplink 17: ________________________________XXXX____
Data delay found: 13
14:52:01:setup_element:INFO:	Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
14:52:01:setup_element:INFO:	Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
14:52:01:setup_element:INFO:	Eye window for uplink 20: ___________________________________XXXX_
Data delay found: 16
14:52:01:setup_element:INFO:	Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
14:52:01:setup_element:INFO:	Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
14:52:01:setup_element:INFO:	Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
14:52:01:setup_element:INFO:	Eye window for uplink 24: ____XXXXXX______________________________
Data delay found: 26
14:52:01:setup_element:INFO:	Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
14:52:01:setup_element:INFO:	Eye window for uplink 26: ________XXXX____________________________
Data delay found: 29
14:52:01:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
14:52:01:setup_element:INFO:	Eye window for uplink 28: _________XXXXX__________________________
Data delay found: 31
14:52:01:setup_element:INFO:	Eye window for uplink 29: ___________XXXXX________________________
Data delay found: 33
14:52:01:setup_element:INFO:	Eye window for uplink 30: ______________XXXXX_____________________
Data delay found: 36
14:52:01:setup_element:INFO:	Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
14:52:01:setup_element:INFO:	Setting the data phase to 17 for uplink 16
14:52:01:setup_element:INFO:	Setting the data phase to 13 for uplink 17
14:52:01:setup_element:INFO:	Setting the data phase to 18 for uplink 18
14:52:01:setup_element:INFO:	Setting the data phase to 15 for uplink 19
14:52:01:setup_element:INFO:	Setting the data phase to 16 for uplink 20
14:52:01:setup_element:INFO:	Setting the data phase to 15 for uplink 21
14:52:01:setup_element:INFO:	Setting the data phase to 17 for uplink 22
14:52:01:setup_element:INFO:	Setting the data phase to 15 for uplink 23
14:52:01:setup_element:INFO:	Setting the data phase to 26 for uplink 24
14:52:01:setup_element:INFO:	Setting the data phase to 29 for uplink 25
14:52:01:setup_element:INFO:	Setting the data phase to 29 for uplink 26
14:52:01:setup_element:INFO:	Setting the data phase to 33 for uplink 27
14:52:01:setup_element:INFO:	Setting the data phase to 31 for uplink 28
14:52:01:setup_element:INFO:	Setting the data phase to 33 for uplink 29
14:52:01:setup_element:INFO:	Setting the data phase to 36 for uplink 30
14:52:01:setup_element:INFO:	Setting the data phase to 34 for uplink 31
14:52:01:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 71
    Eye Windows:
      Uplink 16: _______________________________________________________________________XXXXXXXX_
      Uplink 17: _______________________________________________________________________XXXXXXXX_
      Uplink 18: ________________________________________________________________________________
      Uplink 19: ________________________________________________________________________________
      Uplink 20: ________________________________________________________________________________
      Uplink 21: ________________________________________________________________________________
      Uplink 22: _______________________________________________________________________XXXXXXXX_
      Uplink 23: _______________________________________________________________________XXXXXXXX_
      Uplink 24: _______________________________________________________________________XXXXXXX__
      Uplink 25: _______________________________________________________________________XXXXXXX__
      Uplink 26: ________________________________________________________________________XXXXXXXX
      Uplink 27: ________________________________________________________________________XXXXXXXX
      Uplink 28: _______________________________________________________________________XXXXXXX__
      Uplink 29: _______________________________________________________________________XXXXXXX__
      Uplink 30: ________________________________________________________________________XXXXXXX_
      Uplink 31: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 17
      Window Length: 37
      Eye Window: ____________________________________XXX_
    Uplink 17:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 20:
      Optimal Phase: 16
      Window Length: 36
      Eye Window: ___________________________________XXXX_
    Uplink 21:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 22:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 23:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 24:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 30:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
]
14:52:01:setup_element:INFO:	Beginning SMX ASICs map scan
14:52:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:52:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:52:01:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:52:01:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:52:01:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:52:01:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:52:01:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:52:01:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:52:01:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:52:01:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:52:01:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:52:01:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:52:01:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:52:01:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:52:02:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:52:02:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:52:02:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:52:02:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:52:02:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:52:02:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:52:02:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:52:03:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 71
    Eye Windows:
      Uplink 16: _______________________________________________________________________XXXXXXXX_
      Uplink 17: _______________________________________________________________________XXXXXXXX_
      Uplink 18: ________________________________________________________________________________
      Uplink 19: ________________________________________________________________________________
      Uplink 20: ________________________________________________________________________________
      Uplink 21: ________________________________________________________________________________
      Uplink 22: _______________________________________________________________________XXXXXXXX_
      Uplink 23: _______________________________________________________________________XXXXXXXX_
      Uplink 24: _______________________________________________________________________XXXXXXX__
      Uplink 25: _______________________________________________________________________XXXXXXX__
      Uplink 26: ________________________________________________________________________XXXXXXXX
      Uplink 27: ________________________________________________________________________XXXXXXXX
      Uplink 28: _______________________________________________________________________XXXXXXX__
      Uplink 29: _______________________________________________________________________XXXXXXX__
      Uplink 30: ________________________________________________________________________XXXXXXX_
      Uplink 31: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 17
      Window Length: 37
      Eye Window: ____________________________________XXX_
    Uplink 17:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 20:
      Optimal Phase: 16
      Window Length: 36
      Eye Window: ___________________________________XXXX_
    Uplink 21:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 22:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 23:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 24:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 30:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________

14:52:03:setup_element:INFO:	Performing Elink synchronization
14:52:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:52:03:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:52:04:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:52:04:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:52:04:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:52:04:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:52:04:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
14:52:05:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
14:52:05:febtest:INFO:	23-0 | XA-000-08-002-000-003-007-00 |  47.3 | 1159.7
14:52:05:febtest:INFO:	30-1 | XA-000-08-001-064-048-168-14 |  40.9 | 1177.4
14:52:05:febtest:INFO:	21-2 | XA-000-08-002-000-003-006-00 |  50.4 | 1153.7
14:52:06:febtest:INFO:	28-3 | XA-000-08-001-064-048-208-02 |  47.3 | 1165.6
14:52:06:febtest:INFO:	19-4 | XA-000-08-002-000-003-005-00 |  47.3 | 1153.7
14:52:06:febtest:INFO:	26-5 | XA-000-08-002-000-003-021-07 |  60.0 | 1112.1
14:52:06:febtest:INFO:	17-6 | XA-000-08-002-000-003-003-00 |  44.1 | 1171.5
14:52:07:febtest:INFO:	24-7 | XA-000-08-002-000-003-016-07 |  47.3 | 1153.7
14:52:07:ST3_smx:INFO:	Configuring SMX FAST
14:52:09:ST3_smx:INFO:	chip: 23-0 	 47.250730 C 	 1159.654860 mV
14:52:09:ST3_smx:INFO:		Electrons
14:52:09:ST3_smx:INFO:	# loops 0
14:52:11:ST3_smx:INFO:	# loops 1
14:52:12:ST3_smx:INFO:	# loops 2
14:52:14:ST3_smx:INFO:	# loops 3
14:52:16:ST3_smx:INFO:	# loops 4
14:52:18:ST3_smx:INFO:	Total # of broken channels: 0
14:52:18:ST3_smx:INFO:	List of broken channels: []
14:52:18:ST3_smx:INFO:	Total # of broken channels: 4
14:52:18:ST3_smx:INFO:	List of broken channels: [0, 2, 23, 27]
14:52:18:ST3_smx:INFO:	Configuring SMX FAST
14:52:21:ST3_smx:INFO:	chip: 30-1 	 50.430383 C 	 1153.732915 mV
14:52:21:ST3_smx:INFO:		Electrons
14:52:21:ST3_smx:INFO:	# loops 0
14:52:24:ST3_smx:INFO:	# loops 1
14:52:27:ST3_smx:INFO:	# loops 2
14:52:29:ST3_smx:INFO:	# loops 3
14:52:31:ST3_smx:INFO:	# loops 4
14:52:33:ST3_smx:INFO:	Total # of broken channels: 0
14:52:33:ST3_smx:INFO:	List of broken channels: []
14:52:33:ST3_smx:INFO:	Total # of broken channels: 0
14:52:33:ST3_smx:INFO:	List of broken channels: []
14:52:33:ST3_smx:INFO:	Configuring SMX FAST
14:52:35:ST3_smx:INFO:	chip: 21-2 	 47.250730 C 	 1171.483840 mV
14:52:35:ST3_smx:INFO:		Electrons
14:52:35:ST3_smx:INFO:	# loops 0
14:52:37:ST3_smx:INFO:	# loops 1
14:52:38:ST3_smx:INFO:	# loops 2
14:52:40:ST3_smx:INFO:	# loops 3
14:52:42:ST3_smx:INFO:	# loops 4
14:52:43:ST3_smx:INFO:	Total # of broken channels: 6
14:52:43:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 22]
14:52:43:ST3_smx:INFO:	Total # of broken channels: 12
14:52:43:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22]
14:52:44:ST3_smx:INFO:	Configuring SMX FAST
14:52:46:ST3_smx:INFO:	chip: 28-3 	 56.797143 C 	 1141.874115 mV
14:52:46:ST3_smx:INFO:		Electrons
14:52:46:ST3_smx:INFO:	# loops 0
14:52:47:ST3_smx:INFO:	# loops 1
14:52:49:ST3_smx:INFO:	# loops 2
14:52:51:ST3_smx:INFO:	# loops 3
14:52:52:ST3_smx:INFO:	# loops 4
14:52:54:ST3_smx:INFO:	Total # of broken channels: 1
14:52:54:ST3_smx:INFO:	List of broken channels: [69]
14:52:54:ST3_smx:INFO:	Total # of broken channels: 1
14:52:54:ST3_smx:INFO:	List of broken channels: [69]
14:52:54:ST3_smx:INFO:	Configuring SMX FAST
14:52:56:ST3_smx:INFO:	chip: 19-4 	 44.073563 C 	 1177.390875 mV
14:52:56:ST3_smx:INFO:		Electrons
14:52:56:ST3_smx:INFO:	# loops 0
14:52:58:ST3_smx:INFO:	# loops 1
14:52:59:ST3_smx:INFO:	# loops 2
14:53:01:ST3_smx:INFO:	# loops 3
14:53:03:ST3_smx:INFO:	# loops 4
14:53:04:ST3_smx:INFO:	Total # of broken channels: 0
14:53:04:ST3_smx:INFO:	List of broken channels: []
14:53:04:ST3_smx:INFO:	Total # of broken channels: 0
14:53:04:ST3_smx:INFO:	List of broken channels: []
14:53:05:ST3_smx:INFO:	Configuring SMX FAST
14:53:07:ST3_smx:INFO:	chip: 26-5 	 56.797143 C 	 1141.874115 mV
14:53:07:ST3_smx:INFO:		Electrons
14:53:07:ST3_smx:INFO:	# loops 0
14:53:08:ST3_smx:INFO:	# loops 1
14:53:10:ST3_smx:INFO:	# loops 2
14:53:12:ST3_smx:INFO:	# loops 3
14:53:13:ST3_smx:INFO:	# loops 4
14:53:15:ST3_smx:INFO:	Total # of broken channels: 0
14:53:15:ST3_smx:INFO:	List of broken channels: []
14:53:15:ST3_smx:INFO:	Total # of broken channels: 0
14:53:15:ST3_smx:INFO:	List of broken channels: []
14:53:15:ST3_smx:INFO:	Configuring SMX FAST
14:53:17:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1195.082160 mV
14:53:17:ST3_smx:INFO:		Electrons
14:53:17:ST3_smx:INFO:	# loops 0
14:53:18:ST3_smx:INFO:	# loops 1
14:53:20:ST3_smx:INFO:	# loops 2
14:53:22:ST3_smx:INFO:	# loops 3
14:53:23:ST3_smx:INFO:	# loops 4
14:53:25:ST3_smx:INFO:	Total # of broken channels: 1
14:53:25:ST3_smx:INFO:	List of broken channels: [0]
14:53:25:ST3_smx:INFO:	Total # of broken channels: 1
14:53:25:ST3_smx:INFO:	List of broken channels: [0]
14:53:25:ST3_smx:INFO:	Configuring SMX FAST
14:53:27:ST3_smx:INFO:	chip: 24-7 	 50.430383 C 	 1147.806000 mV
14:53:27:ST3_smx:INFO:		Electrons
14:53:27:ST3_smx:INFO:	# loops 0
14:53:29:ST3_smx:INFO:	# loops 1
14:53:30:ST3_smx:INFO:	# loops 2
14:53:32:ST3_smx:INFO:	# loops 3
14:53:34:ST3_smx:INFO:	# loops 4
14:53:35:ST3_smx:INFO:	Total # of broken channels: 0
14:53:35:ST3_smx:INFO:	List of broken channels: []
14:53:35:ST3_smx:INFO:	Total # of broken channels: 0
14:53:35:ST3_smx:INFO:	List of broken channels: []
14:53:36:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
14:53:36:febtest:INFO:	23-0 | XA-000-08-002-000-003-007-00 |  53.6 | 1159.7
14:53:36:febtest:INFO:	30-1 | XA-000-08-001-064-048-168-14 |  53.6 | 1153.7
14:53:36:febtest:INFO:	21-2 | XA-000-08-002-000-003-006-00 |  47.3 | 1171.5
14:53:37:febtest:INFO:	28-3 | XA-000-08-001-064-048-208-02 |  56.8 | 1141.9
14:53:37:febtest:INFO:	19-4 | XA-000-08-002-000-003-005-00 |  44.1 | 1171.5
14:53:37:febtest:INFO:	26-5 | XA-000-08-002-000-003-021-07 |  56.8 | 1141.9
14:53:37:febtest:INFO:	17-6 | XA-000-08-002-000-003-003-00 |  37.7 | 1195.1
14:53:38:febtest:INFO:	24-7 | XA-000-08-002-000-003-016-07 |  50.4 | 1147.8
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_11_30-14_51_13
OPERATOR  : Kerstin S.; Irakli K.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L3DL500114 M3DL5T2001142A2 124 C

FEB_SN : 2043
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	
MODULE_NAME:	L3DL500114 M3DL5T2001142A2 124 C

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['2.450', '1.9180', '1.851', '0.4952', '7.000', '1.5490', '7.000', '1.5490']
VI_after__Init : ['2.450', '2.0120', '1.850', '0.6192', '7.000', '1.5490', '7.000', '1.5490']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
14:53:48:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2043/TestDate_2023_11_30-14_51_13/