Go Back
FEB_2043 30.11.23 11:05:08
Info
11:04:59:febtest:INFO: FEB 8-2 selected
11:04:59:smx_tester:INFO: Setting Elink clock mode to 160 MHz
11:05:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:05:08:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
11:05:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:05:38:ST3_ModuleSelector:INFO: L3DL500114 M3DL5T2001142A2 124 C
11:05:38:ST3_ModuleSelector:INFO:
11:05:38:febtest:INFO: Testing FEB with SN 2043
11:05:39:smx_tester:INFO: Scanning setup
11:05:39:elinks:INFO: Disabling clock on downlink 0
11:05:39:elinks:INFO: Disabling clock on downlink 1
11:05:39:elinks:INFO: Disabling clock on downlink 2
11:05:39:elinks:INFO: Disabling clock on downlink 3
11:05:39:elinks:INFO: Disabling clock on downlink 4
11:05:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:05:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:40:elinks:INFO: Disabling clock on downlink 0
11:05:40:elinks:INFO: Disabling clock on downlink 1
11:05:40:elinks:INFO: Disabling clock on downlink 2
11:05:40:elinks:INFO: Disabling clock on downlink 3
11:05:40:elinks:INFO: Disabling clock on downlink 4
11:05:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:05:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:40:elinks:INFO: Disabling clock on downlink 0
11:05:40:elinks:INFO: Disabling clock on downlink 1
11:05:40:elinks:INFO: Disabling clock on downlink 2
11:05:40:elinks:INFO: Disabling clock on downlink 3
11:05:40:elinks:INFO: Disabling clock on downlink 4
11:05:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:05:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:05:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:40:elinks:INFO: Disabling clock on downlink 0
11:05:40:elinks:INFO: Disabling clock on downlink 1
11:05:40:elinks:INFO: Disabling clock on downlink 2
11:05:40:elinks:INFO: Disabling clock on downlink 3
11:05:40:elinks:INFO: Disabling clock on downlink 4
11:05:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:05:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:40:elinks:INFO: Disabling clock on downlink 0
11:05:40:elinks:INFO: Disabling clock on downlink 1
11:05:40:elinks:INFO: Disabling clock on downlink 2
11:05:40:elinks:INFO: Disabling clock on downlink 3
11:05:40:elinks:INFO: Disabling clock on downlink 4
11:05:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:05:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:05:40:setup_element:INFO: Scanning clock phase
11:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:05:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:05:41:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:05:41:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:05:41:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:05:41:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:05:41:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:05:41:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:05:41:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:05:41:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:05:41:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
11:05:41:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:05:41:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:05:41:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:05:41:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
11:05:41:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:05:41:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:05:41:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:05:41:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:05:41:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2
11:05:41:setup_element:INFO: Scanning data phases
11:05:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:05:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:05:46:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:05:46:setup_element:INFO: Eye window for uplink 16: ____________________________________XXX_
Data delay found: 17
11:05:46:setup_element:INFO: Eye window for uplink 17: _______________________________XXXXX____
Data delay found: 13
11:05:46:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
11:05:46:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
11:05:46:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXX_
Data delay found: 16
11:05:46:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
11:05:46:setup_element:INFO: Eye window for uplink 22: X___________________________________XXXX
Data delay found: 18
11:05:46:setup_element:INFO: Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
11:05:46:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
11:05:46:setup_element:INFO: Eye window for uplink 25: ________XXXX____________________________
Data delay found: 29
11:05:46:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________
Data delay found: 29
11:05:46:setup_element:INFO: Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
11:05:46:setup_element:INFO: Eye window for uplink 28: _________XXXXXX_________________________
Data delay found: 31
11:05:46:setup_element:INFO: Eye window for uplink 29: ___________XXXXX________________________
Data delay found: 33
11:05:46:setup_element:INFO: Eye window for uplink 30: _____________XXXXX______________________
Data delay found: 35
11:05:46:setup_element:INFO: Eye window for uplink 31: ____________XXXX________________________
Data delay found: 33
11:05:46:setup_element:INFO: Setting the data phase to 17 for uplink 16
11:05:46:setup_element:INFO: Setting the data phase to 13 for uplink 17
11:05:46:setup_element:INFO: Setting the data phase to 18 for uplink 18
11:05:46:setup_element:INFO: Setting the data phase to 15 for uplink 19
11:05:46:setup_element:INFO: Setting the data phase to 16 for uplink 20
11:05:46:setup_element:INFO: Setting the data phase to 15 for uplink 21
11:05:46:setup_element:INFO: Setting the data phase to 18 for uplink 22
11:05:46:setup_element:INFO: Setting the data phase to 15 for uplink 23
11:05:46:setup_element:INFO: Setting the data phase to 27 for uplink 24
11:05:46:setup_element:INFO: Setting the data phase to 29 for uplink 25
11:05:46:setup_element:INFO: Setting the data phase to 29 for uplink 26
11:05:46:setup_element:INFO: Setting the data phase to 33 for uplink 27
11:05:46:setup_element:INFO: Setting the data phase to 31 for uplink 28
11:05:46:setup_element:INFO: Setting the data phase to 33 for uplink 29
11:05:46:setup_element:INFO: Setting the data phase to 35 for uplink 30
11:05:46:setup_element:INFO: Setting the data phase to 33 for uplink 31
11:05:46:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 71
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: _______________________________________________________________________XXXXXXX__
Uplink 18: ________________________________________________________________________XXXXXXX_
Uplink 19: ________________________________________________________________________XXXXXXX_
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: _______________________________________________________________________XXXXXXXXX
Uplink 23: _______________________________________________________________________XXXXXXXXX
Uplink 24: _______________________________________________________________________XXXXXXXX_
Uplink 25: _______________________________________________________________________XXXXXXXX_
Uplink 26: ________________________________________________________________________XXXXXXXX
Uplink 27: ________________________________________________________________________XXXXXXXX
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: ________________________________________________________________________XXXXXXX_
Uplink 31: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 37
Eye Window: ____________________________________XXX_
Uplink 17:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 20:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 21:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 22:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 23:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 26:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 29:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 30:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 31:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
]
11:05:46:setup_element:INFO: Beginning SMX ASICs map scan
11:05:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:05:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:05:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:05:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:05:46:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:05:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:05:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:05:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:05:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:05:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:05:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:05:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:05:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:05:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:05:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:05:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:05:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:05:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:05:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:05:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:05:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:05:49:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 71
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: _______________________________________________________________________XXXXXXX__
Uplink 18: ________________________________________________________________________XXXXXXX_
Uplink 19: ________________________________________________________________________XXXXXXX_
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: _______________________________________________________________________XXXXXXXXX
Uplink 23: _______________________________________________________________________XXXXXXXXX
Uplink 24: _______________________________________________________________________XXXXXXXX_
Uplink 25: _______________________________________________________________________XXXXXXXX_
Uplink 26: ________________________________________________________________________XXXXXXXX
Uplink 27: ________________________________________________________________________XXXXXXXX
Uplink 28: _______________________________________________________________________XXXXXXXX_
Uplink 29: _______________________________________________________________________XXXXXXXX_
Uplink 30: ________________________________________________________________________XXXXXXX_
Uplink 31: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 37
Eye Window: ____________________________________XXX_
Uplink 17:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 20:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 21:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 22:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 23:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 26:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 29:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 30:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 31:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
11:05:49:setup_element:INFO: Performing Elink synchronization
11:05:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:05:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:05:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:05:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:05:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:05:49:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:05:50:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
11:05:50:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:05:50:febtest:INFO: 23-0 | XA-000-08-002-000-003-007-00 | 50.4 | 1153.7
11:05:51:febtest:INFO: 30-1 | XA-000-08-001-064-048-168-14 | 47.3 | 1165.6
11:05:51:febtest:INFO: 21-2 | XA-000-08-002-000-003-006-00 | 50.4 | 1153.7
11:05:51:febtest:INFO: 28-3 | XA-000-08-001-064-048-208-02 | 47.3 | 1165.6
11:05:51:febtest:INFO: 19-4 | XA-000-08-002-000-003-005-00 | 47.3 | 1153.7
11:05:52:febtest:INFO: 26-5 | XA-000-08-002-000-003-021-07 | 60.0 | 1112.1
11:05:52:febtest:INFO: 17-6 | XA-000-08-002-000-003-003-00 | 40.9 | 1177.4
11:05:52:febtest:INFO: 24-7 | XA-000-08-002-000-003-016-07 | 47.3 | 1153.7
11:05:52:ST3_smx:INFO: Configuring SMX FAST
11:05:54:ST3_smx:INFO: chip: 23-0 47.250730 C 1159.654860 mV
11:05:54:ST3_smx:INFO: Electrons
11:05:54:ST3_smx:INFO: # loops 0
11:05:56:ST3_smx:INFO: # loops 1
11:05:58:ST3_smx:INFO: # loops 2
11:05:59:ST3_smx:INFO: # loops 3
11:06:01:ST3_smx:INFO: # loops 4
11:06:03:ST3_smx:INFO: Total # of broken channels: 0
11:06:03:ST3_smx:INFO: List of broken channels: []
11:06:03:ST3_smx:INFO: Total # of broken channels: 1
11:06:03:ST3_smx:INFO: List of broken channels: [0]
11:06:03:ST3_smx:INFO: Configuring SMX FAST
11:06:05:ST3_smx:INFO: chip: 30-1 50.430383 C 1153.732915 mV
11:06:05:ST3_smx:INFO: Electrons
11:06:05:ST3_smx:INFO: # loops 0
11:06:07:ST3_smx:INFO: # loops 1
11:06:08:ST3_smx:INFO: # loops 2
11:06:10:ST3_smx:INFO: # loops 3
11:06:12:ST3_smx:INFO: # loops 4
11:06:13:ST3_smx:INFO: Total # of broken channels: 0
11:06:13:ST3_smx:INFO: List of broken channels: []
11:06:13:ST3_smx:INFO: Total # of broken channels: 0
11:06:13:ST3_smx:INFO: List of broken channels: []
11:06:13:ST3_smx:INFO: Configuring SMX FAST
11:06:15:ST3_smx:INFO: chip: 21-2 47.250730 C 1171.483840 mV
11:06:15:ST3_smx:INFO: Electrons
11:06:15:ST3_smx:INFO: # loops 0
11:06:17:ST3_smx:INFO: # loops 1
11:06:19:ST3_smx:INFO: # loops 2
11:06:20:ST3_smx:INFO: # loops 3
11:06:22:ST3_smx:INFO: # loops 4
11:06:23:ST3_smx:INFO: Total # of broken channels: 0
11:06:23:ST3_smx:INFO: List of broken channels: []
11:06:23:ST3_smx:INFO: Total # of broken channels: 3
11:06:23:ST3_smx:INFO: List of broken channels: [0, 4, 10]
11:06:24:ST3_smx:INFO: Configuring SMX FAST
11:06:26:ST3_smx:INFO: chip: 28-3 56.797143 C 1141.874115 mV
11:06:26:ST3_smx:INFO: Electrons
11:06:26:ST3_smx:INFO: # loops 0
11:06:27:ST3_smx:INFO: # loops 1
11:06:29:ST3_smx:INFO: # loops 2
11:06:31:ST3_smx:INFO: # loops 3
11:06:32:ST3_smx:INFO: # loops 4
11:06:34:ST3_smx:INFO: Total # of broken channels: 0
11:06:34:ST3_smx:INFO: List of broken channels: []
11:06:34:ST3_smx:INFO: Total # of broken channels: 1
11:06:34:ST3_smx:INFO: List of broken channels: [69]
11:06:34:ST3_smx:INFO: Configuring SMX FAST
11:06:36:ST3_smx:INFO: chip: 19-4 47.250730 C 1171.483840 mV
11:06:36:ST3_smx:INFO: Electrons
11:06:36:ST3_smx:INFO: # loops 0
11:06:38:ST3_smx:INFO: # loops 1
11:06:39:ST3_smx:INFO: # loops 2
11:06:41:ST3_smx:INFO: # loops 3
11:06:43:ST3_smx:INFO: # loops 4
11:06:44:ST3_smx:INFO: Total # of broken channels: 0
11:06:44:ST3_smx:INFO: List of broken channels: []
11:06:44:ST3_smx:INFO: Total # of broken channels: 0
11:06:44:ST3_smx:INFO: List of broken channels: []
11:06:44:ST3_smx:INFO: Configuring SMX FAST
11:06:46:ST3_smx:INFO: chip: 26-5 56.797143 C 1135.937260 mV
11:06:46:ST3_smx:INFO: Electrons
11:06:46:ST3_smx:INFO: # loops 0
11:06:48:ST3_smx:INFO: # loops 1
11:06:50:ST3_smx:INFO: # loops 2
11:06:51:ST3_smx:INFO: # loops 3
11:06:53:ST3_smx:INFO: # loops 4
11:06:54:ST3_smx:INFO: Total # of broken channels: 0
11:06:54:ST3_smx:INFO: List of broken channels: []
11:06:54:ST3_smx:INFO: Total # of broken channels: 0
11:06:54:ST3_smx:INFO: List of broken channels: []
11:06:55:ST3_smx:INFO: Configuring SMX FAST
11:06:57:ST3_smx:INFO: chip: 17-6 40.898880 C 1195.082160 mV
11:06:57:ST3_smx:INFO: Electrons
11:06:57:ST3_smx:INFO: # loops 0
11:06:58:ST3_smx:INFO: # loops 1
11:07:00:ST3_smx:INFO: # loops 2
11:07:02:ST3_smx:INFO: # loops 3
11:07:03:ST3_smx:INFO: # loops 4
11:07:05:ST3_smx:INFO: Total # of broken channels: 0
11:07:05:ST3_smx:INFO: List of broken channels: []
11:07:05:ST3_smx:INFO: Total # of broken channels: 1
11:07:05:ST3_smx:INFO: List of broken channels: [0]
11:07:05:ST3_smx:INFO: Configuring SMX FAST
11:07:07:ST3_smx:INFO: chip: 24-7 53.612520 C 1141.874115 mV
11:07:07:ST3_smx:INFO: Electrons
11:07:07:ST3_smx:INFO: # loops 0
11:07:09:ST3_smx:INFO: # loops 1
11:07:10:ST3_smx:INFO: # loops 2
11:07:12:ST3_smx:INFO: # loops 3
11:07:13:ST3_smx:INFO: # loops 4
11:07:15:ST3_smx:INFO: Total # of broken channels: 0
11:07:15:ST3_smx:INFO: List of broken channels: []
11:07:15:ST3_smx:INFO: Total # of broken channels: 0
11:07:15:ST3_smx:INFO: List of broken channels: []
11:07:15:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:07:16:febtest:INFO: 23-0 | XA-000-08-002-000-003-007-00 | 53.6 | 1159.7
11:07:16:febtest:INFO: 30-1 | XA-000-08-001-064-048-168-14 | 53.6 | 1153.7
11:07:16:febtest:INFO: 21-2 | XA-000-08-002-000-003-006-00 | 50.4 | 1171.5
11:07:16:febtest:INFO: 28-3 | XA-000-08-001-064-048-208-02 | 60.0 | 1141.9
11:07:17:febtest:INFO: 19-4 | XA-000-08-002-000-003-005-00 | 47.3 | 1171.5
11:07:17:febtest:INFO: 26-5 | XA-000-08-002-000-003-021-07 | 56.8 | 1135.9
11:07:17:febtest:INFO: 17-6 | XA-000-08-002-000-003-003-00 | 40.9 | 1195.1
11:07:17:febtest:INFO: 24-7 | XA-000-08-002-000-003-016-07 | 53.6 | 1147.8
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_11_30-11_05_08
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L3DL500114 M3DL5T2001142A2 124 C
FEB_SN : 0
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:
MODULE_NAME: L3DL500114 M3DL5T2001142A2 124 C11:09:57:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2054/TestDate_2023_11_30-11_05_08/
MODULE_TYPE:
MODULE_LADDER: L3DL500114
MODULE_MODULE: M3DL5T1001141A2
MODULE_SIZE: 62
MODULE_GRADE: C
---------------------------------------
VI_before_Init : ['2.450', '1.9240', '1.851', '0.4924', '7.000', '1.5510', '7.000', '1.5510']
VI_after__Init : ['2.450', '2.0240', '1.850', '0.6200', '7.000', '1.5520', '7.000', '1.5520']
VI_at__the_End : ['2.450', '2.0170', '1.850', '0.3185', '7.000', '1.5510', '7.000', '1.5510']