13:03:58:febtest:INFO:	FEB 8-2 B @ GSI
13:04:22:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:04:22:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
13:04:22:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:04:23:febtest:INFO:	Tsting FEB with SN 2044
13:04:24:smx_tester:INFO:	Scanning setup
13:04:24:elinks:INFO:	Disabling clock on downlink 0
13:04:24:elinks:INFO:	Disabling clock on downlink 1
13:04:24:elinks:INFO:	Disabling clock on downlink 2
13:04:24:elinks:INFO:	Disabling clock on downlink 3
13:04:24:elinks:INFO:	Disabling clock on downlink 4
13:04:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:04:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 1
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 2
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 3
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 4
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 5
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 6
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 7
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 8
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 9
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 10
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 11
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 12
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 13
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 14
13:04:24:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 15
13:04:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:04:24:elinks:INFO:	Disabling clock on downlink 0
13:04:24:elinks:INFO:	Disabling clock on downlink 1
13:04:24:elinks:INFO:	Disabling clock on downlink 2
13:04:24:elinks:INFO:	Disabling clock on downlink 3
13:04:24:elinks:INFO:	Disabling clock on downlink 4
13:04:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:04:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:04:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:04:24:elinks:INFO:	Disabling clock on downlink 0
13:04:24:elinks:INFO:	Disabling clock on downlink 1
13:04:24:elinks:INFO:	Disabling clock on downlink 2
13:04:24:elinks:INFO:	Disabling clock on downlink 3
13:04:24:elinks:INFO:	Disabling clock on downlink 4
13:04:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:04:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:04:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:04:24:elinks:INFO:	Disabling clock on downlink 0
13:04:24:elinks:INFO:	Disabling clock on downlink 1
13:04:24:elinks:INFO:	Disabling clock on downlink 2
13:04:24:elinks:INFO:	Disabling clock on downlink 3
13:04:24:elinks:INFO:	Disabling clock on downlink 4
13:04:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:04:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:04:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:04:24:elinks:INFO:	Disabling clock on downlink 0
13:04:24:elinks:INFO:	Disabling clock on downlink 1
13:04:24:elinks:INFO:	Disabling clock on downlink 2
13:04:24:elinks:INFO:	Disabling clock on downlink 3
13:04:24:elinks:INFO:	Disabling clock on downlink 4
13:04:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:04:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:04:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:04:25:setup_element:INFO:	Scanning clock phase
13:04:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:04:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:04:25:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
13:04:25:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:04:25:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:04:25:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:04:25:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
13:04:25:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:04:25:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:04:25:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:04:25:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:04:25:setup_element:INFO:	Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:04:25:setup_element:INFO:	Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:04:25:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:04:25:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:04:25:setup_element:INFO:	Eye window for uplink 12: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
13:04:25:setup_element:INFO:	Eye window for uplink 13: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
13:04:25:setup_element:INFO:	Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
13:04:25:setup_element:INFO:	Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
13:04:25:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 0
13:04:25:setup_element:INFO:	Scanning data phases
13:04:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:04:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:04:31:setup_element:INFO:	Data phase scan results for group 0, downlink 0
13:04:31:setup_element:INFO:	Eye window for uplink 0 : ______________________________XXXXX_____
Data delay found: 12
13:04:31:setup_element:INFO:	Eye window for uplink 1 : ___________________________XXXXX________
Data delay found: 9
13:04:31:setup_element:INFO:	Eye window for uplink 2 : ___________________________XXXXX________
Data delay found: 9
13:04:31:setup_element:INFO:	Eye window for uplink 3 : _________________________XXXXXX_________
Data delay found: 7
13:04:31:setup_element:INFO:	Eye window for uplink 4 : _____________________________XXXXXX_____
Data delay found: 11
13:04:31:setup_element:INFO:	Eye window for uplink 5 : _________________________XXXXX__________
Data delay found: 7
13:04:31:setup_element:INFO:	Eye window for uplink 6 : ___________________________XXXXX________
Data delay found: 9
13:04:31:setup_element:INFO:	Eye window for uplink 7 : _______________________XXXXX____________
Data delay found: 5
13:04:31:setup_element:INFO:	Eye window for uplink 8 : __________________________________XXXX__
Data delay found: 15
13:04:31:setup_element:INFO:	Eye window for uplink 9 : XXX__________________________________XXX
Data delay found: 19
13:04:31:setup_element:INFO:	Eye window for uplink 10: XXXXXX_________________________________X
Data delay found: 22
13:04:31:setup_element:INFO:	Eye window for uplink 11: ____XXXXXX______________________________
Data delay found: 26
13:04:31:setup_element:INFO:	Eye window for uplink 12: _____XXXXX______________________________
Data delay found: 27
13:04:31:setup_element:INFO:	Eye window for uplink 13: ________XXXXXX__________________________
Data delay found: 30
13:04:31:setup_element:INFO:	Eye window for uplink 14: _______XXXXX____________________________
Data delay found: 29
13:04:31:setup_element:INFO:	Eye window for uplink 15: __________XXXXXX________________________
Data delay found: 32
13:04:31:setup_element:INFO:	Setting the data phase to 12 for uplink 0
13:04:31:setup_element:INFO:	Setting the data phase to 9 for uplink 1
13:04:31:setup_element:INFO:	Setting the data phase to 9 for uplink 2
13:04:31:setup_element:INFO:	Setting the data phase to 7 for uplink 3
13:04:31:setup_element:INFO:	Setting the data phase to 11 for uplink 4
13:04:31:setup_element:INFO:	Setting the data phase to 7 for uplink 5
13:04:31:setup_element:INFO:	Setting the data phase to 9 for uplink 6
13:04:31:setup_element:INFO:	Setting the data phase to 5 for uplink 7
13:04:31:setup_element:INFO:	Setting the data phase to 15 for uplink 8
13:04:31:setup_element:INFO:	Setting the data phase to 19 for uplink 9
13:04:31:setup_element:INFO:	Setting the data phase to 22 for uplink 10
13:04:31:setup_element:INFO:	Setting the data phase to 26 for uplink 11
13:04:31:setup_element:INFO:	Setting the data phase to 27 for uplink 12
13:04:31:setup_element:INFO:	Setting the data phase to 30 for uplink 13
13:04:31:setup_element:INFO:	Setting the data phase to 29 for uplink 14
13:04:31:setup_element:INFO:	Setting the data phase to 32 for uplink 15
13:04:31:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 69
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXX__
      Uplink  1: _______________________________________________________________________XXXXXXX__
      Uplink  2: ______________________________________________________________________XXXXXXXXX_
      Uplink  3: ______________________________________________________________________XXXXXXXXX_
      Uplink  4: ______________________________________________________________________XXXXXXXX__
      Uplink  5: ______________________________________________________________________XXXXXXXX__
      Uplink  6: ______________________________________________________________________XXXXXXXX__
      Uplink  7: ______________________________________________________________________XXXXXXXX__
      Uplink  8: _______________________________________________________________________XXXXXX___
      Uplink  9: _______________________________________________________________________XXXXXX___
      Uplink 10: _______________________________________________________________________XXXXXXXXX
      Uplink 11: _______________________________________________________________________XXXXXXXXX
      Uplink 12: X_______________________________________________________________________XXXXXXXX
      Uplink 13: X_______________________________________________________________________XXXXXXXX
      Uplink 14: __________________________________________________________________________XXXXX_
      Uplink 15: __________________________________________________________________________XXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 1:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 2:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 3:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 4:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 5:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 6:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 7:
      Optimal Phase: 5
      Window Length: 35
      Eye Window: _______________________XXXXX____________
    Uplink 8:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 9:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 10:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: XXXXXX_________________________________X
    Uplink 11:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 12:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 13:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 14:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 15:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
]
13:04:31:setup_element:INFO:	Beginning SMX ASICs map scan
13:04:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:04:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:04:31:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
13:04:31:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
13:04:31:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:04:31:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 7
13:04:31:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 6
13:04:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 14
13:04:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 15
13:04:31:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 5
13:04:31:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 4
13:04:31:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 12
13:04:31:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 13
13:04:32:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 3
13:04:32:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 2
13:04:32:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 10
13:04:32:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 11
13:04:32:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 1
13:04:32:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 0
13:04:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 8
13:04:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 9
13:04:33:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 69
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXX__
      Uplink  1: _______________________________________________________________________XXXXXXX__
      Uplink  2: ______________________________________________________________________XXXXXXXXX_
      Uplink  3: ______________________________________________________________________XXXXXXXXX_
      Uplink  4: ______________________________________________________________________XXXXXXXX__
      Uplink  5: ______________________________________________________________________XXXXXXXX__
      Uplink  6: ______________________________________________________________________XXXXXXXX__
      Uplink  7: ______________________________________________________________________XXXXXXXX__
      Uplink  8: _______________________________________________________________________XXXXXX___
      Uplink  9: _______________________________________________________________________XXXXXX___
      Uplink 10: _______________________________________________________________________XXXXXXXXX
      Uplink 11: _______________________________________________________________________XXXXXXXXX
      Uplink 12: X_______________________________________________________________________XXXXXXXX
      Uplink 13: X_______________________________________________________________________XXXXXXXX
      Uplink 14: __________________________________________________________________________XXXXX_
      Uplink 15: __________________________________________________________________________XXXXX_
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 1:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 2:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 3:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 4:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 5:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 6:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 7:
      Optimal Phase: 5
      Window Length: 35
      Eye Window: _______________________XXXXX____________
    Uplink 8:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 9:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 10:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: XXXXXX_________________________________X
    Uplink 11:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 12:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 13:
      Optimal Phase: 30
      Window Length: 34
      Eye Window: ________XXXXXX__________________________
    Uplink 14:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 15:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________

13:04:33:setup_element:INFO:	Performing Elink synchronization
13:04:33:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:04:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:04:33:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
13:04:33:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
13:04:33:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
13:04:33:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:04:34:ST3_emu:INFO:	Number of chips: 8
13:04:34:ST3_emu:INFO:	Chip address:  	0x0
13:04:34:ST3_emu:INFO:	Chip address:  	0x1
13:04:34:ST3_emu:INFO:	Chip address:  	0x2
13:04:34:ST3_emu:INFO:	Chip address:  	0x3
13:04:34:ST3_emu:INFO:	Chip address:  	0x4
13:04:34:ST3_emu:INFO:	Chip address:  	0x5
13:04:34:ST3_emu:INFO:	Chip address:  	0x6
13:04:34:ST3_emu:INFO:	Chip address:  	0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
13:04:34:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:04:35:febtest:INFO:	0-0 | XA-000-08-002-000-000-019-09 |  50.4 | 1147.8
13:04:35:febtest:INFO:	0-1 | XA-000-08-002-000-006-117-07 |  40.9 | 1171.5
13:04:35:febtest:INFO:	0-2 | XA-000-08-002-000-000-024-09 |  28.2 | 1230.3
13:04:35:febtest:INFO:	0-3 | XA-000-08-002-000-006-116-07 |  31.4 | 1206.9
13:04:36:febtest:INFO:	0-4 | XA-000-08-002-000-000-042-00 |  28.2 | 1212.7
13:04:36:febtest:INFO:	0-5 | XA-000-08-002-000-006-114-07 |  21.9 | 1212.7
13:04:36:febtest:INFO:	0-6 | XA-000-08-002-000-000-040-00 |  50.4 | 1147.8
13:04:36:febtest:INFO:	0-7 | XA-000-08-002-000-006-113-07 |  50.4 | 1130.0
13:04:36:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:04:40:ST3_smx:INFO:	chip: 0-0 	 47.250730 C 	 1141.874115 mV
13:04:40:ST3_smx:INFO:	# loops 0
13:04:41:ST3_smx:INFO:	# loops 1
13:04:43:ST3_smx:INFO:	# loops 2
13:04:45:ST3_smx:INFO:	# loops 3
13:04:46:ST3_smx:INFO:	# loops 4
13:04:48:ST3_smx:INFO:	Total # of broken channels: 0
13:04:48:ST3_smx:INFO:	List of broken channels: []
13:04:48:ST3_smx:INFO:	Total # of broken channels: 0
13:04:48:ST3_smx:INFO:	List of broken channels: []
13:04:49:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:04:52:ST3_smx:INFO:	chip: 0-1 	 40.898880 C 	 1159.654860 mV
13:04:52:ST3_smx:INFO:	# loops 0
13:04:54:ST3_smx:INFO:	# loops 1
13:04:55:ST3_smx:INFO:	# loops 2
13:04:57:ST3_smx:INFO:	# loops 3
13:04:59:ST3_smx:INFO:	# loops 4
13:05:00:ST3_smx:INFO:	Total # of broken channels: 0
13:05:00:ST3_smx:INFO:	List of broken channels: []
13:05:00:ST3_smx:INFO:	Total # of broken channels: 0
13:05:00:ST3_smx:INFO:	List of broken channels: []
13:05:01:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:05:04:ST3_smx:INFO:	chip: 0-2 	 40.898880 C 	 1165.571835 mV
13:05:04:ST3_smx:INFO:	# loops 0
13:05:06:ST3_smx:INFO:	# loops 1
13:05:08:ST3_smx:INFO:	# loops 2
13:05:09:ST3_smx:INFO:	# loops 3
13:05:11:ST3_smx:INFO:	# loops 4
13:05:12:ST3_smx:INFO:	Total # of broken channels: 0
13:05:12:ST3_smx:INFO:	List of broken channels: []
13:05:12:ST3_smx:INFO:	Total # of broken channels: 0
13:05:12:ST3_smx:INFO:	List of broken channels: []
13:05:13:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:05:17:ST3_smx:INFO:	chip: 0-3 	 37.726682 C 	 1165.571835 mV
13:05:17:ST3_smx:INFO:	# loops 0
13:05:18:ST3_smx:INFO:	# loops 1
13:05:20:ST3_smx:INFO:	# loops 2
13:05:21:ST3_smx:INFO:	# loops 3
13:05:23:ST3_smx:INFO:	# loops 4
13:05:25:ST3_smx:INFO:	Total # of broken channels: 0
13:05:25:ST3_smx:INFO:	List of broken channels: []
13:05:25:ST3_smx:INFO:	Total # of broken channels: 0
13:05:25:ST3_smx:INFO:	List of broken channels: []
13:05:25:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:05:29:ST3_smx:INFO:	chip: 0-4 	 34.556970 C 	 1177.390875 mV
13:05:29:ST3_smx:INFO:	# loops 0
13:05:31:ST3_smx:INFO:	# loops 1
13:05:32:ST3_smx:INFO:	# loops 2
13:05:34:ST3_smx:INFO:	# loops 3
13:05:35:ST3_smx:INFO:	# loops 4
13:05:37:ST3_smx:INFO:	Total # of broken channels: 0
13:05:37:ST3_smx:INFO:	List of broken channels: []
13:05:37:ST3_smx:INFO:	Total # of broken channels: 0
13:05:37:ST3_smx:INFO:	List of broken channels: []
13:05:38:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:05:41:ST3_smx:ERROR:	Wrong readback, reg. (121, 55) in 128 out 144
13:05:41:ST3_smx:INFO:	chip: 0-5 	 28.225000 C 	 1200.969315 mV
13:05:41:ST3_smx:INFO:	# loops 0
13:05:43:ST3_smx:INFO:	# loops 1
13:05:45:ST3_smx:INFO:	# loops 2
13:05:46:ST3_smx:INFO:	# loops 3
13:05:48:ST3_smx:INFO:	# loops 4
13:05:49:ST3_smx:INFO:	Total # of broken channels: 0
13:05:49:ST3_smx:INFO:	List of broken channels: []
13:05:49:ST3_smx:INFO:	Total # of broken channels: 0
13:05:49:ST3_smx:INFO:	List of broken channels: []
13:05:50:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:05:54:ST3_smx:INFO:	chip: 0-6 	 47.250730 C 	 1141.874115 mV
13:05:54:ST3_smx:INFO:	# loops 0
13:05:55:ST3_smx:INFO:	# loops 1
13:05:57:ST3_smx:INFO:	# loops 2
13:05:58:ST3_smx:INFO:	# loops 3
13:06:00:ST3_smx:INFO:	# loops 4
13:06:02:ST3_smx:INFO:	Total # of broken channels: 0
13:06:02:ST3_smx:INFO:	List of broken channels: []
13:06:02:ST3_smx:INFO:	Total # of broken channels: 0
13:06:02:ST3_smx:INFO:	List of broken channels: []
13:06:02:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
13:06:06:ST3_smx:INFO:	chip: 0-7 	 50.430383 C 	 1124.048640 mV
13:06:06:ST3_smx:INFO:	# loops 0
13:06:08:ST3_smx:INFO:	# loops 1
13:06:09:ST3_smx:INFO:	# loops 2
13:06:11:ST3_smx:INFO:	# loops 3
13:06:13:ST3_smx:INFO:	# loops 4
13:06:14:ST3_smx:INFO:	Total # of broken channels: 0
13:06:14:ST3_smx:INFO:	List of broken channels: []
13:06:14:ST3_smx:INFO:	Total # of broken channels: 0
13:06:14:ST3_smx:INFO:	List of broken channels: []
13:06:15:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:06:15:febtest:INFO:	0-0 | XA-000-08-002-000-000-019-09 |  53.6 | 1130.0
13:06:15:febtest:INFO:	0-1 | XA-000-08-002-000-006-117-07 |  44.1 | 1147.8
13:06:15:febtest:INFO:	0-2 | XA-000-08-002-000-000-024-09 |  44.1 | 1159.7
13:06:16:febtest:INFO:	0-3 | XA-000-08-002-000-006-116-07 |  40.9 | 1159.7
13:06:16:febtest:INFO:	0-4 | XA-000-08-002-000-000-042-00 |  37.7 | 1177.4
13:06:16:febtest:INFO:	0-5 | XA-000-08-002-000-006-114-07 |  28.2 | 1195.1
13:06:16:febtest:INFO:	0-6 | XA-000-08-002-000-000-040-00 |  50.4 | 1135.9
13:06:16:febtest:INFO:	0-7 | XA-000-08-002-000-006-113-07 |  50.4 | 1124.0
13:06:21:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2044/TestDate_2023_11_15-13_04_22/