FEB_2046 16.10.23 10:54:49
Info
10:51:58:ST3_hmp4040:INFO:
10:51:58:febtest:INFO: FEB8.2 selected
10:52:01:ST3_Shared:INFO: Listo of operators:Oleksandr S.;
10:52:09:febtest:INFO: FEB 8-2 B @ GSI
10:52:16:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:52:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:52:19:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:52:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:52:19:febtest:INFO: Tsting FEB with SN 2046
10:52:20:smx_tester:INFO: Scanning setup
10:52:20:elinks:INFO: Disabling clock on downlink 0
10:52:20:elinks:INFO: Disabling clock on downlink 1
10:52:20:elinks:INFO: Disabling clock on downlink 2
10:52:20:elinks:INFO: Disabling clock on downlink 3
10:52:20:elinks:INFO: Disabling clock on downlink 4
10:52:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:52:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:52:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:52:20:elinks:INFO: Disabling clock on downlink 0
10:52:20:elinks:INFO: Disabling clock on downlink 1
10:52:20:elinks:INFO: Disabling clock on downlink 2
10:52:20:elinks:INFO: Disabling clock on downlink 3
10:52:20:elinks:INFO: Disabling clock on downlink 4
10:52:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:52:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:52:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:52:20:elinks:INFO: Disabling clock on downlink 0
10:52:20:elinks:INFO: Disabling clock on downlink 1
10:52:20:elinks:INFO: Disabling clock on downlink 2
10:52:20:elinks:INFO: Disabling clock on downlink 3
10:52:20:elinks:INFO: Disabling clock on downlink 4
10:52:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:52:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:52:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:52:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:52:20:elinks:INFO: Disabling clock on downlink 0
10:52:20:elinks:INFO: Disabling clock on downlink 1
10:52:20:elinks:INFO: Disabling clock on downlink 2
10:52:20:elinks:INFO: Disabling clock on downlink 3
10:52:20:elinks:INFO: Disabling clock on downlink 4
10:52:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:52:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:52:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:52:21:elinks:INFO: Disabling clock on downlink 0
10:52:21:elinks:INFO: Disabling clock on downlink 1
10:52:21:elinks:INFO: Disabling clock on downlink 2
10:52:21:elinks:INFO: Disabling clock on downlink 3
10:52:21:elinks:INFO: Disabling clock on downlink 4
10:52:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:52:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:52:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:52:21:setup_element:INFO: Scanning clock phase
10:52:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:52:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:52:21:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:52:21:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:52:21:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:52:21:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:52:21:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:52:21:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:52:21:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
10:52:21:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:52:21:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:52:21:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:52:21:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:52:21:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:52:21:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:52:21:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:52:21:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:52:21:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:52:21:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:52:21:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:52:21:setup_element:INFO: Scanning data phases
10:52:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:52:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:52:26:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:52:26:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
10:52:26:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
10:52:26:setup_element:INFO: Eye window for uplink 18: XXX_________________________________XXXX
Data delay found: 19
10:52:26:setup_element:INFO: Eye window for uplink 19: __________________________________XXXX__
Data delay found: 15
10:52:26:setup_element:INFO: Eye window for uplink 20: XXXX__________________________________XX
Data delay found: 20
10:52:26:setup_element:INFO: Eye window for uplink 21: XXX__________________________________XXX
Data delay found: 19
10:52:26:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
10:52:26:setup_element:INFO: Eye window for uplink 23: X__________________________________XXXXX
Data delay found: 17
10:52:26:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
10:52:26:setup_element:INFO: Eye window for uplink 25: _______XXXXXX___________________________
Data delay found: 29
10:52:26:setup_element:INFO: Eye window for uplink 26: ________XXXX____________________________
Data delay found: 29
10:52:26:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
10:52:26:setup_element:INFO: Eye window for uplink 28: ________________XXXXX___________________
Data delay found: 38
10:52:26:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________
Data delay found: 39
10:52:26:setup_element:INFO: Eye window for uplink 30: _________________XXXXXXX________________
Data delay found: 0
10:52:26:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
10:52:26:setup_element:INFO: Setting the data phase to 19 for uplink 16
10:52:26:setup_element:INFO: Setting the data phase to 15 for uplink 17
10:52:26:setup_element:INFO: Setting the data phase to 19 for uplink 18
10:52:26:setup_element:INFO: Setting the data phase to 15 for uplink 19
10:52:26:setup_element:INFO: Setting the data phase to 20 for uplink 20
10:52:26:setup_element:INFO: Setting the data phase to 19 for uplink 21
10:52:26:setup_element:INFO: Setting the data phase to 19 for uplink 22
10:52:26:setup_element:INFO: Setting the data phase to 17 for uplink 23
10:52:26:setup_element:INFO: Setting the data phase to 27 for uplink 24
10:52:26:setup_element:INFO: Setting the data phase to 29 for uplink 25
10:52:26:setup_element:INFO: Setting the data phase to 29 for uplink 26
10:52:26:setup_element:INFO: Setting the data phase to 33 for uplink 27
10:52:26:setup_element:INFO: Setting the data phase to 38 for uplink 28
10:52:26:setup_element:INFO: Setting the data phase to 39 for uplink 29
10:52:26:setup_element:INFO: Setting the data phase to 0 for uplink 30
10:52:26:setup_element:INFO: Setting the data phase to 38 for uplink 31
10:52:26:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: _______________________________________________________________________XXXXXXX__
Uplink 18: ______________________________________________________________________XXXXXXXXX_
Uplink 19: ______________________________________________________________________XXXXXXXXX_
Uplink 20: _______________________________________________________________________XXXXXXXXX
Uplink 21: _______________________________________________________________________XXXXXXXXX
Uplink 22: _______________________________________________________________________XXXXXXXX_
Uplink 23: _______________________________________________________________________XXXXXXXX_
Uplink 24: ______________________________________________________________________XXXXXXXXX_
Uplink 25: ______________________________________________________________________XXXXXXXXX_
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: ________________________________________________________________________XXXXXXXX
Uplink 29: ________________________________________________________________________XXXXXXXX
Uplink 30: _________________________________________________________________________XXXXXXX
Uplink 31: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 18:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 20:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 21:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 22:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 23:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 26:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 27:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 28:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 29:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 30:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 31:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
]
10:52:26:setup_element:INFO: Beginning SMX ASICs map scan
10:52:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:52:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:52:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:52:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:52:26:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:52:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:52:26:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:52:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:52:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:52:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:52:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:52:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:52:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:52:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:52:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:52:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:52:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:52:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:52:27:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:52:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:52:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:52:29:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: _______________________________________________________________________XXXXXXX__
Uplink 18: ______________________________________________________________________XXXXXXXXX_
Uplink 19: ______________________________________________________________________XXXXXXXXX_
Uplink 20: _______________________________________________________________________XXXXXXXXX
Uplink 21: _______________________________________________________________________XXXXXXXXX
Uplink 22: _______________________________________________________________________XXXXXXXX_
Uplink 23: _______________________________________________________________________XXXXXXXX_
Uplink 24: ______________________________________________________________________XXXXXXXXX_
Uplink 25: ______________________________________________________________________XXXXXXXXX_
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: ________________________________________________________________________XXXXXXXX
Uplink 29: ________________________________________________________________________XXXXXXXX
Uplink 30: _________________________________________________________________________XXXXXXX
Uplink 31: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 18:
Optimal Phase: 19
Window Length: 33
Eye Window: XXX_________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 20:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 21:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 22:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 23:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 26:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 27:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 28:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 29:
Optimal Phase: 39
Window Length: 34
Eye Window: _________________XXXXXX_________________
Uplink 30:
Optimal Phase: 0
Window Length: 33
Eye Window: _________________XXXXXXX________________
Uplink 31:
Optimal Phase: 38
Window Length: 34
Eye Window: ________________XXXXXX__________________
10:52:29:setup_element:INFO: Performing Elink synchronization
10:52:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:52:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:52:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:52:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:52:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:52:29:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:52:29:ST3_emu:INFO: Number of chips: 8
10:52:29:ST3_emu:INFO: Chip address: 0x0
10:52:29:ST3_emu:INFO: Chip address: 0x1
10:52:29:ST3_emu:INFO: Chip address: 0x2
10:52:29:ST3_emu:INFO: Chip address: 0x3
10:52:29:ST3_emu:INFO: Chip address: 0x4
10:52:29:ST3_emu:INFO: Chip address: 0x5
10:52:29:ST3_emu:INFO: Chip address: 0x6
10:52:29:ST3_emu:INFO: Chip address: 0x7
10:52:30:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:52:30:febtest:INFO: 0-0 | XA-000-08-002-000-001-213-11 | 31.4 | 1195.1
10:52:30:febtest:INFO: 0-1 | XA-000-08-002-000-001-004-03 | 37.7 | 1165.6
10:52:31:febtest:INFO: 0-2 | XA-000-08-002-000-001-106-08 | 40.9 | 1165.6
10:52:31:febtest:INFO: 0-3 | XA-000-08-002-000-001-003-03 | 31.4 | 1183.3
10:52:31:febtest:INFO: 0-4 | XA-000-08-002-000-001-103-08 | 25.1 | 1206.9
10:52:31:febtest:INFO: 0-5 | XA-000-08-002-000-001-206-12 | 37.7 | 1153.7
10:52:32:febtest:INFO: 0-6 | XA-000-08-002-000-001-088-01 | 25.1 | 1218.6
10:52:32:febtest:INFO: 0-7 | XA-000-08-002-000-001-203-12 | 40.9 | 1141.9
10:52:32:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:52:35:ST3_smx:INFO: chip: 0-0 44.073563 C 1135.937260 mV
10:52:36:ST3_smx:INFO: # loops 0
10:52:37:ST3_smx:INFO: # loops 1
10:52:39:ST3_smx:INFO: # loops 2
10:52:40:ST3_smx:INFO: # loops 3
10:52:42:ST3_smx:INFO: # loops 4
10:52:44:ST3_smx:INFO: Total # of broken channels: 0
10:52:44:ST3_smx:INFO: List of broken channels: []
10:52:44:ST3_smx:INFO: Total # of broken channels: 2
10:52:44:ST3_smx:INFO: List of broken channels: [24, 30]
10:52:44:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:52:48:ST3_smx:INFO: chip: 0-1 37.726682 C 1147.806000 mV
10:52:48:ST3_smx:INFO: # loops 0
10:52:50:ST3_smx:INFO: # loops 1
10:52:52:ST3_smx:INFO: # loops 2
10:52:53:ST3_smx:INFO: # loops 3
10:52:55:ST3_smx:INFO: # loops 4
10:52:57:ST3_smx:INFO: Total # of broken channels: 0
10:52:57:ST3_smx:INFO: List of broken channels: []
10:52:57:ST3_smx:INFO: Total # of broken channels: 0
10:52:57:ST3_smx:INFO: List of broken channels: []
10:52:57:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:53:01:ST3_smx:INFO: chip: 0-2 40.898880 C 1153.732915 mV
10:53:01:ST3_smx:INFO: # loops 0
10:53:02:ST3_smx:INFO: # loops 1
10:53:04:ST3_smx:INFO: # loops 2
10:53:05:ST3_smx:INFO: # loops 3
10:53:07:ST3_smx:INFO: # loops 4
10:53:09:ST3_smx:INFO: Total # of broken channels: 0
10:53:09:ST3_smx:INFO: List of broken channels: []
10:53:09:ST3_smx:INFO: Total # of broken channels: 3
10:53:09:ST3_smx:INFO: List of broken channels: [84, 86, 88]
10:53:09:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:53:13:ST3_smx:INFO: chip: 0-3 34.556970 C 1165.571835 mV
10:53:13:ST3_smx:INFO: # loops 0
10:53:15:ST3_smx:INFO: # loops 1
10:53:16:ST3_smx:INFO: # loops 2
10:53:18:ST3_smx:INFO: # loops 3
10:53:20:ST3_smx:INFO: # loops 4
10:53:22:ST3_smx:INFO: Total # of broken channels: 2
10:53:22:ST3_smx:INFO: List of broken channels: [123, 125]
10:53:22:ST3_smx:INFO: Total # of broken channels: 9
10:53:22:ST3_smx:INFO: List of broken channels: [8, 113, 115, 117, 119, 121, 123, 125, 127]
10:53:22:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:53:26:ST3_smx:INFO: chip: 0-4 31.389742 C 1183.292940 mV
10:53:26:ST3_smx:INFO: # loops 0
10:53:28:ST3_smx:INFO: # loops 1
10:53:29:ST3_smx:INFO: # loops 2
10:53:31:ST3_smx:INFO: # loops 3
10:53:33:ST3_smx:INFO: # loops 4
10:53:34:ST3_smx:INFO: Total # of broken channels: 0
10:53:34:ST3_smx:INFO: List of broken channels: []
10:53:34:ST3_smx:INFO: Total # of broken channels: 22
10:53:34:ST3_smx:INFO: List of broken channels: [50, 52, 56, 60, 62, 64, 66, 68, 72, 74, 76, 78, 86, 88, 92, 94, 96, 98, 100, 102, 108, 114]
10:53:35:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:53:39:ST3_smx:INFO: chip: 0-5 44.073563 C 1129.995435 mV
10:53:39:ST3_smx:INFO: # loops 0
10:53:40:ST3_smx:INFO: # loops 1
10:53:42:ST3_smx:INFO: # loops 2
10:53:44:ST3_smx:INFO: # loops 3
10:53:45:ST3_smx:INFO: # loops 4
10:53:47:ST3_smx:INFO: Total # of broken channels: 0
10:53:47:ST3_smx:INFO: List of broken channels: []
10:53:47:ST3_smx:INFO: Total # of broken channels: 0
10:53:47:ST3_smx:INFO: List of broken channels: []
10:53:48:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:53:52:ST3_smx:INFO: chip: 0-6 37.726682 C 1171.483840 mV
10:53:52:ST3_smx:INFO: # loops 0
10:53:53:ST3_smx:INFO: # loops 1
10:53:55:ST3_smx:INFO: # loops 2
10:53:57:ST3_smx:INFO: # loops 3
10:53:59:ST3_smx:INFO: # loops 4
10:54:00:ST3_smx:INFO: Total # of broken channels: 0
10:54:00:ST3_smx:INFO: List of broken channels: []
10:54:00:ST3_smx:INFO: Total # of broken channels: 0
10:54:00:ST3_smx:INFO: List of broken channels: []
10:54:01:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:54:05:ST3_smx:INFO: chip: 0-7 50.430383 C 1112.140140 mV
10:54:05:ST3_smx:INFO: # loops 0
10:54:07:ST3_smx:INFO: # loops 1
10:54:08:ST3_smx:INFO: # loops 2
10:54:10:ST3_smx:INFO: # loops 3
10:54:12:ST3_smx:INFO: # loops 4
10:54:13:ST3_smx:INFO: Total # of broken channels: 0
10:54:13:ST3_smx:INFO: List of broken channels: []
10:54:13:ST3_smx:INFO: Total # of broken channels: 4
10:54:13:ST3_smx:INFO: List of broken channels: [8, 12, 16, 40]
10:54:14:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:54:14:febtest:INFO: 0-0 | XA-000-08-002-000-001-213-11 | 50.4 | 1124.0
10:54:14:febtest:INFO: 0-1 | XA-000-08-002-000-001-004-03 | 47.3 | 1135.9
10:54:15:febtest:INFO: 0-2 | XA-000-08-002-000-001-106-08 | 47.3 | 1147.8
10:54:15:febtest:INFO: 0-3 | XA-000-08-002-000-001-003-03 | 40.9 | 1159.7
10:54:15:febtest:INFO: 0-4 | XA-000-08-002-000-001-103-08 | 37.7 | 1177.4
10:54:15:febtest:INFO: 0-5 | XA-000-08-002-000-001-206-12 | 47.3 | 1124.0
10:54:15:febtest:INFO: 0-6 | XA-000-08-002-000-001-088-01 | 40.9 | 1171.5
10:54:16:febtest:INFO: 0-7 | XA-000-08-002-000-001-203-12 | 50.4 | 1106.2
10:54:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:54:49:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:54:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:54:49:febtest:INFO: Tsting FEB with SN 2046
10:54:50:smx_tester:INFO: Scanning setup
10:54:50:elinks:INFO: Disabling clock on downlink 0
10:54:50:elinks:INFO: Disabling clock on downlink 1
10:54:50:elinks:INFO: Disabling clock on downlink 2
10:54:50:elinks:INFO: Disabling clock on downlink 3
10:54:50:elinks:INFO: Disabling clock on downlink 4
10:54:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:54:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:50:elinks:INFO: Disabling clock on downlink 0
10:54:50:elinks:INFO: Disabling clock on downlink 1
10:54:50:elinks:INFO: Disabling clock on downlink 2
10:54:50:elinks:INFO: Disabling clock on downlink 3
10:54:50:elinks:INFO: Disabling clock on downlink 4
10:54:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:54:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:51:elinks:INFO: Disabling clock on downlink 0
10:54:51:elinks:INFO: Disabling clock on downlink 1
10:54:51:elinks:INFO: Disabling clock on downlink 2
10:54:51:elinks:INFO: Disabling clock on downlink 3
10:54:51:elinks:INFO: Disabling clock on downlink 4
10:54:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:54:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:54:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:51:elinks:INFO: Disabling clock on downlink 0
10:54:51:elinks:INFO: Disabling clock on downlink 1
10:54:51:elinks:INFO: Disabling clock on downlink 2
10:54:51:elinks:INFO: Disabling clock on downlink 3
10:54:51:elinks:INFO: Disabling clock on downlink 4
10:54:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:54:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:51:elinks:INFO: Disabling clock on downlink 0
10:54:51:elinks:INFO: Disabling clock on downlink 1
10:54:51:elinks:INFO: Disabling clock on downlink 2
10:54:51:elinks:INFO: Disabling clock on downlink 3
10:54:51:elinks:INFO: Disabling clock on downlink 4
10:54:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:54:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:51:setup_element:INFO: Scanning clock phase
10:54:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:51:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:54:51:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:54:51:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:54:51:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXXXX
Clock Delay: 36
10:54:51:setup_element:INFO: Eye window for uplink 30: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:54:51:setup_element:INFO: Eye window for uplink 31: X________________________________________________________________________XXXXXXX
Clock Delay: 36
10:54:51:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2
10:54:51:setup_element:INFO: Scanning data phases
10:54:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:57:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:54:57:setup_element:INFO: Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
10:54:57:setup_element:INFO: Eye window for uplink 17: ________________________________XXXX____
Data delay found: 13
10:54:57:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX
Data delay found: 17
10:54:57:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
10:54:57:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX
Data delay found: 19
10:54:57:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
10:54:57:setup_element:INFO: Eye window for uplink 22: XX_________________________________XXXXX
Data delay found: 18
10:54:57:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
10:54:57:setup_element:INFO: Eye window for uplink 24: ___XXXXXX_______________________________
Data delay found: 25
10:54:57:setup_element:INFO: Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
10:54:57:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
10:54:57:setup_element:INFO: Eye window for uplink 27: _________XXXXXX_________________________
Data delay found: 31
10:54:57:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
10:54:57:setup_element:INFO: Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
10:54:57:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXX__________________
Data delay found: 38
10:54:57:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
10:54:57:setup_element:INFO: Setting the data phase to 17 for uplink 16
10:54:57:setup_element:INFO: Setting the data phase to 13 for uplink 17
10:54:57:setup_element:INFO: Setting the data phase to 17 for uplink 18
10:54:57:setup_element:INFO: Setting the data phase to 14 for uplink 19
10:54:57:setup_element:INFO: Setting the data phase to 19 for uplink 20
10:54:57:setup_element:INFO: Setting the data phase to 17 for uplink 21
10:54:57:setup_element:INFO: Setting the data phase to 18 for uplink 22
10:54:57:setup_element:INFO: Setting the data phase to 15 for uplink 23
10:54:57:setup_element:INFO: Setting the data phase to 25 for uplink 24
10:54:57:setup_element:INFO: Setting the data phase to 28 for uplink 25
10:54:57:setup_element:INFO: Setting the data phase to 29 for uplink 26
10:54:57:setup_element:INFO: Setting the data phase to 31 for uplink 27
10:54:57:setup_element:INFO: Setting the data phase to 36 for uplink 28
10:54:57:setup_element:INFO: Setting the data phase to 38 for uplink 29
10:54:57:setup_element:INFO: Setting the data phase to 38 for uplink 30
10:54:57:setup_element:INFO: Setting the data phase to 36 for uplink 31
10:54:57:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: _______________________________________________________________________XXXXXXX__
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: _______________________________________________________________________XXXXXXXX_
Uplink 23: _______________________________________________________________________XXXXXXXX_
Uplink 24: ______________________________________________________________________XXXXXXXXX_
Uplink 25: ______________________________________________________________________XXXXXXXXX_
Uplink 26: _______________________________________________________________________XXXXXXX__
Uplink 27: _______________________________________________________________________XXXXXXX__
Uplink 28: _________________________________________________________________________XXXXXXX
Uplink 29: _________________________________________________________________________XXXXXXX
Uplink 30: X________________________________________________________________________XXXXXXX
Uplink 31: X________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 17:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 18:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 21:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 23:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 24:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 25:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 28:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 29:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 30:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
Uplink 31:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
]
10:54:57:setup_element:INFO: Beginning SMX ASICs map scan
10:54:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:54:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:54:57:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:54:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:54:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:54:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:54:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:54:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:54:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:54:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:54:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:54:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:54:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:54:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:54:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:54:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:54:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:54:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:54:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:55:00:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: _______________________________________________________________________XXXXXXX__
Uplink 18: _______________________________________________________________________XXXXXXXX_
Uplink 19: _______________________________________________________________________XXXXXXXX_
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: _______________________________________________________________________XXXXXXXX_
Uplink 23: _______________________________________________________________________XXXXXXXX_
Uplink 24: ______________________________________________________________________XXXXXXXXX_
Uplink 25: ______________________________________________________________________XXXXXXXXX_
Uplink 26: _______________________________________________________________________XXXXXXX__
Uplink 27: _______________________________________________________________________XXXXXXX__
Uplink 28: _________________________________________________________________________XXXXXXX
Uplink 29: _________________________________________________________________________XXXXXXX
Uplink 30: X________________________________________________________________________XXXXXXX
Uplink 31: X________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 17:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 18:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 20:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 21:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 22:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 23:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 24:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 25:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 34
Eye Window: _________XXXXXX_________________________
Uplink 28:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
Uplink 29:
Optimal Phase: 38
Window Length: 35
Eye Window: ________________XXXXX___________________
Uplink 30:
Optimal Phase: 38
Window Length: 33
Eye Window: _______________XXXXXXX__________________
Uplink 31:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
10:55:00:setup_element:INFO: Performing Elink synchronization
10:55:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:55:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:55:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:55:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:55:00:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:55:00:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:55:00:ST3_emu:INFO: Number of chips: 8
10:55:00:ST3_emu:INFO: Chip address: 0x0
10:55:00:ST3_emu:INFO: Chip address: 0x1
10:55:00:ST3_emu:INFO: Chip address: 0x2
10:55:00:ST3_emu:INFO: Chip address: 0x3
10:55:00:ST3_emu:INFO: Chip address: 0x4
10:55:00:ST3_emu:INFO: Chip address: 0x5
10:55:00:ST3_emu:INFO: Chip address: 0x6
10:55:00:ST3_emu:INFO: Chip address: 0x7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7
10:55:01:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:55:01:febtest:INFO: 0-0 | XA-000-08-002-000-001-213-11 | 40.9 | 1165.6
10:55:01:febtest:INFO: 0-1 | XA-000-08-002-000-001-004-03 | 40.9 | 1159.7
10:55:01:febtest:INFO: 0-2 | XA-000-08-002-000-001-106-08 | 47.3 | 1159.7
10:55:02:febtest:INFO: 0-3 | XA-000-08-002-000-001-003-03 | 34.6 | 1183.3
10:55:02:febtest:INFO: 0-4 | XA-000-08-002-000-001-103-08 | 31.4 | 1206.9
10:55:02:febtest:INFO: 0-5 | XA-000-08-002-000-001-206-12 | 40.9 | 1153.7
10:55:02:febtest:INFO: 0-6 | XA-000-08-002-000-001-088-01 | 28.2 | 1218.6
10:55:03:febtest:INFO: 0-7 | XA-000-08-002-000-001-203-12 | 47.3 | 1135.9
10:55:03:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:55:06:ST3_smx:INFO: chip: 0-0 47.250730 C 1135.937260 mV
10:55:07:ST3_smx:INFO: # loops 0
10:55:08:ST3_smx:INFO: # loops 1
10:55:10:ST3_smx:INFO: # loops 2
10:55:12:ST3_smx:INFO: # loops 3
10:55:13:ST3_smx:INFO: # loops 4
10:55:15:ST3_smx:INFO: Total # of broken channels: 0
10:55:15:ST3_smx:INFO: List of broken channels: []
10:55:15:ST3_smx:INFO: Total # of broken channels: 0
10:55:15:ST3_smx:INFO: List of broken channels: []
10:55:16:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:55:20:ST3_smx:INFO: chip: 0-1 44.073563 C 1147.806000 mV
10:55:20:ST3_smx:INFO: # loops 0
10:55:21:ST3_smx:INFO: # loops 1
10:55:23:ST3_smx:INFO: # loops 2
10:55:25:ST3_smx:INFO: # loops 3
10:55:26:ST3_smx:INFO: # loops 4
10:55:28:ST3_smx:INFO: Total # of broken channels: 0
10:55:28:ST3_smx:INFO: List of broken channels: []
10:55:28:ST3_smx:INFO: Total # of broken channels: 0
10:55:28:ST3_smx:INFO: List of broken channels: []
10:55:28:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:55:32:ST3_smx:INFO: chip: 0-2 44.073563 C 1153.732915 mV
10:55:32:ST3_smx:INFO: # loops 0
10:55:34:ST3_smx:INFO: # loops 1
10:55:36:ST3_smx:INFO: # loops 2
10:55:37:ST3_smx:INFO: # loops 3
10:55:39:ST3_smx:INFO: # loops 4
10:55:41:ST3_smx:INFO: Total # of broken channels: 0
10:55:41:ST3_smx:INFO: List of broken channels: []
10:55:41:ST3_smx:INFO: Total # of broken channels: 0
10:55:41:ST3_smx:INFO: List of broken channels: []
10:55:42:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:55:45:ST3_smx:INFO: chip: 0-3 37.726682 C 1165.571835 mV
10:55:45:ST3_smx:INFO: # loops 0
10:55:47:ST3_smx:INFO: # loops 1
10:55:49:ST3_smx:INFO: # loops 2
10:55:50:ST3_smx:INFO: # loops 3
10:55:52:ST3_smx:INFO: # loops 4
10:55:54:ST3_smx:INFO: Total # of broken channels: 0
10:55:54:ST3_smx:INFO: List of broken channels: []
10:55:54:ST3_smx:INFO: Total # of broken channels: 0
10:55:54:ST3_smx:INFO: List of broken channels: []
10:55:55:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:55:59:ST3_smx:INFO: chip: 0-4 37.726682 C 1177.390875 mV
10:55:59:ST3_smx:INFO: # loops 0
10:56:00:ST3_smx:INFO: # loops 1
10:56:02:ST3_smx:INFO: # loops 2
10:56:03:ST3_smx:INFO: # loops 3
10:56:05:ST3_smx:INFO: # loops 4
10:56:06:ST3_smx:INFO: Total # of broken channels: 0
10:56:06:ST3_smx:INFO: List of broken channels: []
10:56:06:ST3_smx:INFO: Total # of broken channels: 0
10:56:06:ST3_smx:INFO: List of broken channels: []
10:56:07:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:56:10:ST3_smx:INFO: chip: 0-5 47.250730 C 1129.995435 mV
10:56:10:ST3_smx:INFO: # loops 0
10:56:12:ST3_smx:INFO: # loops 1
10:56:13:ST3_smx:INFO: # loops 2
10:56:15:ST3_smx:INFO: # loops 3
10:56:16:ST3_smx:INFO: # loops 4
10:56:18:ST3_smx:INFO: Total # of broken channels: 6
10:56:18:ST3_smx:INFO: List of broken channels: [1, 3, 13, 15, 17, 19]
10:56:18:ST3_smx:INFO: Total # of broken channels: 6
10:56:18:ST3_smx:INFO: List of broken channels: [1, 3, 13, 15, 17, 19]
10:56:19:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:56:22:ST3_smx:INFO: chip: 0-6 40.898880 C 1171.483840 mV
10:56:22:ST3_smx:INFO: # loops 0
10:56:24:ST3_smx:INFO: # loops 1
10:56:25:ST3_smx:INFO: # loops 2
10:56:27:ST3_smx:INFO: # loops 3
10:56:28:ST3_smx:INFO: # loops 4
10:56:30:ST3_smx:INFO: Total # of broken channels: 1
10:56:30:ST3_smx:INFO: List of broken channels: [127]
10:56:30:ST3_smx:INFO: Total # of broken channels: 1
10:56:30:ST3_smx:INFO: List of broken channels: [127]
10:56:31:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:56:34:ST3_smx:INFO: chip: 0-7 50.430383 C 1112.140140 mV
10:56:34:ST3_smx:INFO: # loops 0
10:56:36:ST3_smx:INFO: # loops 1
10:56:37:ST3_smx:INFO: # loops 2
10:56:39:ST3_smx:INFO: # loops 3
10:56:40:ST3_smx:INFO: # loops 4
10:56:42:ST3_smx:INFO: Total # of broken channels: 0
10:56:42:ST3_smx:INFO: List of broken channels: []
10:56:42:ST3_smx:INFO: Total # of broken channels: 0
10:56:42:ST3_smx:INFO: List of broken channels: []
10:56:43:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:56:43:febtest:INFO: 0-0 | XA-000-08-002-000-001-213-11 | 53.6 | 1124.0
10:56:43:febtest:INFO: 0-1 | XA-000-08-002-000-001-004-03 | 50.4 | 1135.9
10:56:43:febtest:INFO: 0-2 | XA-000-08-002-000-001-106-08 | 50.4 | 1147.8
10:56:44:febtest:INFO: 0-3 | XA-000-08-002-000-001-003-03 | 44.1 | 1159.7
10:56:44:febtest:INFO: 0-4 | XA-000-08-002-000-001-103-08 | 40.9 | 1171.5
10:56:44:febtest:INFO: 0-5 | XA-000-08-002-000-001-206-12 | 50.4 | 1124.0
10:56:44:febtest:INFO: 0-6 | XA-000-08-002-000-001-088-01 | 44.1 | 1171.5
10:56:44:febtest:INFO: 0-7 | XA-000-08-002-000-001-203-12 | 53.6 | 1112.1
10:56:46:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2046/TestDate_2023_10_16-10_54_49/