10:12:13:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
10:12:14:febtest:INFO:	FEB8.2 selected
10:12:14:febtest:INFO:	FEB8.2 selected
10:12:18:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
10:13:35:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:13:37:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:13:37:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:13:37:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:13:38:febtest:INFO:	Tsting FEB with SN 2047
10:13:39:smx_tester:INFO:	Scanning setup
10:13:39:elinks:INFO:	Disabling clock on downlink 0
10:13:39:elinks:INFO:	Disabling clock on downlink 1
10:13:39:elinks:INFO:	Disabling clock on downlink 2
10:13:39:elinks:INFO:	Disabling clock on downlink 3
10:13:39:elinks:INFO:	Disabling clock on downlink 4
10:13:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:13:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:13:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:13:39:elinks:INFO:	Disabling clock on downlink 0
10:13:39:elinks:INFO:	Disabling clock on downlink 1
10:13:39:elinks:INFO:	Disabling clock on downlink 2
10:13:39:elinks:INFO:	Disabling clock on downlink 3
10:13:39:elinks:INFO:	Disabling clock on downlink 4
10:13:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:13:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:13:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:13:39:elinks:INFO:	Disabling clock on downlink 0
10:13:39:elinks:INFO:	Disabling clock on downlink 1
10:13:39:elinks:INFO:	Disabling clock on downlink 2
10:13:39:elinks:INFO:	Disabling clock on downlink 3
10:13:39:elinks:INFO:	Disabling clock on downlink 4
10:13:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:13:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:13:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:13:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:13:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:13:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:13:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:13:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:13:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:13:39:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:13:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:13:39:elinks:INFO:	Disabling clock on downlink 0
10:13:39:elinks:INFO:	Disabling clock on downlink 1
10:13:39:elinks:INFO:	Disabling clock on downlink 2
10:13:39:elinks:INFO:	Disabling clock on downlink 3
10:13:39:elinks:INFO:	Disabling clock on downlink 4
10:13:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:13:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:13:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:13:40:elinks:INFO:	Disabling clock on downlink 0
10:13:40:elinks:INFO:	Disabling clock on downlink 1
10:13:40:elinks:INFO:	Disabling clock on downlink 2
10:13:40:elinks:INFO:	Disabling clock on downlink 3
10:13:40:elinks:INFO:	Disabling clock on downlink 4
10:13:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:13:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:13:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:13:40:setup_element:INFO:	Scanning clock phase
10:13:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:13:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:13:40:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:13:40:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:13:40:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:13:40:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:13:40:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:13:40:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:13:40:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:13:40:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:13:40:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:13:40:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
10:13:40:setup_element:INFO:	Scanning data phases
10:13:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:13:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:13:45:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:13:45:setup_element:INFO:	Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
10:13:45:setup_element:INFO:	Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
10:13:45:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
10:13:45:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
10:13:45:setup_element:INFO:	Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
10:13:45:setup_element:INFO:	Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
10:13:45:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXXX_________________
Data delay found: 39
10:13:45:setup_element:INFO:	Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
10:13:45:setup_element:INFO:	Setting the data phase to 29 for uplink 24
10:13:45:setup_element:INFO:	Setting the data phase to 32 for uplink 25
10:13:45:setup_element:INFO:	Setting the data phase to 30 for uplink 26
10:13:45:setup_element:INFO:	Setting the data phase to 33 for uplink 27
10:13:45:setup_element:INFO:	Setting the data phase to 33 for uplink 28
10:13:45:setup_element:INFO:	Setting the data phase to 35 for uplink 29
10:13:45:setup_element:INFO:	Setting the data phase to 39 for uplink 30
10:13:45:setup_element:INFO:	Setting the data phase to 38 for uplink 31
10:13:45:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________
    Uplink 31:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________
]
10:13:45:setup_element:INFO:	Beginning SMX ASICs map scan
10:13:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:13:45:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:13:45:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:13:45:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:13:46:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:13:46:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:13:46:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:13:46:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:13:46:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:13:46:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:13:46:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:13:47:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:13:47:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:13:48:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: ______________________________________________________________________XXXXXXXX__
      Uplink 27: ______________________________________________________________________XXXXXXXX__
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 30:
      Optimal Phase: 39
      Window Length: 33
      Eye Window: ________________XXXXXXX_________________
    Uplink 31:
      Optimal Phase: 38
      Window Length: 33
      Eye Window: _______________XXXXXXX__________________

10:13:48:setup_element:INFO:	Performing Elink synchronization
10:13:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:13:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:13:48:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:13:48:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:13:48:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:13:48:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
10:13:48:ST3_emu:INFO:	Number of chips: 4
10:13:48:ST3_emu:INFO:	Chip address:  	0x1
10:13:48:ST3_emu:INFO:	Chip address:  	0x3
10:13:48:ST3_emu:INFO:	Chip address:  	0x5
10:13:48:ST3_emu:INFO:	Chip address:  	0x7
10:13:49:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:13:49:febtest:INFO:	0-1 | XA-000-08-002-000-005-034-11 |   9.3 | 1242.0
10:13:50:febtest:INFO:	0-3 | XA-000-08-002-000-005-026-02 |   9.3 | 1247.9
10:13:50:febtest:INFO:	0-5 | XA-000-08-002-000-005-035-11 |  18.7 | 1212.7
10:13:50:febtest:INFO:	0-7 | XA-000-08-002-000-005-038-11 |  18.7 | 1212.7
10:13:50:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:13:54:ST3_smx:INFO:	chip: 0-1 	 6.141382 C 	 1236.187875 mV
10:13:54:ST3_smx:INFO:	# loops 0
10:13:56:ST3_smx:INFO:	# loops 1
10:13:57:ST3_smx:INFO:	# loops 2
10:13:59:ST3_smx:INFO:	# loops 3
10:14:01:ST3_smx:INFO:	# loops 4
10:14:02:ST3_smx:INFO:	Total # of broken channels: 0
10:14:02:ST3_smx:INFO:	List of broken channels: []
10:14:02:ST3_smx:INFO:	Total # of broken channels: 0
10:14:02:ST3_smx:INFO:	List of broken channels: []
10:14:03:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:14:07:ST3_smx:INFO:	chip: 0-3 	 18.745682 C 	 1200.969315 mV
10:14:07:ST3_smx:INFO:	# loops 0
10:14:08:ST3_smx:INFO:	# loops 1
10:14:10:ST3_smx:INFO:	# loops 2
10:14:12:ST3_smx:INFO:	# loops 3
10:14:13:ST3_smx:INFO:	# loops 4
10:14:15:ST3_smx:INFO:	Total # of broken channels: 0
10:14:15:ST3_smx:INFO:	List of broken channels: []
10:14:15:ST3_smx:INFO:	Total # of broken channels: 0
10:14:15:ST3_smx:INFO:	List of broken channels: []
10:14:15:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:14:19:ST3_smx:INFO:	chip: 0-5 	 15.590880 C 	 1212.728715 mV
10:14:19:ST3_smx:INFO:	# loops 0
10:14:21:ST3_smx:INFO:	# loops 1
10:14:22:ST3_smx:INFO:	# loops 2
10:14:24:ST3_smx:INFO:	# loops 3
10:14:25:ST3_smx:INFO:	# loops 4
10:14:27:ST3_smx:INFO:	Total # of broken channels: 0
10:14:27:ST3_smx:INFO:	List of broken channels: []
10:14:27:ST3_smx:INFO:	Total # of broken channels: 0
10:14:27:ST3_smx:INFO:	List of broken channels: []
10:14:27:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
10:14:31:ST3_smx:INFO:	chip: 0-7 	 15.590880 C 	 1200.969315 mV
10:14:31:ST3_smx:INFO:	# loops 0
10:14:33:ST3_smx:INFO:	# loops 1
10:14:34:ST3_smx:INFO:	# loops 2
10:14:36:ST3_smx:INFO:	# loops 3
10:14:37:ST3_smx:INFO:	# loops 4
10:14:39:ST3_smx:INFO:	Total # of broken channels: 0
10:14:39:ST3_smx:INFO:	List of broken channels: []
10:14:39:ST3_smx:INFO:	Total # of broken channels: 0
10:14:39:ST3_smx:INFO:	List of broken channels: []
10:14:40:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:14:40:febtest:INFO:	0-1 | XA-000-08-002-000-005-034-11 |  12.4 | 1230.3
10:14:40:febtest:INFO:	0-3 | XA-000-08-002-000-005-026-02 |  21.9 | 1189.2
10:14:40:febtest:INFO:	0-5 | XA-000-08-002-000-005-035-11 |  15.6 | 1206.9
10:14:41:febtest:INFO:	0-7 | XA-000-08-002-000-005-038-11 |  15.6 | 1201.0
10:14:45:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2047/B//TestDate_2023_10_06-10_13_37/