
FEB_2047 10.10.23 13:48:57
TextEdit.txt
13:46:31:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30 13:46:32:febtest:INFO: FEB8.2 selected 13:46:32:smx_tester:INFO: Setting Elink clock mode to 160 MHz 13:46:33:ST3_Shared:INFO: Listo of operators:Robert V.; 13:46:48:febtest:INFO: FEB 8-2 B @ GSI 13:46:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:46:52:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 13:46:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:46:52:febtest:INFO: Tsting FEB with SN 2047 13:46:53:smx_tester:INFO: Scanning setup 13:46:53:elinks:INFO: Disabling clock on downlink 0 13:46:53:elinks:INFO: Disabling clock on downlink 1 13:46:53:elinks:INFO: Disabling clock on downlink 2 13:46:53:elinks:INFO: Disabling clock on downlink 3 13:46:53:elinks:INFO: Disabling clock on downlink 4 13:46:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:46:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:46:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:46:53:elinks:INFO: Disabling clock on downlink 0 13:46:53:elinks:INFO: Disabling clock on downlink 1 13:46:53:elinks:INFO: Disabling clock on downlink 2 13:46:53:elinks:INFO: Disabling clock on downlink 3 13:46:53:elinks:INFO: Disabling clock on downlink 4 13:46:53:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:46:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:46:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:46:54:elinks:INFO: Disabling clock on downlink 0 13:46:54:elinks:INFO: Disabling clock on downlink 1 13:46:54:elinks:INFO: Disabling clock on downlink 2 13:46:54:elinks:INFO: Disabling clock on downlink 3 13:46:54:elinks:INFO: Disabling clock on downlink 4 13:46:54:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:46:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:46:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:46:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:46:54:elinks:INFO: Disabling clock on downlink 0 13:46:54:elinks:INFO: Disabling clock on downlink 1 13:46:54:elinks:INFO: Disabling clock on downlink 2 13:46:54:elinks:INFO: Disabling clock on downlink 3 13:46:54:elinks:INFO: Disabling clock on downlink 4 13:46:54:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:46:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:46:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:46:54:elinks:INFO: Disabling clock on downlink 0 13:46:54:elinks:INFO: Disabling clock on downlink 1 13:46:54:elinks:INFO: Disabling clock on downlink 2 13:46:54:elinks:INFO: Disabling clock on downlink 3 13:46:54:elinks:INFO: Disabling clock on downlink 4 13:46:54:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:46:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:46:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:46:54:setup_element:INFO: Scanning clock phase 13:46:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:46:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:46:55:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:46:55:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXXXX Clock Delay: 35 13:46:55:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXXXX Clock Delay: 35 13:46:55:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 13:46:55:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 13:46:55:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 13:46:55:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 13:46:55:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:46:55:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:46:55:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:46:55:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:46:55:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:46:55:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:46:55:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 13:46:55:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 13:46:55:setup_element:INFO: Eye window for uplink 30: X_________________________________________________________________________XXXXXX Clock Delay: 37 13:46:55:setup_element:INFO: Eye window for uplink 31: X_________________________________________________________________________XXXXXX Clock Delay: 37 13:46:55:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2 13:46:55:setup_element:INFO: Scanning data phases 13:46:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:46:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:47:00:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:47:00:setup_element:INFO: Eye window for uplink 16: XXX__________________________________XXX Data delay found: 19 13:47:00:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__ Data delay found: 15 13:47:00:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX Data delay found: 17 13:47:00:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___ Data delay found: 14 13:47:00:setup_element:INFO: Eye window for uplink 20: ____________________________________XXXX Data delay found: 17 13:47:00:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_ Data delay found: 16 13:47:00:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX Data delay found: 17 13:47:00:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__ Data delay found: 15 13:47:00:setup_element:INFO: Eye window for uplink 24: ____XXXXXX______________________________ Data delay found: 26 13:47:00:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________ Data delay found: 30 13:47:00:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________ Data delay found: 28 13:47:00:setup_element:INFO: Eye window for uplink 27: __________XXXXX_________________________ Data delay found: 32 13:47:00:setup_element:INFO: Eye window for uplink 28: __________XXXXX_________________________ Data delay found: 32 13:47:00:setup_element:INFO: Eye window for uplink 29: ____________XXXX________________________ Data delay found: 33 13:47:00:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________ Data delay found: 38 13:47:00:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________ Data delay found: 37 13:47:00:setup_element:INFO: Setting the data phase to 19 for uplink 16 13:47:00:setup_element:INFO: Setting the data phase to 15 for uplink 17 13:47:00:setup_element:INFO: Setting the data phase to 17 for uplink 18 13:47:00:setup_element:INFO: Setting the data phase to 14 for uplink 19 13:47:00:setup_element:INFO: Setting the data phase to 17 for uplink 20 13:47:00:setup_element:INFO: Setting the data phase to 16 for uplink 21 13:47:00:setup_element:INFO: Setting the data phase to 17 for uplink 22 13:47:00:setup_element:INFO: Setting the data phase to 15 for uplink 23 13:47:00:setup_element:INFO: Setting the data phase to 26 for uplink 24 13:47:00:setup_element:INFO: Setting the data phase to 30 for uplink 25 13:47:00:setup_element:INFO: Setting the data phase to 28 for uplink 26 13:47:00:setup_element:INFO: Setting the data phase to 32 for uplink 27 13:47:00:setup_element:INFO: Setting the data phase to 32 for uplink 28 13:47:00:setup_element:INFO: Setting the data phase to 33 for uplink 29 13:47:00:setup_element:INFO: Setting the data phase to 38 for uplink 30 13:47:00:setup_element:INFO: Setting the data phase to 37 for uplink 31 13:47:00:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 35 Window Length: 69 Eye Windows: Uplink 16: ________________________________________________________________________XXXXXXXX Uplink 17: ________________________________________________________________________XXXXXXXX Uplink 18: ______________________________________________________________________XXXXXXXXX_ Uplink 19: ______________________________________________________________________XXXXXXXXX_ Uplink 20: _______________________________________________________________________XXXXXXXXX Uplink 21: _______________________________________________________________________XXXXXXXXX Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: _______________________________________________________________________XXXXXXXX_ Uplink 25: _______________________________________________________________________XXXXXXXX_ Uplink 26: _______________________________________________________________________XXXXXXXX_ Uplink 27: _______________________________________________________________________XXXXXXXX_ Uplink 28: ______________________________________________________________________XXXXXXXXX_ Uplink 29: ______________________________________________________________________XXXXXXXXX_ Uplink 30: X_________________________________________________________________________XXXXXX Uplink 31: X_________________________________________________________________________XXXXXX Data phase characteristics: Uplink 16: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 17: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 18: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 19: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 20: Optimal Phase: 17 Window Length: 36 Eye Window: ____________________________________XXXX Uplink 21: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 23: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 24: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 25: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 26: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 27: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 28: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 29: Optimal Phase: 33 Window Length: 36 Eye Window: ____________XXXX________________________ Uplink 30: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 31: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ ] 13:47:00:setup_element:INFO: Beginning SMX ASICs map scan 13:47:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:47:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:47:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:47:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:47:00:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 13:47:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 13:47:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 13:47:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:47:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:47:01:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 13:47:01:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 13:47:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:47:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:47:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 13:47:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 13:47:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:47:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:47:02:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 13:47:02:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 13:47:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:47:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:47:03:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 35 Window Length: 69 Eye Windows: Uplink 16: ________________________________________________________________________XXXXXXXX Uplink 17: ________________________________________________________________________XXXXXXXX Uplink 18: ______________________________________________________________________XXXXXXXXX_ Uplink 19: ______________________________________________________________________XXXXXXXXX_ Uplink 20: _______________________________________________________________________XXXXXXXXX Uplink 21: _______________________________________________________________________XXXXXXXXX Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: _______________________________________________________________________XXXXXXXX_ Uplink 25: _______________________________________________________________________XXXXXXXX_ Uplink 26: _______________________________________________________________________XXXXXXXX_ Uplink 27: _______________________________________________________________________XXXXXXXX_ Uplink 28: ______________________________________________________________________XXXXXXXXX_ Uplink 29: ______________________________________________________________________XXXXXXXXX_ Uplink 30: X_________________________________________________________________________XXXXXX Uplink 31: X_________________________________________________________________________XXXXXX Data phase characteristics: Uplink 16: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 17: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 18: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 19: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 20: Optimal Phase: 17 Window Length: 36 Eye Window: ____________________________________XXXX Uplink 21: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 23: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 24: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 25: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 26: Optimal Phase: 28 Window Length: 35 Eye Window: ______XXXXX_____________________________ Uplink 27: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 28: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 29: Optimal Phase: 33 Window Length: 36 Eye Window: ____________XXXX________________________ Uplink 30: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 31: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ 13:47:03:setup_element:INFO: Performing Elink synchronization 13:47:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:47:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:47:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:47:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:47:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:47:03:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 13:47:03:ST3_emu:INFO: Number of chips: 8 13:47:03:ST3_emu:INFO: Chip address: 0x0 13:47:03:ST3_emu:INFO: Chip address: 0x1 13:47:03:ST3_emu:INFO: Chip address: 0x2 13:47:03:ST3_emu:INFO: Chip address: 0x3 13:47:03:ST3_emu:INFO: Chip address: 0x4 13:47:03:ST3_emu:INFO: Chip address: 0x5 13:47:03:ST3_emu:INFO: Chip address: 0x6 13:47:03:ST3_emu:INFO: Chip address: 0x7 13:47:04:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 13:47:05:febtest:INFO: 0-0 | XA-000-08-002-000-005-027-02 | 18.7 | 1212.7 13:47:05:febtest:INFO: 0-1 | XA-000-08-002-000-005-034-11 | 9.3 | 1242.0 13:47:05:febtest:INFO: 0-2 | XA-000-08-002-000-005-039-11 | 25.1 | 1195.1 13:47:05:febtest:INFO: 0-3 | XA-000-08-002-000-005-026-02 | 9.3 | 1247.9 13:47:06:febtest:INFO: 0-4 | XA-000-08-002-000-005-028-02 | -0.1 | 1282.9 13:47:06:febtest:INFO: 0-5 | XA-000-08-002-000-005-035-11 | 25.1 | 1201.0 13:47:06:febtest:INFO: 0-6 | XA-000-08-002-000-005-031-02 | 9.3 | 1242.0 13:47:06:febtest:INFO: 0-7 | XA-000-08-002-000-005-038-11 | 15.6 | 1218.6 13:47:06:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:47:10:ST3_smx:INFO: chip: 0-0 28.225000 C 1177.390875 mV 13:47:10:ST3_smx:INFO: # loops 0 13:47:12:ST3_smx:INFO: # loops 1 13:47:13:ST3_smx:INFO: # loops 2 13:47:15:ST3_smx:INFO: # loops 3 13:47:17:ST3_smx:INFO: # loops 4 13:47:18:ST3_smx:INFO: Total # of broken channels: 0 13:47:18:ST3_smx:INFO: List of broken channels: [] 13:47:18:ST3_smx:INFO: Total # of broken channels: 29 13:47:18:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59] 13:47:19:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:47:23:ST3_smx:INFO: chip: 0-1 9.288730 C 1242.040240 mV 13:47:23:ST3_smx:INFO: # loops 0 13:47:24:ST3_smx:INFO: # loops 1 13:47:26:ST3_smx:INFO: # loops 2 13:47:28:ST3_smx:INFO: # loops 3 13:47:29:ST3_smx:INFO: # loops 4 13:47:31:ST3_smx:INFO: Total # of broken channels: 0 13:47:31:ST3_smx:INFO: List of broken channels: [] 13:47:31:ST3_smx:INFO: Total # of broken channels: 0 13:47:31:ST3_smx:INFO: List of broken channels: [] 13:47:31:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:47:35:ST3_smx:INFO: chip: 0-2 28.225000 C 1177.390875 mV 13:47:35:ST3_smx:INFO: # loops 0 13:47:37:ST3_smx:INFO: # loops 1 13:47:39:ST3_smx:INFO: # loops 2 13:47:40:ST3_smx:INFO: # loops 3 13:47:42:ST3_smx:INFO: # loops 4 13:47:44:ST3_smx:INFO: Total # of broken channels: 1 13:47:44:ST3_smx:INFO: List of broken channels: [61] 13:47:44:ST3_smx:INFO: Total # of broken channels: 10 13:47:44:ST3_smx:INFO: List of broken channels: [6, 55, 61, 67, 73, 79, 107, 109, 115, 119] 13:47:44:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:47:48:ST3_smx:INFO: chip: 0-3 21.902970 C 1200.969315 mV 13:47:48:ST3_smx:INFO: # loops 0 13:47:50:ST3_smx:INFO: # loops 1 13:47:52:ST3_smx:INFO: # loops 2 13:47:53:ST3_smx:INFO: # loops 3 13:47:55:ST3_smx:INFO: # loops 4 13:47:57:ST3_smx:INFO: Total # of broken channels: 0 13:47:57:ST3_smx:INFO: List of broken channels: [] 13:47:57:ST3_smx:INFO: Total # of broken channels: 0 13:47:57:ST3_smx:INFO: List of broken channels: [] 13:47:57:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:48:01:ST3_smx:INFO: chip: 0-4 15.590880 C 1224.468235 mV 13:48:01:ST3_smx:INFO: # loops 0 13:48:03:ST3_smx:INFO: # loops 1 13:48:04:ST3_smx:INFO: # loops 2 13:48:06:ST3_smx:INFO: # loops 3 13:48:08:ST3_smx:INFO: # loops 4 13:48:09:ST3_smx:INFO: Total # of broken channels: 0 13:48:09:ST3_smx:INFO: List of broken channels: [] 13:48:09:ST3_smx:INFO: Total # of broken channels: 0 13:48:09:ST3_smx:INFO: List of broken channels: [] 13:48:10:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:48:13:ST3_smx:INFO: chip: 0-5 18.745682 C 1212.728715 mV 13:48:13:ST3_smx:INFO: # loops 0 13:48:15:ST3_smx:INFO: # loops 1 13:48:17:ST3_smx:INFO: # loops 2 13:48:18:ST3_smx:INFO: # loops 3 13:48:20:ST3_smx:INFO: # loops 4 13:48:22:ST3_smx:INFO: Total # of broken channels: 0 13:48:22:ST3_smx:INFO: List of broken channels: [] 13:48:22:ST3_smx:INFO: Total # of broken channels: 0 13:48:22:ST3_smx:INFO: List of broken channels: [] 13:48:22:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:48:26:ST3_smx:INFO: chip: 0-6 18.745682 C 1206.851500 mV 13:48:26:ST3_smx:INFO: # loops 0 13:48:28:ST3_smx:INFO: # loops 1 13:48:29:ST3_smx:INFO: # loops 2 13:48:31:ST3_smx:INFO: # loops 3 13:48:32:ST3_smx:INFO: # loops 4 13:48:34:ST3_smx:INFO: Total # of broken channels: 0 13:48:34:ST3_smx:INFO: List of broken channels: [] 13:48:34:ST3_smx:INFO: Total # of broken channels: 0 13:48:34:ST3_smx:INFO: List of broken channels: [] 13:48:34:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:48:38:ST3_smx:INFO: chip: 0-7 18.745682 C 1206.851500 mV 13:48:38:ST3_smx:INFO: # loops 0 13:48:40:ST3_smx:INFO: # loops 1 13:48:42:ST3_smx:INFO: # loops 2 13:48:43:ST3_smx:INFO: # loops 3 13:48:45:ST3_smx:INFO: # loops 4 13:48:47:ST3_smx:INFO: Total # of broken channels: 0 13:48:47:ST3_smx:INFO: List of broken channels: [] 13:48:47:ST3_smx:INFO: Total # of broken channels: 0 13:48:47:ST3_smx:INFO: List of broken channels: [] 13:48:47:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 13:48:47:febtest:INFO: 0-0 | XA-000-08-002-000-005-027-02 | 34.6 | 1171.5 13:48:48:febtest:INFO: 0-1 | XA-000-08-002-000-005-034-11 | 15.6 | 1230.3 13:48:48:febtest:INFO: 0-2 | XA-000-08-002-000-005-039-11 | 34.6 | 1165.6 13:48:48:febtest:INFO: 0-3 | XA-000-08-002-000-005-026-02 | 28.2 | 1195.1 13:48:48:febtest:INFO: 0-4 | XA-000-08-002-000-005-028-02 | 21.9 | 1212.7 13:48:49:febtest:INFO: 0-5 | XA-000-08-002-000-005-035-11 | 21.9 | 1206.9 13:48:49:febtest:INFO: 0-6 | XA-000-08-002-000-005-031-02 | 21.9 | 1206.9 13:48:49:febtest:INFO: 0-7 | XA-000-08-002-000-005-038-11 | 18.7 | 1206.9 13:48:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:48:57:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 13:48:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:48:57:febtest:INFO: Tsting FEB with SN 2047 13:48:58:smx_tester:INFO: Scanning setup 13:48:58:elinks:INFO: Disabling clock on downlink 0 13:48:58:elinks:INFO: Disabling clock on downlink 1 13:48:58:elinks:INFO: Disabling clock on downlink 2 13:48:58:elinks:INFO: Disabling clock on downlink 3 13:48:58:elinks:INFO: Disabling clock on downlink 4 13:48:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:48:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:58:elinks:INFO: Disabling clock on downlink 0 13:48:58:elinks:INFO: Disabling clock on downlink 1 13:48:58:elinks:INFO: Disabling clock on downlink 2 13:48:58:elinks:INFO: Disabling clock on downlink 3 13:48:58:elinks:INFO: Disabling clock on downlink 4 13:48:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:48:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:59:elinks:INFO: Disabling clock on downlink 0 13:48:59:elinks:INFO: Disabling clock on downlink 1 13:48:59:elinks:INFO: Disabling clock on downlink 2 13:48:59:elinks:INFO: Disabling clock on downlink 3 13:48:59:elinks:INFO: Disabling clock on downlink 4 13:48:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:48:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:59:elinks:INFO: Disabling clock on downlink 0 13:48:59:elinks:INFO: Disabling clock on downlink 1 13:48:59:elinks:INFO: Disabling clock on downlink 2 13:48:59:elinks:INFO: Disabling clock on downlink 3 13:48:59:elinks:INFO: Disabling clock on downlink 4 13:48:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:48:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:59:elinks:INFO: Disabling clock on downlink 0 13:48:59:elinks:INFO: Disabling clock on downlink 1 13:48:59:elinks:INFO: Disabling clock on downlink 2 13:48:59:elinks:INFO: Disabling clock on downlink 3 13:48:59:elinks:INFO: Disabling clock on downlink 4 13:48:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:48:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:59:setup_element:INFO: Scanning clock phase 13:48:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:48:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:49:00:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:49:00:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXXXX Clock Delay: 35 13:49:00:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXXXX Clock Delay: 35 13:49:00:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:49:00:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 13:49:00:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 13:49:00:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 13:49:00:setup_element:INFO: Scanning data phases 13:49:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:49:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:49:05:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:49:05:setup_element:INFO: Eye window for uplink 16: XXXX___________________________________X Data delay found: 21 13:49:05:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_ Data delay found: 16 13:49:05:setup_element:INFO: Eye window for uplink 18: XX_________________________________XXXXX Data delay found: 18 13:49:05:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__ Data delay found: 15 13:49:05:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX Data delay found: 18 13:49:05:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXXX Data delay found: 16 13:49:05:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX Data delay found: 17 13:49:05:setup_element:INFO: Eye window for uplink 23: __________________________________XXXX__ Data delay found: 15 13:49:05:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________ Data delay found: 27 13:49:05:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________ Data delay found: 29 13:49:05:setup_element:INFO: Eye window for uplink 26: _______XXXX_____________________________ Data delay found: 28 13:49:05:setup_element:INFO: Eye window for uplink 27: __________XXXXX_________________________ Data delay found: 32 13:49:05:setup_element:INFO: Eye window for uplink 28: __________XXXXX_________________________ Data delay found: 32 13:49:05:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________ Data delay found: 34 13:49:05:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________ Data delay found: 38 13:49:05:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________ Data delay found: 37 13:49:05:setup_element:INFO: Setting the data phase to 21 for uplink 16 13:49:05:setup_element:INFO: Setting the data phase to 16 for uplink 17 13:49:05:setup_element:INFO: Setting the data phase to 18 for uplink 18 13:49:05:setup_element:INFO: Setting the data phase to 15 for uplink 19 13:49:05:setup_element:INFO: Setting the data phase to 18 for uplink 20 13:49:05:setup_element:INFO: Setting the data phase to 16 for uplink 21 13:49:05:setup_element:INFO: Setting the data phase to 17 for uplink 22 13:49:05:setup_element:INFO: Setting the data phase to 15 for uplink 23 13:49:05:setup_element:INFO: Setting the data phase to 27 for uplink 24 13:49:05:setup_element:INFO: Setting the data phase to 29 for uplink 25 13:49:05:setup_element:INFO: Setting the data phase to 28 for uplink 26 13:49:05:setup_element:INFO: Setting the data phase to 32 for uplink 27 13:49:05:setup_element:INFO: Setting the data phase to 32 for uplink 28 13:49:05:setup_element:INFO: Setting the data phase to 34 for uplink 29 13:49:05:setup_element:INFO: Setting the data phase to 38 for uplink 30 13:49:05:setup_element:INFO: Setting the data phase to 37 for uplink 31 13:49:05:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 16: ________________________________________________________________________XXXXXXXX Uplink 17: ________________________________________________________________________XXXXXXXX Uplink 18: ______________________________________________________________________XXXXXXXXX_ Uplink 19: ______________________________________________________________________XXXXXXXXX_ Uplink 20: ______________________________________________________________________XXXXXXXXX_ Uplink 21: ______________________________________________________________________XXXXXXXXX_ Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: _______________________________________________________________________XXXXXXXX_ Uplink 25: _______________________________________________________________________XXXXXXXX_ Uplink 26: _______________________________________________________________________XXXXXXXX_ Uplink 27: _______________________________________________________________________XXXXXXXX_ Uplink 28: _______________________________________________________________________XXXXXXX__ Uplink 29: _______________________________________________________________________XXXXXXX__ Uplink 30: ________________________________________________________________________________ Uplink 31: ________________________________________________________________________________ Data phase characteristics: Uplink 16: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 17: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 18: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 19: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 20: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 21: Optimal Phase: 16 Window Length: 34 Eye Window: __________________________________XXXXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 23: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 24: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 25: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 26: Optimal Phase: 28 Window Length: 36 Eye Window: _______XXXX_____________________________ Uplink 27: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 28: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 29: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 30: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 31: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ ] 13:49:05:setup_element:INFO: Beginning SMX ASICs map scan 13:49:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:49:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:49:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:49:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:49:05:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 13:49:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 13:49:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 13:49:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:49:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:49:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 13:49:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 13:49:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:49:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:49:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 13:49:06:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 13:49:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:49:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:49:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 13:49:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 13:49:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:49:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:49:08:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 16: ________________________________________________________________________XXXXXXXX Uplink 17: ________________________________________________________________________XXXXXXXX Uplink 18: ______________________________________________________________________XXXXXXXXX_ Uplink 19: ______________________________________________________________________XXXXXXXXX_ Uplink 20: ______________________________________________________________________XXXXXXXXX_ Uplink 21: ______________________________________________________________________XXXXXXXXX_ Uplink 22: _______________________________________________________________________XXXXXXXX_ Uplink 23: _______________________________________________________________________XXXXXXXX_ Uplink 24: _______________________________________________________________________XXXXXXXX_ Uplink 25: _______________________________________________________________________XXXXXXXX_ Uplink 26: _______________________________________________________________________XXXXXXXX_ Uplink 27: _______________________________________________________________________XXXXXXXX_ Uplink 28: _______________________________________________________________________XXXXXXX__ Uplink 29: _______________________________________________________________________XXXXXXX__ Uplink 30: ________________________________________________________________________________ Uplink 31: ________________________________________________________________________________ Data phase characteristics: Uplink 16: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 17: Optimal Phase: 16 Window Length: 35 Eye Window: __________________________________XXXXX_ Uplink 18: Optimal Phase: 18 Window Length: 33 Eye Window: XX_________________________________XXXXX Uplink 19: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 20: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 21: Optimal Phase: 16 Window Length: 34 Eye Window: __________________________________XXXXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXXX Uplink 23: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 24: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 25: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 26: Optimal Phase: 28 Window Length: 36 Eye Window: _______XXXX_____________________________ Uplink 27: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 28: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 29: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 30: Optimal Phase: 38 Window Length: 34 Eye Window: ________________XXXXXX__________________ Uplink 31: Optimal Phase: 37 Window Length: 34 Eye Window: _______________XXXXXX___________________ 13:49:08:setup_element:INFO: Performing Elink synchronization 13:49:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:49:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:49:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:49:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:49:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:49:08:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 13:49:09:ST3_emu:INFO: Number of chips: 8 13:49:09:ST3_emu:INFO: Chip address: 0x0 13:49:09:ST3_emu:INFO: Chip address: 0x1 13:49:09:ST3_emu:INFO: Chip address: 0x2 13:49:09:ST3_emu:INFO: Chip address: 0x3 13:49:09:ST3_emu:INFO: Chip address: 0x4 13:49:09:ST3_emu:INFO: Chip address: 0x5 13:49:09:ST3_emu:INFO: Chip address: 0x6 13:49:09:ST3_emu:INFO: Chip address: 0x7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_0 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_1 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_2 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_3 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_4 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_5 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_6 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_7 13:49:09:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 13:49:10:febtest:INFO: 0-0 | XA-000-08-002-000-005-027-02 | 28.2 | 1212.7 13:49:10:febtest:INFO: 0-1 | XA-000-08-002-000-005-034-11 | 18.7 | 1236.2 13:49:10:febtest:INFO: 0-2 | XA-000-08-002-000-005-039-11 | 31.4 | 1195.1 13:49:10:febtest:INFO: 0-3 | XA-000-08-002-000-005-026-02 | 12.4 | 1253.7 13:49:11:febtest:INFO: 0-4 | XA-000-08-002-000-005-028-02 | 9.3 | 1277.1 13:49:11:febtest:INFO: 0-5 | XA-000-08-002-000-005-035-11 | 28.2 | 1212.7 13:49:11:febtest:INFO: 0-6 | XA-000-08-002-000-005-031-02 | 12.4 | 1247.9 13:49:11:febtest:INFO: 0-7 | XA-000-08-002-000-005-038-11 | 21.9 | 1212.7 13:49:11:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:49:15:ST3_smx:INFO: chip: 0-0 34.556970 C 1177.390875 mV 13:49:15:ST3_smx:INFO: # loops 0 13:49:17:ST3_smx:INFO: # loops 1 13:49:18:ST3_smx:INFO: # loops 2 13:49:20:ST3_smx:INFO: # loops 3 13:49:22:ST3_smx:INFO: # loops 4 13:49:23:ST3_smx:INFO: Total # of broken channels: 0 13:49:23:ST3_smx:INFO: List of broken channels: [] 13:49:23:ST3_smx:INFO: Total # of broken channels: 0 13:49:23:ST3_smx:INFO: List of broken channels: [] 13:49:24:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:49:27:ST3_smx:INFO: chip: 0-1 15.590880 C 1236.187875 mV 13:49:27:ST3_smx:INFO: # loops 0 13:49:29:ST3_smx:INFO: # loops 1 13:49:31:ST3_smx:INFO: # loops 2 13:49:32:ST3_smx:INFO: # loops 3 13:49:34:ST3_smx:INFO: # loops 4 13:49:35:ST3_smx:INFO: Total # of broken channels: 0 13:49:35:ST3_smx:INFO: List of broken channels: [] 13:49:36:ST3_smx:INFO: Total # of broken channels: 0 13:49:36:ST3_smx:INFO: List of broken channels: [] 13:49:36:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:49:40:ST3_smx:INFO: chip: 0-2 34.556970 C 1177.390875 mV 13:49:40:ST3_smx:INFO: # loops 0 13:49:41:ST3_smx:INFO: # loops 1 13:49:43:ST3_smx:INFO: # loops 2 13:49:45:ST3_smx:INFO: # loops 3 13:49:46:ST3_smx:INFO: # loops 4 13:49:48:ST3_smx:INFO: Total # of broken channels: 0 13:49:48:ST3_smx:INFO: List of broken channels: [] 13:49:48:ST3_smx:INFO: Total # of broken channels: 0 13:49:48:ST3_smx:INFO: List of broken channels: [] 13:49:49:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:49:52:ST3_smx:INFO: chip: 0-3 25.062742 C 1195.082160 mV 13:49:52:ST3_smx:INFO: # loops 0 13:49:54:ST3_smx:INFO: # loops 1 13:49:55:ST3_smx:INFO: # loops 2 13:49:57:ST3_smx:INFO: # loops 3 13:49:59:ST3_smx:INFO: # loops 4 13:50:00:ST3_smx:INFO: Total # of broken channels: 0 13:50:00:ST3_smx:INFO: List of broken channels: [] 13:50:00:ST3_smx:INFO: Total # of broken channels: 0 13:50:00:ST3_smx:INFO: List of broken channels: [] 13:50:01:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:50:05:ST3_smx:INFO: chip: 0-4 18.745682 C 1218.600960 mV 13:50:05:ST3_smx:INFO: # loops 0 13:50:06:ST3_smx:INFO: # loops 1 13:50:08:ST3_smx:INFO: # loops 2 13:50:09:ST3_smx:INFO: # loops 3 13:50:11:ST3_smx:INFO: # loops 4 13:50:13:ST3_smx:INFO: Total # of broken channels: 0 13:50:13:ST3_smx:INFO: List of broken channels: [] 13:50:13:ST3_smx:INFO: Total # of broken channels: 0 13:50:13:ST3_smx:INFO: List of broken channels: [] 13:50:13:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:50:17:ST3_smx:INFO: chip: 0-5 21.902970 C 1212.728715 mV 13:50:17:ST3_smx:INFO: # loops 0 13:50:18:ST3_smx:INFO: # loops 1 13:50:20:ST3_smx:INFO: # loops 2 13:50:21:ST3_smx:INFO: # loops 3 13:50:23:ST3_smx:INFO: # loops 4 13:50:25:ST3_smx:INFO: Total # of broken channels: 0 13:50:25:ST3_smx:INFO: List of broken channels: [] 13:50:25:ST3_smx:INFO: Total # of broken channels: 0 13:50:25:ST3_smx:INFO: List of broken channels: [] 13:50:25:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:50:29:ST3_smx:INFO: chip: 0-6 21.902970 C 1206.851500 mV 13:50:29:ST3_smx:INFO: # loops 0 13:50:31:ST3_smx:INFO: # loops 1 13:50:32:ST3_smx:INFO: # loops 2 13:50:34:ST3_smx:INFO: # loops 3 13:50:35:ST3_smx:INFO: # loops 4 13:50:37:ST3_smx:INFO: Total # of broken channels: 0 13:50:37:ST3_smx:INFO: List of broken channels: [] 13:50:37:ST3_smx:INFO: Total # of broken channels: 0 13:50:37:ST3_smx:INFO: List of broken channels: [] 13:50:38:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values 13:50:41:ST3_smx:INFO: chip: 0-7 18.745682 C 1206.851500 mV 13:50:42:ST3_smx:INFO: # loops 0 13:50:43:ST3_smx:INFO: # loops 1 13:50:45:ST3_smx:INFO: # loops 2 13:50:47:ST3_smx:INFO: # loops 3 13:50:48:ST3_smx:INFO: # loops 4 13:50:50:ST3_smx:INFO: Total # of broken channels: 0 13:50:50:ST3_smx:INFO: List of broken channels: [] 13:50:50:ST3_smx:INFO: Total # of broken channels: 0 13:50:50:ST3_smx:INFO: List of broken channels: [] 13:50:50:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 13:50:51:febtest:INFO: 0-0 | XA-000-08-002-000-005-027-02 | 37.7 | 1171.5 13:50:51:febtest:INFO: 0-1 | XA-000-08-002-000-005-034-11 | 18.7 | 1230.3 13:50:51:febtest:INFO: 0-2 | XA-000-08-002-000-005-039-11 | 37.7 | 1165.6 13:50:51:febtest:INFO: 0-3 | XA-000-08-002-000-005-026-02 | 31.4 | 1195.1 13:50:52:febtest:INFO: 0-4 | XA-000-08-002-000-005-028-02 | 25.1 | 1212.7 13:50:52:febtest:INFO: 0-5 | XA-000-08-002-000-005-035-11 | 25.1 | 1206.9 13:50:52:febtest:INFO: 0-6 | XA-000-08-002-000-005-031-02 | 21.9 | 1206.9 13:50:52:febtest:INFO: 0-7 | XA-000-08-002-000-005-038-11 | 21.9 | 1201.0 13:51:01:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2047/TestDate_2023_10_10-13_48_57/