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FEB_2048 05.01.24 07:03:55
TextEdit.txt
07:03:42:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30
07:03:42:febtest:INFO: FEB 8-2 selected
07:03:43:smx_tester:INFO: Setting Elink clock mode to 160 MHz
07:03:46:febtest:INFO: FEB 8-2 selected
07:03:46:smx_tester:INFO: Setting Elink clock mode to 160 MHz
07:03:52:febtest:INFO: FEB 8-2 selected
07:03:52:smx_tester:INFO: Setting Elink clock mode to 160 MHz
07:03:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:03:55:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
07:03:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:04:08:ST3_ModuleSelector:INFO: L4UL201031 M4UL2T3010313B2 62 B
07:04:08:ST3_ModuleSelector:INFO: 25403
07:04:08:febtest:INFO: Testing FEB with SN 2048
07:04:10:smx_tester:INFO: Scanning setup
07:04:10:elinks:INFO: Disabling clock on downlink 0
07:04:10:elinks:INFO: Disabling clock on downlink 1
07:04:10:elinks:INFO: Disabling clock on downlink 2
07:04:10:elinks:INFO: Disabling clock on downlink 3
07:04:10:elinks:INFO: Disabling clock on downlink 4
07:04:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:04:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14
07:04:10:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15
07:04:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:04:10:elinks:INFO: Disabling clock on downlink 0
07:04:10:elinks:INFO: Disabling clock on downlink 1
07:04:10:elinks:INFO: Disabling clock on downlink 2
07:04:10:elinks:INFO: Disabling clock on downlink 3
07:04:10:elinks:INFO: Disabling clock on downlink 4
07:04:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:04:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:04:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:04:10:elinks:INFO: Disabling clock on downlink 0
07:04:10:elinks:INFO: Disabling clock on downlink 1
07:04:10:elinks:INFO: Disabling clock on downlink 2
07:04:10:elinks:INFO: Disabling clock on downlink 3
07:04:10:elinks:INFO: Disabling clock on downlink 4
07:04:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:04:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:04:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:04:10:elinks:INFO: Disabling clock on downlink 0
07:04:10:elinks:INFO: Disabling clock on downlink 1
07:04:10:elinks:INFO: Disabling clock on downlink 2
07:04:10:elinks:INFO: Disabling clock on downlink 3
07:04:10:elinks:INFO: Disabling clock on downlink 4
07:04:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:04:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:04:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:04:10:elinks:INFO: Disabling clock on downlink 0
07:04:10:elinks:INFO: Disabling clock on downlink 1
07:04:10:elinks:INFO: Disabling clock on downlink 2
07:04:10:elinks:INFO: Disabling clock on downlink 3
07:04:10:elinks:INFO: Disabling clock on downlink 4
07:04:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:04:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:04:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:04:10:setup_element:INFO: Scanning clock phase
07:04:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:04:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:04:11:setup_element:INFO: Clock phase scan results for group 0, downlink 0
07:04:11:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:04:11:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:04:11:setup_element:INFO: Eye window for uplink 2 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:04:11:setup_element:INFO: Eye window for uplink 3 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:04:11:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:04:11:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:04:11:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
07:04:11:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
07:04:11:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:04:11:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
07:04:11:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:04:11:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:04:11:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
07:04:11:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
07:04:11:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXXX
Clock Delay: 36
07:04:11:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXXX
Clock Delay: 36
07:04:11:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 0
07:04:11:setup_element:INFO: Scanning data phases
07:04:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:04:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:04:16:setup_element:INFO: Data phase scan results for group 0, downlink 0
07:04:16:setup_element:INFO: Eye window for uplink 0 : _______________________________XXXXX____
Data delay found: 13
07:04:16:setup_element:INFO: Eye window for uplink 1 : ____________________________XXXXX_______
Data delay found: 10
07:04:16:setup_element:INFO: Eye window for uplink 2 : ___________________________XXXX_________
Data delay found: 8
07:04:16:setup_element:INFO: Eye window for uplink 3 : _________________________XXXXX__________
Data delay found: 7
07:04:16:setup_element:INFO: Eye window for uplink 4 : ______________________________XXXXX_____
Data delay found: 12
07:04:16:setup_element:INFO: Eye window for uplink 5 : __________________________XXXXX_________
Data delay found: 8
07:04:16:setup_element:INFO: Eye window for uplink 6 : __________________________XXXX__________
Data delay found: 7
07:04:16:setup_element:INFO: Eye window for uplink 7 : ______________________XXXXX_____________
Data delay found: 4
07:04:16:setup_element:INFO: Eye window for uplink 8 : _________________________________XXXXX__
Data delay found: 15
07:04:16:setup_element:INFO: Eye window for uplink 9 : XXX__________________________________XXX
Data delay found: 19
07:04:16:setup_element:INFO: Eye window for uplink 10: XXXX__________________________________XX
Data delay found: 20
07:04:16:setup_element:INFO: Eye window for uplink 11: __XXXXX_________________________________
Data delay found: 24
07:04:17:setup_element:INFO: Eye window for uplink 12: ____XXXXXX______________________________
Data delay found: 26
07:04:17:setup_element:INFO: Eye window for uplink 13: _______XXXXXX___________________________
Data delay found: 29
07:04:17:setup_element:INFO: Eye window for uplink 14: _______XXXXX____________________________
Data delay found: 29
07:04:17:setup_element:INFO: Eye window for uplink 15: __________XXXXXX________________________
Data delay found: 32
07:04:17:setup_element:INFO: Setting the data phase to 13 for uplink 0
07:04:17:setup_element:INFO: Setting the data phase to 10 for uplink 1
07:04:17:setup_element:INFO: Setting the data phase to 8 for uplink 2
07:04:17:setup_element:INFO: Setting the data phase to 7 for uplink 3
07:04:17:setup_element:INFO: Setting the data phase to 12 for uplink 4
07:04:17:setup_element:INFO: Setting the data phase to 8 for uplink 5
07:04:17:setup_element:INFO: Setting the data phase to 7 for uplink 6
07:04:17:setup_element:INFO: Setting the data phase to 4 for uplink 7
07:04:17:setup_element:INFO: Setting the data phase to 15 for uplink 8
07:04:17:setup_element:INFO: Setting the data phase to 19 for uplink 9
07:04:17:setup_element:INFO: Setting the data phase to 20 for uplink 10
07:04:17:setup_element:INFO: Setting the data phase to 24 for uplink 11
07:04:17:setup_element:INFO: Setting the data phase to 26 for uplink 12
07:04:17:setup_element:INFO: Setting the data phase to 29 for uplink 13
07:04:17:setup_element:INFO: Setting the data phase to 29 for uplink 14
07:04:17:setup_element:INFO: Setting the data phase to 32 for uplink 15
07:04:17:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: _____________________________________________________________________XXXXXXXX___
Uplink 3: _____________________________________________________________________XXXXXXXX___
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: _____________________________________________________________________XXXXXXX____
Uplink 7: _____________________________________________________________________XXXXXXX____
Uplink 8: ______________________________________________________________________XXXXXXX___
Uplink 9: ______________________________________________________________________XXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ________________________________________________________________________XXXXXXX_
Uplink 13: ________________________________________________________________________XXXXXXX_
Uplink 14: _________________________________________________________________________XXXXXXX
Uplink 15: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 1:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 2:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 3:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 4:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 5:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 6:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 7:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 8:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 9:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 10:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 11:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 12:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 13:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 14:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 15:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
]
07:04:17:setup_element:INFO: Beginning SMX ASICs map scan
07:04:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:04:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:04:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
07:04:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
07:04:17:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:04:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7
07:04:17:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6
07:04:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14
07:04:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15
07:04:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5
07:04:17:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4
07:04:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12
07:04:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13
07:04:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3
07:04:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2
07:04:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
07:04:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11
07:04:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1
07:04:18:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0
07:04:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8
07:04:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9
07:04:19:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: _____________________________________________________________________XXXXXXXX___
Uplink 3: _____________________________________________________________________XXXXXXXX___
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: _____________________________________________________________________XXXXXXX____
Uplink 7: _____________________________________________________________________XXXXXXX____
Uplink 8: ______________________________________________________________________XXXXXXX___
Uplink 9: ______________________________________________________________________XXXXXXX___
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: ________________________________________________________________________XXXXXXX_
Uplink 13: ________________________________________________________________________XXXXXXX_
Uplink 14: _________________________________________________________________________XXXXXXX
Uplink 15: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 1:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 2:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 3:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 4:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 5:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 6:
Optimal Phase: 7
Window Length: 36
Eye Window: __________________________XXXX__________
Uplink 7:
Optimal Phase: 4
Window Length: 35
Eye Window: ______________________XXXXX_____________
Uplink 8:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 9:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 10:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 11:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 12:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 13:
Optimal Phase: 29
Window Length: 34
Eye Window: _______XXXXXX___________________________
Uplink 14:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 15:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
07:04:19:setup_element:INFO: Performing Elink synchronization
07:04:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:04:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:04:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
07:04:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
07:04:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
07:04:19:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:04:19:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)]
1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)]
2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)]
3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)]
4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)]
5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)]
6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)]
7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)]
07:04:21:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:04:21:febtest:INFO: 7-0 | XA-000-08-002-000-001-123-15 | 40.9 | 1153.7
07:04:21:febtest:INFO: 14-1 | XA-000-08-002-000-001-014-03 | 31.4 | 1165.6
07:04:21:febtest:INFO: 5-2 | XA-000-08-002-000-001-124-15 | 37.7 | 1159.7
07:04:21:febtest:INFO: 12-3 | XA-000-08-002-000-001-005-03 | 47.3 | 1112.1
07:04:22:febtest:INFO: 3-4 | XA-000-08-002-000-001-194-12 | 18.7 | 1224.5
07:04:22:febtest:INFO: 10-5 | XA-000-08-002-000-001-008-03 | 25.1 | 1195.1
07:04:22:febtest:INFO: 1-6 | XA-000-08-002-000-001-116-15 | 37.7 | 1159.7
07:04:22:febtest:INFO: 8-7 | XA-000-08-002-000-001-011-03 | 28.2 | 1183.3
07:04:23:ST3_smx:INFO: Configuring SMX FAST
07:04:24:ST3_smx:INFO: chip: 7-0 44.073563 C 1141.874115 mV
07:04:25:ST3_smx:INFO: Electrons
07:04:25:ST3_smx:INFO: # loops 0
07:04:26:ST3_smx:INFO: # loops 1
07:04:28:ST3_smx:INFO: # loops 2
07:04:30:ST3_smx:INFO: # loops 3
07:04:31:ST3_smx:INFO: # loops 4
07:04:33:ST3_smx:INFO: Total # of broken channels: 1
07:04:33:ST3_smx:INFO: List of broken channels: [126]
07:04:33:ST3_smx:INFO: Total # of broken channels: 2
07:04:33:ST3_smx:INFO: List of broken channels: [1, 126]
07:04:33:ST3_smx:INFO: Configuring SMX FAST
07:04:35:ST3_smx:INFO: chip: 14-1 40.898880 C 1141.874115 mV
07:04:35:ST3_smx:INFO: Electrons
07:04:35:ST3_smx:INFO: # loops 0
07:04:37:ST3_smx:INFO: # loops 1
07:04:39:ST3_smx:INFO: # loops 2
07:04:40:ST3_smx:INFO: # loops 3
07:04:42:ST3_smx:INFO: # loops 4
07:04:44:ST3_smx:INFO: Total # of broken channels: 0
07:04:44:ST3_smx:INFO: List of broken channels: []
07:04:44:ST3_smx:INFO: Total # of broken channels: 2
07:04:44:ST3_smx:INFO: List of broken channels: [84, 86]
07:04:44:ST3_smx:INFO: Configuring SMX FAST
07:04:46:ST3_smx:INFO: chip: 5-2 37.726682 C 1165.571835 mV
07:04:46:ST3_smx:INFO: Electrons
07:04:46:ST3_smx:INFO: # loops 0
07:04:48:ST3_smx:INFO: # loops 1
07:04:49:ST3_smx:INFO: # loops 2
07:04:51:ST3_smx:INFO: # loops 3
07:04:53:ST3_smx:INFO: # loops 4
07:04:54:ST3_smx:INFO: Total # of broken channels: 0
07:04:54:ST3_smx:INFO: List of broken channels: []
07:04:54:ST3_smx:INFO: Total # of broken channels: 0
07:04:54:ST3_smx:INFO: List of broken channels: []
07:04:54:ST3_smx:INFO: Configuring SMX FAST
07:04:56:ST3_smx:INFO: chip: 12-3 50.430383 C 1124.048640 mV
07:04:56:ST3_smx:INFO: Electrons
07:04:56:ST3_smx:INFO: # loops 0
07:04:58:ST3_smx:INFO: # loops 1
07:05:00:ST3_smx:INFO: # loops 2
07:05:01:ST3_smx:INFO: # loops 3
07:05:03:ST3_smx:INFO: # loops 4
07:05:05:ST3_smx:INFO: Total # of broken channels: 0
07:05:05:ST3_smx:INFO: List of broken channels: []
07:05:05:ST3_smx:INFO: Total # of broken channels: 0
07:05:05:ST3_smx:INFO: List of broken channels: []
07:05:05:ST3_smx:INFO: Configuring SMX FAST
07:05:07:ST3_smx:INFO: chip: 3-4 34.556970 C 1177.390875 mV
07:05:07:ST3_smx:INFO: Electrons
07:05:07:ST3_smx:INFO: # loops 0
07:05:09:ST3_smx:INFO: # loops 1
07:05:10:ST3_smx:INFO: # loops 2
07:05:12:ST3_smx:INFO: # loops 3
07:05:13:ST3_smx:INFO: # loops 4
07:05:15:ST3_smx:INFO: Total # of broken channels: 0
07:05:15:ST3_smx:INFO: List of broken channels: []
07:05:15:ST3_smx:INFO: Total # of broken channels: 0
07:05:15:ST3_smx:INFO: List of broken channels: []
07:05:15:ST3_smx:INFO: Configuring SMX FAST
07:05:17:ST3_smx:INFO: chip: 10-5 37.726682 C 1165.571835 mV
07:05:17:ST3_smx:INFO: Electrons
07:05:17:ST3_smx:INFO: # loops 0
07:05:19:ST3_smx:INFO: # loops 1
07:05:21:ST3_smx:INFO: # loops 2
07:05:22:ST3_smx:INFO: # loops 3
07:05:24:ST3_smx:INFO: # loops 4
07:05:26:ST3_smx:INFO: Total # of broken channels: 0
07:05:26:ST3_smx:INFO: List of broken channels: []
07:05:26:ST3_smx:INFO: Total # of broken channels: 0
07:05:26:ST3_smx:INFO: List of broken channels: []
07:05:26:ST3_smx:INFO: Configuring SMX FAST
07:05:28:ST3_smx:INFO: chip: 1-6 44.073563 C 1147.806000 mV
07:05:28:ST3_smx:INFO: Electrons
07:05:28:ST3_smx:INFO: # loops 0
07:05:29:ST3_smx:INFO: # loops 1
07:05:31:ST3_smx:INFO: # loops 2
07:05:33:ST3_smx:INFO: # loops 3
07:05:34:ST3_smx:INFO: # loops 4
07:05:36:ST3_smx:INFO: Total # of broken channels: 0
07:05:36:ST3_smx:INFO: List of broken channels: []
07:05:36:ST3_smx:INFO: Total # of broken channels: 0
07:05:36:ST3_smx:INFO: List of broken channels: []
07:05:36:ST3_smx:INFO: Configuring SMX FAST
07:05:38:ST3_smx:INFO: chip: 8-7 40.898880 C 1153.732915 mV
07:05:38:ST3_smx:INFO: Electrons
07:05:38:ST3_smx:INFO: # loops 0
07:05:40:ST3_smx:INFO: # loops 1
07:05:42:ST3_smx:INFO: # loops 2
07:05:43:ST3_smx:INFO: # loops 3
07:05:45:ST3_smx:INFO: # loops 4
07:05:46:ST3_smx:INFO: Total # of broken channels: 0
07:05:46:ST3_smx:INFO: List of broken channels: []
07:05:46:ST3_smx:INFO: Total # of broken channels: 0
07:05:46:ST3_smx:INFO: List of broken channels: []
07:05:47:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:05:47:febtest:INFO: 7-0 | XA-000-08-002-000-001-123-15 | 47.3 | 1147.8
07:05:47:febtest:INFO: 14-1 | XA-000-08-002-000-001-014-03 | 47.3 | 1141.9
07:05:48:febtest:INFO: 5-2 | XA-000-08-002-000-001-124-15 | 40.9 | 1165.6
07:05:48:febtest:INFO: 12-3 | XA-000-08-002-000-001-005-03 | 50.4 | 1124.0
07:05:48:febtest:INFO: 3-4 | XA-000-08-002-000-001-194-12 | 37.7 | 1177.4
07:05:48:febtest:INFO: 10-5 | XA-000-08-002-000-001-008-03 | 37.7 | 1165.6
07:05:49:febtest:INFO: 1-6 | XA-000-08-002-000-001-116-15 | 44.1 | 1147.8
07:05:49:febtest:INFO: 8-7 | XA-000-08-002-000-001-011-03 | 40.9 | 1153.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_05-07_03_55
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL201031 M4UL2T3010313B2 62 B
FEB_SN : 2048
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 25403
MODULE_NAME: L4UL201031 M4UL2T3010313B2 62 B
MODULE_TYPE:
MODULE_LADDER: L4UL201031
MODULE_MODULE: M4UL2T3010313B2
MODULE_SIZE: 62
MODULE_GRADE: B
---------------------------------------
VI_before_Init : ['2.450', '1.7730', '1.851', '0.5184', '7.000', '1.5500', '7.000', '1.5500']
VI_after__Init : ['2.450', '2.0030', '1.850', '0.6151', '7.000', '1.5510', '7.000', '1.5510']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
07:05:50:ST3_Shared:INFO: Listo of operators:Olga B.;
07:05:51:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2048/TestDate_2024_01_05-07_03_55/