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FEB_2049 19.12.23 13:41:05
Info
08:52:14:febtest:INFO: FEB 8-2 selected
08:52:14:smx_tester:INFO: Setting Elink clock mode to 160 MHz
08:52:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:52:17:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
08:52:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:52:33:ST3_ModuleSelector:INFO: L6DL200120 M6DL2T2001202A2 124 A
08:52:33:ST3_ModuleSelector:INFO: 23114
08:52:33:febtest:INFO: Testing FEB with SN 2068
08:52:34:smx_tester:INFO: Scanning setup
08:52:34:elinks:INFO: Disabling clock on downlink 0
08:52:34:elinks:INFO: Disabling clock on downlink 1
08:52:34:elinks:INFO: Disabling clock on downlink 2
08:52:34:elinks:INFO: Disabling clock on downlink 3
08:52:34:elinks:INFO: Disabling clock on downlink 4
08:52:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14
08:52:35:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15
08:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:35:elinks:INFO: Disabling clock on downlink 0
08:52:35:elinks:INFO: Disabling clock on downlink 1
08:52:35:elinks:INFO: Disabling clock on downlink 2
08:52:35:elinks:INFO: Disabling clock on downlink 3
08:52:35:elinks:INFO: Disabling clock on downlink 4
08:52:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:35:elinks:INFO: Disabling clock on downlink 0
08:52:35:elinks:INFO: Disabling clock on downlink 1
08:52:35:elinks:INFO: Disabling clock on downlink 2
08:52:35:elinks:INFO: Disabling clock on downlink 3
08:52:35:elinks:INFO: Disabling clock on downlink 4
08:52:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:35:elinks:INFO: Disabling clock on downlink 0
08:52:35:elinks:INFO: Disabling clock on downlink 1
08:52:35:elinks:INFO: Disabling clock on downlink 2
08:52:35:elinks:INFO: Disabling clock on downlink 3
08:52:35:elinks:INFO: Disabling clock on downlink 4
08:52:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:35:elinks:INFO: Disabling clock on downlink 0
08:52:35:elinks:INFO: Disabling clock on downlink 1
08:52:35:elinks:INFO: Disabling clock on downlink 2
08:52:35:elinks:INFO: Disabling clock on downlink 3
08:52:35:elinks:INFO: Disabling clock on downlink 4
08:52:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:52:35:setup_element:INFO: Scanning clock phase
08:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:52:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:52:35:setup_element:INFO: Clock phase scan results for group 0, downlink 0
08:52:35:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:52:35:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:52:35:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:52:35:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:52:35:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:52:35:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
08:52:35:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:52:35:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
08:52:35:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:52:35:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:52:35:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:52:35:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:52:35:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:52:36:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:52:36:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:52:36:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
08:52:36:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 0
08:52:36:setup_element:INFO: Scanning data phases
08:52:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:52:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:52:41:setup_element:INFO: Data phase scan results for group 0, downlink 0
08:52:41:setup_element:INFO: Eye window for uplink 0 : _________________________________XXXXXX_
Data delay found: 15
08:52:41:setup_element:INFO: Eye window for uplink 1 : ______________________________XXXXX_____
Data delay found: 12
08:52:41:setup_element:INFO: Eye window for uplink 2 : ______________________________XXXXX_____
Data delay found: 12
08:52:41:setup_element:INFO: Eye window for uplink 3 : ____________________________XXXXX_______
Data delay found: 10
08:52:41:setup_element:INFO: Eye window for uplink 4 : ________________________________XXXXX___
Data delay found: 14
08:52:41:setup_element:INFO: Eye window for uplink 5 : ____________________________XXXXX_______
Data delay found: 10
08:52:41:setup_element:INFO: Eye window for uplink 6 : ___________________________XXXXX________
Data delay found: 9
08:52:41:setup_element:INFO: Eye window for uplink 7 : ________________________XXXXX___________
Data delay found: 6
08:52:41:setup_element:INFO: Eye window for uplink 8 : ___________________________________XXXX_
Data delay found: 16
08:52:41:setup_element:INFO: Eye window for uplink 9 : XXXX__________________________________XX
Data delay found: 20
08:52:41:setup_element:INFO: Eye window for uplink 10: XXXX__________________________________XX
Data delay found: 20
08:52:41:setup_element:INFO: Eye window for uplink 11: _XXXXXX_________________________________
Data delay found: 23
08:52:41:setup_element:INFO: Eye window for uplink 12: ____XXXXX_______________________________
Data delay found: 26
08:52:41:setup_element:INFO: Eye window for uplink 13: ______XXXXXX____________________________
Data delay found: 28
08:52:41:setup_element:INFO: Eye window for uplink 14: _____XXXXX______________________________
Data delay found: 27
08:52:41:setup_element:INFO: Eye window for uplink 15: ________XXXXXX__________________________
Data delay found: 30
08:52:41:setup_element:INFO: Setting the data phase to 15 for uplink 0
08:52:41:setup_element:INFO: Setting the data phase to 12 for uplink 1
08:52:41:setup_element:INFO: Setting the data phase to 12 for uplink 2
08:52:41:setup_element:INFO: Setting the data phase to 10 for uplink 3
08:52:41:setup_element:INFO: Setting the data phase to 14 for uplink 4
08:52:41:setup_element:INFO: Setting the data phase to 10 for uplink 5
08:52:41:setup_element:INFO: Setting the data phase to 9 for uplink 6
08:52:41:setup_element:INFO: Setting the data phase to 6 for uplink 7
08:52:41:setup_element:INFO: Setting the data phase to 16 for uplink 8
08:52:41:setup_element:INFO: Setting the data phase to 20 for uplink 9
08:52:41:setup_element:INFO: Setting the data phase to 20 for uplink 10
08:52:41:setup_element:INFO: Setting the data phase to 23 for uplink 11
08:52:41:setup_element:INFO: Setting the data phase to 26 for uplink 12
08:52:41:setup_element:INFO: Setting the data phase to 28 for uplink 13
08:52:41:setup_element:INFO: Setting the data phase to 27 for uplink 14
08:52:41:setup_element:INFO: Setting the data phase to 30 for uplink 15
08:52:41:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: _____________________________________________________________________XXXXXXXX___
Uplink 7: _____________________________________________________________________XXXXXXXX___
Uplink 8: _______________________________________________________________________XXXXXXX__
Uplink 9: _______________________________________________________________________XXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXX__
Uplink 11: _______________________________________________________________________XXXXXXX__
Uplink 12: _______________________________________________________________________XXXXXXX__
Uplink 13: _______________________________________________________________________XXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 1:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 2:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 3:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 4:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 5:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 6:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 7:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 8:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 9:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 10:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 11:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 12:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 13:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 14:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 15:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
]
08:52:41:setup_element:INFO: Beginning SMX ASICs map scan
08:52:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:52:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:52:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
08:52:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
08:52:41:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:52:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7
08:52:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6
08:52:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14
08:52:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15
08:52:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5
08:52:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4
08:52:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12
08:52:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13
08:52:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3
08:52:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2
08:52:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
08:52:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11
08:52:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1
08:52:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0
08:52:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8
08:52:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9
08:52:43:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: _________________________________________________________________________XXXXXXX
Uplink 1: _________________________________________________________________________XXXXXXX
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: _____________________________________________________________________XXXXXXXX___
Uplink 7: _____________________________________________________________________XXXXXXXX___
Uplink 8: _______________________________________________________________________XXXXXXX__
Uplink 9: _______________________________________________________________________XXXXXXX__
Uplink 10: _______________________________________________________________________XXXXXXX__
Uplink 11: _______________________________________________________________________XXXXXXX__
Uplink 12: _______________________________________________________________________XXXXXXX__
Uplink 13: _______________________________________________________________________XXXXXXX__
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 1:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 2:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 3:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 4:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 5:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 6:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 7:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 8:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 9:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 10:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 11:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 12:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 13:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 14:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 15:
Optimal Phase: 30
Window Length: 34
Eye Window: ________XXXXXX__________________________
08:52:43:setup_element:INFO: Performing Elink synchronization
08:52:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:52:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:52:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
08:52:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
08:52:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
08:52:43:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:52:43:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)]
1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)]
2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)]
3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)]
4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)]
5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)]
6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)]
7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)]
08:52:44:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:52:44:febtest:INFO: 7-0 | XA-000-08-002-000-005-106-14 | 31.4 | 1206.9
08:52:44:febtest:INFO: 14-1 | XA-000-08-002-000-005-098-14 | 28.2 | 1218.6
08:52:45:febtest:INFO: 5-2 | XA-000-08-002-000-005-108-14 | 34.6 | 1201.0
08:52:45:febtest:INFO: 12-3 | XA-000-08-002-000-005-100-14 | 50.4 | 1141.9
08:52:45:febtest:INFO: 3-4 | XA-000-08-002-000-000-098-05 | 34.6 | 1201.0
08:52:45:febtest:INFO: 10-5 | XA-000-08-002-000-005-067-00 | 28.2 | 1218.6
08:52:45:febtest:INFO: 1-6 | XA-000-08-002-000-005-064-00 | 25.1 | 1224.5
08:52:46:febtest:INFO: 8-7 | XA-000-08-002-000-005-099-14 | 25.1 | 1224.5
08:52:46:ST3_smx:INFO: Configuring SMX FAST
08:52:48:ST3_smx:INFO: chip: 7-0 28.225000 C 1224.468235 mV
08:52:48:ST3_smx:INFO: Electrons
08:52:48:ST3_smx:INFO: # loops 0
08:52:50:ST3_smx:INFO: # loops 1
08:52:51:ST3_smx:INFO: # loops 2
08:52:53:ST3_smx:INFO: # loops 3
08:52:55:ST3_smx:INFO: # loops 4
08:52:56:ST3_smx:INFO: Total # of broken channels: 0
08:52:56:ST3_smx:INFO: List of broken channels: []
08:52:56:ST3_smx:INFO: Total # of broken channels: 0
08:52:56:ST3_smx:INFO: List of broken channels: []
08:52:57:ST3_smx:INFO: Configuring SMX FAST
08:52:59:ST3_smx:INFO: chip: 14-1 31.389742 C 1218.600960 mV
08:52:59:ST3_smx:INFO: Electrons
08:52:59:ST3_smx:INFO: # loops 0
08:53:00:ST3_smx:INFO: # loops 1
08:53:02:ST3_smx:INFO: # loops 2
08:53:03:ST3_smx:INFO: # loops 3
08:53:05:ST3_smx:INFO: # loops 4
08:53:06:ST3_smx:INFO: Total # of broken channels: 0
08:53:06:ST3_smx:INFO: List of broken channels: []
08:53:06:ST3_smx:INFO: Total # of broken channels: 0
08:53:06:ST3_smx:INFO: List of broken channels: []
08:53:07:ST3_smx:INFO: Configuring SMX FAST
08:53:09:ST3_smx:INFO: chip: 5-2 37.726682 C 1200.969315 mV
08:53:09:ST3_smx:INFO: Electrons
08:53:09:ST3_smx:INFO: # loops 0
08:53:10:ST3_smx:INFO: # loops 1
08:53:12:ST3_smx:INFO: # loops 2
08:53:14:ST3_smx:INFO: # loops 3
08:53:15:ST3_smx:INFO: # loops 4
08:53:17:ST3_smx:INFO: Total # of broken channels: 0
08:53:17:ST3_smx:INFO: List of broken channels: []
08:53:17:ST3_smx:INFO: Total # of broken channels: 0
08:53:17:ST3_smx:INFO: List of broken channels: []
08:53:17:ST3_smx:INFO: Configuring SMX FAST
08:53:19:ST3_smx:INFO: chip: 12-3 50.430383 C 1153.732915 mV
08:53:19:ST3_smx:INFO: Electrons
08:53:19:ST3_smx:INFO: # loops 0
08:53:20:ST3_smx:INFO: # loops 1
08:53:22:ST3_smx:INFO: # loops 2
08:53:24:ST3_smx:INFO: # loops 3
08:53:25:ST3_smx:INFO: # loops 4
08:53:27:ST3_smx:INFO: Total # of broken channels: 0
08:53:27:ST3_smx:INFO: List of broken channels: []
08:53:27:ST3_smx:INFO: Total # of broken channels: 0
08:53:27:ST3_smx:INFO: List of broken channels: []
08:53:27:ST3_smx:INFO: Configuring SMX FAST
08:53:29:ST3_smx:INFO: chip: 3-4 47.250730 C 1171.483840 mV
08:53:29:ST3_smx:INFO: Electrons
08:53:29:ST3_smx:INFO: # loops 0
08:53:31:ST3_smx:INFO: # loops 1
08:53:32:ST3_smx:INFO: # loops 2
08:53:34:ST3_smx:INFO: # loops 3
08:53:35:ST3_smx:INFO: # loops 4
08:53:37:ST3_smx:INFO: Total # of broken channels: 0
08:53:37:ST3_smx:INFO: List of broken channels: []
08:53:37:ST3_smx:INFO: Total # of broken channels: 0
08:53:37:ST3_smx:INFO: List of broken channels: []
08:53:37:ST3_smx:INFO: Configuring SMX FAST
08:53:39:ST3_smx:INFO: chip: 10-5 34.556970 C 1206.851500 mV
08:53:39:ST3_smx:INFO: Electrons
08:53:39:ST3_smx:INFO: # loops 0
08:53:41:ST3_smx:INFO: # loops 1
08:53:42:ST3_smx:INFO: # loops 2
08:53:44:ST3_smx:INFO: # loops 3
08:53:45:ST3_smx:INFO: # loops 4
08:53:47:ST3_smx:INFO: Total # of broken channels: 0
08:53:47:ST3_smx:INFO: List of broken channels: []
08:53:47:ST3_smx:INFO: Total # of broken channels: 0
08:53:47:ST3_smx:INFO: List of broken channels: []
08:53:47:ST3_smx:INFO: Configuring SMX FAST
08:53:49:ST3_smx:INFO: chip: 1-6 34.556970 C 1206.851500 mV
08:53:49:ST3_smx:INFO: Electrons
08:53:49:ST3_smx:INFO: # loops 0
08:53:51:ST3_smx:INFO: # loops 1
08:53:52:ST3_smx:INFO: # loops 2
08:53:54:ST3_smx:INFO: # loops 3
08:53:55:ST3_smx:INFO: # loops 4
08:53:57:ST3_smx:INFO: Total # of broken channels: 0
08:53:57:ST3_smx:INFO: List of broken channels: []
08:53:57:ST3_smx:INFO: Total # of broken channels: 0
08:53:57:ST3_smx:INFO: List of broken channels: []
08:53:57:ST3_smx:INFO: Configuring SMX FAST
08:53:59:ST3_smx:INFO: chip: 8-7 31.389742 C 1212.728715 mV
08:53:59:ST3_smx:INFO: Electrons
08:53:59:ST3_smx:INFO: # loops 0
08:54:01:ST3_smx:INFO: # loops 1
08:54:02:ST3_smx:INFO: # loops 2
08:54:04:ST3_smx:INFO: # loops 3
08:54:06:ST3_smx:INFO: # loops 4
08:54:07:ST3_smx:INFO: Total # of broken channels: 0
08:54:07:ST3_smx:INFO: List of broken channels: []
08:54:07:ST3_smx:INFO: Total # of broken channels: 0
08:54:07:ST3_smx:INFO: List of broken channels: []
08:54:08:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:54:08:febtest:INFO: 7-0 | XA-000-08-002-000-005-106-14 | 34.6 | 1224.5
08:54:08:febtest:INFO: 14-1 | XA-000-08-002-000-005-098-14 | 34.6 | 1218.6
08:54:08:febtest:INFO: 5-2 | XA-000-08-002-000-005-108-14 | 40.9 | 1201.0
08:54:09:febtest:INFO: 12-3 | XA-000-08-002-000-005-100-14 | 53.6 | 1147.8
08:54:09:febtest:INFO: 3-4 | XA-000-08-002-000-000-098-05 | 47.3 | 1171.5
08:54:09:febtest:INFO: 10-5 | XA-000-08-002-000-005-067-00 | 34.6 | 1206.9
08:54:09:febtest:INFO: 1-6 | XA-000-08-002-000-005-064-00 | 34.6 | 1206.9
08:54:10:febtest:INFO: 8-7 | XA-000-08-002-000-005-099-14 | 31.4 | 1212.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_12_18-08_52_17
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L6DL200120 M6DL2T2001202A2 124 A
FEB_SN : 2068
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 23114
MODULE_NAME: L6DL200120 M6DL2T2001202A2 124 A
MODULE_TYPE:
MODULE_LADDER: L6DL200120
MODULE_MODULE: M6DL2T0001200A2
MODULE_SIZE: 22
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['2.450', '1.8820', '1.852', '0.4879', '7.000', '1.5470', '7.000', '1.5470']
VI_after__Init : ['2.450', '2.0060', '1.850', '0.6003', '7.000', '1.5480', '7.000', '1.5480']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
08:54:46:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2068/TestDate_2023_12_18-08_52_17/
13:38:56:febtest:INFO: FEB 8-2 selected
13:38:56:smx_tester:INFO: Setting Elink clock mode to 160 MHz
13:38:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:38:59:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
13:38:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:39:26:ST3_ModuleSelector:INFO: L4UL201031 M4UL2T1010311B2 42 A
13:39:26:ST3_ModuleSelector:INFO: 22242
13:39:26:febtest:INFO: Testing FEB with SN 2049
13:39:27:smx_tester:INFO: Scanning setup
13:39:27:elinks:INFO: Disabling clock on downlink 0
13:39:27:elinks:INFO: Disabling clock on downlink 1
13:39:27:elinks:INFO: Disabling clock on downlink 2
13:39:27:elinks:INFO: Disabling clock on downlink 3
13:39:27:elinks:INFO: Disabling clock on downlink 4
13:39:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:39:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14
13:39:27:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15
13:39:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:39:27:elinks:INFO: Disabling clock on downlink 0
13:39:27:elinks:INFO: Disabling clock on downlink 1
13:39:27:elinks:INFO: Disabling clock on downlink 2
13:39:27:elinks:INFO: Disabling clock on downlink 3
13:39:27:elinks:INFO: Disabling clock on downlink 4
13:39:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:39:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:39:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:39:27:elinks:INFO: Disabling clock on downlink 0
13:39:27:elinks:INFO: Disabling clock on downlink 1
13:39:27:elinks:INFO: Disabling clock on downlink 2
13:39:27:elinks:INFO: Disabling clock on downlink 3
13:39:27:elinks:INFO: Disabling clock on downlink 4
13:39:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:39:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:39:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:39:28:elinks:INFO: Disabling clock on downlink 0
13:39:28:elinks:INFO: Disabling clock on downlink 1
13:39:28:elinks:INFO: Disabling clock on downlink 2
13:39:28:elinks:INFO: Disabling clock on downlink 3
13:39:28:elinks:INFO: Disabling clock on downlink 4
13:39:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:39:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:39:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:39:28:elinks:INFO: Disabling clock on downlink 0
13:39:28:elinks:INFO: Disabling clock on downlink 1
13:39:28:elinks:INFO: Disabling clock on downlink 2
13:39:28:elinks:INFO: Disabling clock on downlink 3
13:39:28:elinks:INFO: Disabling clock on downlink 4
13:39:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:39:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:39:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:39:28:setup_element:INFO: Scanning clock phase
13:39:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:39:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:39:29:setup_element:INFO: Clock phase scan results for group 0, downlink 0
13:39:29:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:39:29:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:39:29:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:39:29:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:39:29:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:39:29:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:39:29:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:39:29:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:39:29:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:39:29:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:39:29:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
13:39:29:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
13:39:29:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:39:29:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:39:29:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:39:29:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:39:29:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 0
13:39:29:setup_element:INFO: Scanning data phases
13:39:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:39:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:39:34:setup_element:INFO: Data phase scan results for group 0, downlink 0
13:39:34:setup_element:INFO: Eye window for uplink 0 : ________________________________XXXX____
Data delay found: 13
13:39:34:setup_element:INFO: Eye window for uplink 1 : _____________________________XXXX_______
Data delay found: 10
13:39:34:setup_element:INFO: Eye window for uplink 2 : _______________________________XXXX_____
Data delay found: 12
13:39:34:setup_element:INFO: Eye window for uplink 3 : _____________________________XXXXX______
Data delay found: 11
13:39:34:setup_element:INFO: Eye window for uplink 4 : ________________________________XXX_____
Data delay found: 13
13:39:34:setup_element:INFO: Eye window for uplink 5 : ____________________________XXXX________
Data delay found: 9
13:39:34:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXX________
Data delay found: 9
13:39:34:setup_element:INFO: Eye window for uplink 7 : ________________________XXXXX___________
Data delay found: 6
13:39:34:setup_element:INFO: Eye window for uplink 8 : XXX__________________________________XXX
Data delay found: 19
13:39:34:setup_element:INFO: Eye window for uplink 9 : _XXXXXX_________________________________
Data delay found: 23
13:39:34:setup_element:INFO: Eye window for uplink 10: __XXXXXX________________________________
Data delay found: 24
13:39:34:setup_element:INFO: Eye window for uplink 11: _____XXXXXX_____________________________
Data delay found: 27
13:39:34:setup_element:INFO: Eye window for uplink 12: _____XXXXX______________________________
Data delay found: 27
13:39:34:setup_element:INFO: Eye window for uplink 13: ________XXXXX___________________________
Data delay found: 30
13:39:34:setup_element:INFO: Eye window for uplink 14: _______XXXXX____________________________
Data delay found: 29
13:39:34:setup_element:INFO: Eye window for uplink 15: __________XXXXX_________________________
Data delay found: 32
13:39:34:setup_element:INFO: Setting the data phase to 13 for uplink 0
13:39:34:setup_element:INFO: Setting the data phase to 10 for uplink 1
13:39:34:setup_element:INFO: Setting the data phase to 12 for uplink 2
13:39:34:setup_element:INFO: Setting the data phase to 11 for uplink 3
13:39:34:setup_element:INFO: Setting the data phase to 13 for uplink 4
13:39:34:setup_element:INFO: Setting the data phase to 9 for uplink 5
13:39:34:setup_element:INFO: Setting the data phase to 9 for uplink 6
13:39:34:setup_element:INFO: Setting the data phase to 6 for uplink 7
13:39:34:setup_element:INFO: Setting the data phase to 19 for uplink 8
13:39:34:setup_element:INFO: Setting the data phase to 23 for uplink 9
13:39:34:setup_element:INFO: Setting the data phase to 24 for uplink 10
13:39:34:setup_element:INFO: Setting the data phase to 27 for uplink 11
13:39:34:setup_element:INFO: Setting the data phase to 27 for uplink 12
13:39:34:setup_element:INFO: Setting the data phase to 30 for uplink 13
13:39:34:setup_element:INFO: Setting the data phase to 29 for uplink 14
13:39:34:setup_element:INFO: Setting the data phase to 32 for uplink 15
13:39:34:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: _______________________________________________________________________XXXXXXXX_
Uplink 9: _______________________________________________________________________XXXXXXXX_
Uplink 10: ________________________________________________________________________________
Uplink 11: ________________________________________________________________________________
Uplink 12: ________________________________________________________________________XXXXXXX_
Uplink 13: ________________________________________________________________________XXXXXXX_
Uplink 14: ________________________________________________________________________XXXXXXX_
Uplink 15: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 1:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 2:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 3:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 4:
Optimal Phase: 13
Window Length: 37
Eye Window: ________________________________XXX_____
Uplink 5:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 6:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 7:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 8:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 9:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 10:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 11:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 12:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 13:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 14:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 15:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
]
13:39:34:setup_element:INFO: Beginning SMX ASICs map scan
13:39:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:39:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:39:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
13:39:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
13:39:34:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:39:34:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7
13:39:34:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6
13:39:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14
13:39:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15
13:39:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5
13:39:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4
13:39:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12
13:39:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13
13:39:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3
13:39:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2
13:39:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
13:39:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11
13:39:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1
13:39:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0
13:39:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8
13:39:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9
13:39:37:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXX___
Uplink 5: ______________________________________________________________________XXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: _______________________________________________________________________XXXXXXXX_
Uplink 9: _______________________________________________________________________XXXXXXXX_
Uplink 10: ________________________________________________________________________________
Uplink 11: ________________________________________________________________________________
Uplink 12: ________________________________________________________________________XXXXXXX_
Uplink 13: ________________________________________________________________________XXXXXXX_
Uplink 14: ________________________________________________________________________XXXXXXX_
Uplink 15: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 1:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 2:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 3:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 4:
Optimal Phase: 13
Window Length: 37
Eye Window: ________________________________XXX_____
Uplink 5:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 6:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 7:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 8:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 9:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 10:
Optimal Phase: 24
Window Length: 34
Eye Window: __XXXXXX________________________________
Uplink 11:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 12:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 13:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 14:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 15:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
13:39:37:setup_element:INFO: Performing Elink synchronization
13:39:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:39:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:39:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
13:39:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
13:39:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
13:39:37:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:39:38:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)]
1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)]
2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)]
3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)]
4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)]
5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)]
6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)]
7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)]
13:39:38:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:39:39:febtest:INFO: 7-0 | XA-000-08-002-000-004-114-04 | 34.6 | 1177.4
13:39:39:febtest:INFO: 14-1 | XA-000-08-002-000-005-023-02 | -0.1 | 1294.5
13:39:39:febtest:INFO: 5-2 | XA-000-08-002-000-004-113-04 | 40.9 | 1147.8
13:39:39:febtest:INFO: 12-3 | XA-000-08-002-000-005-024-02 | 21.9 | 1218.6
13:39:40:febtest:INFO: 3-4 | XA-000-08-002-000-004-112-04 | 34.6 | 1171.5
13:39:40:febtest:INFO: 10-5 | XA-000-08-002-000-005-025-02 | 21.9 | 1206.9
13:39:40:febtest:INFO: 1-6 | XA-000-08-002-000-004-086-10 | 18.7 | 1230.3
13:39:40:febtest:INFO: 8-7 | XA-000-08-002-000-005-022-02 | -12.7 | 1329.2
13:39:41:ST3_smx:INFO: Configuring SMX FAST
13:39:42:ST3_smx:INFO: chip: 7-0 28.225000 C 1206.851500 mV
13:39:42:ST3_smx:INFO: Electrons
13:39:42:ST3_smx:INFO: # loops 0
13:39:44:ST3_smx:INFO: # loops 1
13:39:46:ST3_smx:INFO: # loops 2
13:39:47:ST3_smx:INFO: # loops 3
13:39:49:ST3_smx:INFO: # loops 4
13:39:50:ST3_smx:INFO: Total # of broken channels: 0
13:39:50:ST3_smx:INFO: List of broken channels: []
13:39:50:ST3_smx:INFO: Total # of broken channels: 0
13:39:50:ST3_smx:INFO: List of broken channels: []
13:39:51:ST3_smx:INFO: Configuring SMX FAST
13:39:53:ST3_smx:INFO: chip: 14-1 12.438562 C 1259.567515 mV
13:39:53:ST3_smx:INFO: Electrons
13:39:53:ST3_smx:INFO: # loops 0
13:39:54:ST3_smx:INFO: # loops 1
13:39:56:ST3_smx:INFO: # loops 2
13:39:57:ST3_smx:INFO: # loops 3
13:39:59:ST3_smx:INFO: # loops 4
13:40:00:ST3_smx:INFO: Total # of broken channels: 0
13:40:00:ST3_smx:INFO: List of broken channels: []
13:40:00:ST3_smx:INFO: Total # of broken channels: 0
13:40:00:ST3_smx:INFO: List of broken channels: []
13:40:01:ST3_smx:INFO: Configuring SMX FAST
13:40:03:ST3_smx:INFO: chip: 5-2 34.556970 C 1183.292940 mV
13:40:03:ST3_smx:INFO: Electrons
13:40:03:ST3_smx:INFO: # loops 0
13:40:04:ST3_smx:INFO: # loops 1
13:40:06:ST3_smx:INFO: # loops 2
13:40:07:ST3_smx:INFO: # loops 3
13:40:09:ST3_smx:INFO: # loops 4
13:40:11:ST3_smx:INFO: Total # of broken channels: 0
13:40:11:ST3_smx:INFO: List of broken channels: []
13:40:11:ST3_smx:INFO: Total # of broken channels: 0
13:40:11:ST3_smx:INFO: List of broken channels: []
13:40:11:ST3_smx:INFO: Configuring SMX FAST
13:40:13:ST3_smx:INFO: chip: 12-3 28.225000 C 1206.851500 mV
13:40:13:ST3_smx:INFO: Electrons
13:40:13:ST3_smx:INFO: # loops 0
13:40:14:ST3_smx:INFO: # loops 1
13:40:16:ST3_smx:INFO: # loops 2
13:40:18:ST3_smx:INFO: # loops 3
13:40:19:ST3_smx:INFO: # loops 4
13:40:21:ST3_smx:INFO: Total # of broken channels: 1
13:40:21:ST3_smx:INFO: List of broken channels: [126]
13:40:21:ST3_smx:INFO: Total # of broken channels: 1
13:40:21:ST3_smx:INFO: List of broken channels: [126]
13:40:21:ST3_smx:INFO: Configuring SMX FAST
13:40:23:ST3_smx:INFO: chip: 3-4 37.726682 C 1171.483840 mV
13:40:23:ST3_smx:INFO: Electrons
13:40:23:ST3_smx:INFO: # loops 0
13:40:25:ST3_smx:INFO: # loops 1
13:40:26:ST3_smx:INFO: # loops 2
13:40:28:ST3_smx:INFO: # loops 3
13:40:29:ST3_smx:INFO: # loops 4
13:40:31:ST3_smx:INFO: Total # of broken channels: 0
13:40:31:ST3_smx:INFO: List of broken channels: []
13:40:31:ST3_smx:INFO: Total # of broken channels: 0
13:40:31:ST3_smx:INFO: List of broken channels: []
13:40:31:ST3_smx:INFO: Configuring SMX FAST
13:40:33:ST3_smx:INFO: chip: 10-5 31.389742 C 1189.190035 mV
13:40:33:ST3_smx:INFO: Electrons
13:40:33:ST3_smx:INFO: # loops 0
13:40:35:ST3_smx:INFO: # loops 1
13:40:36:ST3_smx:INFO: # loops 2
13:40:38:ST3_smx:INFO: # loops 3
13:40:39:ST3_smx:INFO: # loops 4
13:40:41:ST3_smx:INFO: Total # of broken channels: 0
13:40:41:ST3_smx:INFO: List of broken channels: []
13:40:41:ST3_smx:INFO: Total # of broken channels: 0
13:40:41:ST3_smx:INFO: List of broken channels: []
13:40:41:ST3_smx:INFO: Configuring SMX FAST
13:40:43:ST3_smx:INFO: chip: 1-6 28.225000 C 1212.728715 mV
13:40:43:ST3_smx:INFO: Electrons
13:40:43:ST3_smx:INFO: # loops 0
13:40:45:ST3_smx:INFO: # loops 1
13:40:46:ST3_smx:INFO: # loops 2
13:40:48:ST3_smx:INFO: # loops 3
13:40:49:ST3_smx:INFO: # loops 4
13:40:51:ST3_smx:INFO: Total # of broken channels: 0
13:40:51:ST3_smx:INFO: List of broken channels: []
13:40:51:ST3_smx:INFO: Total # of broken channels: 0
13:40:51:ST3_smx:INFO: List of broken channels: []
13:40:51:ST3_smx:INFO: Configuring SMX FAST
13:40:53:ST3_smx:INFO: chip: 8-7 6.141382 C 1271.227515 mV
13:40:53:ST3_smx:INFO: Electrons
13:40:53:ST3_smx:INFO: # loops 0
13:40:55:ST3_smx:INFO: # loops 1
13:40:56:ST3_smx:INFO: # loops 2
13:40:58:ST3_smx:INFO: # loops 3
13:40:59:ST3_smx:INFO: # loops 4
13:41:01:ST3_smx:INFO: Total # of broken channels: 0
13:41:01:ST3_smx:INFO: List of broken channels: []
13:41:01:ST3_smx:INFO: Total # of broken channels: 1
13:41:01:ST3_smx:INFO: List of broken channels: [7]
13:41:02:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:41:02:febtest:INFO: 7-0 | XA-000-08-002-000-004-114-04 | 34.6 | 1206.9
13:41:02:febtest:INFO: 14-1 | XA-000-08-002-000-005-023-02 | 15.6 | 1259.6
13:41:02:febtest:INFO: 5-2 | XA-000-08-002-000-004-113-04 | 37.7 | 1183.3
13:41:03:febtest:INFO: 12-3 | XA-000-08-002-000-005-024-02 | 28.2 | 1201.0
13:41:03:febtest:INFO: 3-4 | XA-000-08-002-000-004-112-04 | 37.7 | 1171.5
13:41:03:febtest:INFO: 10-5 | XA-000-08-002-000-005-025-02 | 31.4 | 1189.2
13:41:03:febtest:INFO: 1-6 | XA-000-08-002-000-004-086-10 | 28.2 | 1212.7
13:41:04:febtest:INFO: 8-7 | XA-000-08-002-000-005-022-02 | 6.1 | 1271.2
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_12_19-13_38_59
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL201031 M4UL2T1010311B2 42 A
FEB_SN : 2049
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 22242
MODULE_NAME: L4UL201031 M4UL2T1010311B2 42 A
MODULE_TYPE:
MODULE_LADDER: L4UL201031
MODULE_MODULE: M4UL2T1010311B2
MODULE_SIZE: 42
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['2.450', '1.7900', '1.851', '0.4962', '7.000', '1.5480', '7.000', '1.5480']
VI_after__Init : ['2.450', '1.9610', '1.850', '0.5550', '7.000', '1.5490', '7.000', '1.5490']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:41:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:41:05:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
13:41:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:41:07:ST3_ModuleSelector:INFO: L4UL201031 M4UL2T1010311B2 42 A
13:41:07:ST3_ModuleSelector:INFO: 22242
13:41:07:febtest:INFO: Testing FEB with SN 2049
13:41:08:smx_tester:INFO: Scanning setup
13:41:08:elinks:INFO: Disabling clock on downlink 0
13:41:08:elinks:INFO: Disabling clock on downlink 1
13:41:08:elinks:INFO: Disabling clock on downlink 2
13:41:08:elinks:INFO: Disabling clock on downlink 3
13:41:08:elinks:INFO: Disabling clock on downlink 4
13:41:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14
13:41:08:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15
13:41:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:08:elinks:INFO: Disabling clock on downlink 0
13:41:08:elinks:INFO: Disabling clock on downlink 1
13:41:08:elinks:INFO: Disabling clock on downlink 2
13:41:08:elinks:INFO: Disabling clock on downlink 3
13:41:08:elinks:INFO: Disabling clock on downlink 4
13:41:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:41:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:08:elinks:INFO: Disabling clock on downlink 0
13:41:08:elinks:INFO: Disabling clock on downlink 1
13:41:08:elinks:INFO: Disabling clock on downlink 2
13:41:08:elinks:INFO: Disabling clock on downlink 3
13:41:09:elinks:INFO: Disabling clock on downlink 4
13:41:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:41:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:09:elinks:INFO: Disabling clock on downlink 0
13:41:09:elinks:INFO: Disabling clock on downlink 1
13:41:09:elinks:INFO: Disabling clock on downlink 2
13:41:09:elinks:INFO: Disabling clock on downlink 3
13:41:09:elinks:INFO: Disabling clock on downlink 4
13:41:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:41:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:09:elinks:INFO: Disabling clock on downlink 0
13:41:09:elinks:INFO: Disabling clock on downlink 1
13:41:09:elinks:INFO: Disabling clock on downlink 2
13:41:09:elinks:INFO: Disabling clock on downlink 3
13:41:09:elinks:INFO: Disabling clock on downlink 4
13:41:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:41:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:41:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:41:09:setup_element:INFO: Scanning clock phase
13:41:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:41:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:41:09:setup_element:INFO: Clock phase scan results for group 0, downlink 0
13:41:09:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:41:09:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:41:09:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:41:09:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:41:09:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:41:09:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:41:09:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:41:09:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:41:09:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:41:09:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:41:09:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:41:09:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
13:41:09:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:41:09:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:41:09:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:41:09:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
13:41:09:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 0
13:41:09:setup_element:INFO: Scanning data phases
13:41:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:41:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:41:15:setup_element:INFO: Data phase scan results for group 0, downlink 0
13:41:15:setup_element:INFO: Eye window for uplink 0 : _______________________________XXXXX____
Data delay found: 13
13:41:15:setup_element:INFO: Eye window for uplink 1 : ____________________________XXXX________
Data delay found: 9
13:41:15:setup_element:INFO: Eye window for uplink 2 : ______________________________XXXXX_____
Data delay found: 12
13:41:15:setup_element:INFO: Eye window for uplink 3 : ____________________________XXXXX_______
Data delay found: 10
13:41:15:setup_element:INFO: Eye window for uplink 4 : ______________________________XXXXX_____
Data delay found: 12
13:41:15:setup_element:INFO: Eye window for uplink 5 : ___________________________XXXX_________
Data delay found: 8
13:41:15:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXXX_______
Data delay found: 10
13:41:15:setup_element:INFO: Eye window for uplink 7 : ________________________XXXXX___________
Data delay found: 6
13:41:15:setup_element:INFO: Eye window for uplink 8 : XX___________________________________XXX
Data delay found: 19
13:41:15:setup_element:INFO: Eye window for uplink 9 : _XXXXX__________________________________
Data delay found: 23
13:41:15:setup_element:INFO: Eye window for uplink 10: __XXXXX_________________________________
Data delay found: 24
13:41:15:setup_element:INFO: Eye window for uplink 11: _____XXXXX______________________________
Data delay found: 27
13:41:15:setup_element:INFO: Eye window for uplink 12: _____XXXXX______________________________
Data delay found: 27
13:41:15:setup_element:INFO: Eye window for uplink 13: ________XXXXX___________________________
Data delay found: 30
13:41:15:setup_element:INFO: Eye window for uplink 14: ______XXXXX_____________________________
Data delay found: 28
13:41:15:setup_element:INFO: Eye window for uplink 15: __________XXXX__________________________
Data delay found: 31
13:41:15:setup_element:INFO: Setting the data phase to 13 for uplink 0
13:41:15:setup_element:INFO: Setting the data phase to 9 for uplink 1
13:41:15:setup_element:INFO: Setting the data phase to 12 for uplink 2
13:41:15:setup_element:INFO: Setting the data phase to 10 for uplink 3
13:41:15:setup_element:INFO: Setting the data phase to 12 for uplink 4
13:41:15:setup_element:INFO: Setting the data phase to 8 for uplink 5
13:41:15:setup_element:INFO: Setting the data phase to 10 for uplink 6
13:41:15:setup_element:INFO: Setting the data phase to 6 for uplink 7
13:41:15:setup_element:INFO: Setting the data phase to 19 for uplink 8
13:41:15:setup_element:INFO: Setting the data phase to 23 for uplink 9
13:41:15:setup_element:INFO: Setting the data phase to 24 for uplink 10
13:41:15:setup_element:INFO: Setting the data phase to 27 for uplink 11
13:41:15:setup_element:INFO: Setting the data phase to 27 for uplink 12
13:41:15:setup_element:INFO: Setting the data phase to 30 for uplink 13
13:41:15:setup_element:INFO: Setting the data phase to 28 for uplink 14
13:41:15:setup_element:INFO: Setting the data phase to 31 for uplink 15
13:41:15:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: _____________________________________________________________________XXXXXXXX___
Uplink 7: _____________________________________________________________________XXXXXXXX___
Uplink 8: _______________________________________________________________________XXXXXXXX_
Uplink 9: _______________________________________________________________________XXXXXXXX_
Uplink 10: _______________________________________________________________________XXXXXXXXX
Uplink 11: _______________________________________________________________________XXXXXXXXX
Uplink 12: ________________________________________________________________________XXXXXXX_
Uplink 13: ________________________________________________________________________XXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 1:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 2:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 3:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 4:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 5:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 6:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 7:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 8:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 9:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 10:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 11:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 12:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 13:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 14:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 15:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
]
13:41:15:setup_element:INFO: Beginning SMX ASICs map scan
13:41:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:41:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:41:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
13:41:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
13:41:15:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:41:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7
13:41:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6
13:41:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14
13:41:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15
13:41:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5
13:41:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4
13:41:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12
13:41:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13
13:41:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3
13:41:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2
13:41:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
13:41:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11
13:41:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1
13:41:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0
13:41:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8
13:41:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9
13:41:18:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXX__
Uplink 1: ________________________________________________________________________XXXXXX__
Uplink 2: _______________________________________________________________________XXXXXXXX_
Uplink 3: _______________________________________________________________________XXXXXXXX_
Uplink 4: ______________________________________________________________________XXXXXXXX__
Uplink 5: ______________________________________________________________________XXXXXXXX__
Uplink 6: _____________________________________________________________________XXXXXXXX___
Uplink 7: _____________________________________________________________________XXXXXXXX___
Uplink 8: _______________________________________________________________________XXXXXXXX_
Uplink 9: _______________________________________________________________________XXXXXXXX_
Uplink 10: _______________________________________________________________________XXXXXXXXX
Uplink 11: _______________________________________________________________________XXXXXXXXX
Uplink 12: ________________________________________________________________________XXXXXXX_
Uplink 13: ________________________________________________________________________XXXXXXX_
Uplink 14: _______________________________________________________________________XXXXXXXX_
Uplink 15: _______________________________________________________________________XXXXXXXX_
Data phase characteristics:
Uplink 0:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 1:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 2:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 3:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 4:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 5:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 6:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 7:
Optimal Phase: 6
Window Length: 35
Eye Window: ________________________XXXXX___________
Uplink 8:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 9:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 10:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 11:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 12:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 13:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 14:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 15:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
13:41:18:setup_element:INFO: Performing Elink synchronization
13:41:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:41:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
13:41:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
13:41:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
13:41:18:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
13:41:18:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:41:18:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)]
1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)]
2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)]
3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)]
4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)]
5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)]
6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)]
7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_14
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_8
13:41:19:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:41:20:febtest:INFO: 7-0 | XA-000-08-002-000-004-114-04 | 40.9 | 1171.5
13:41:20:febtest:INFO: 14-1 | XA-000-08-002-000-005-023-02 | 9.3 | 1288.7
13:41:20:febtest:INFO: 5-2 | XA-000-08-002-000-004-113-04 | 47.3 | 1147.8
13:41:20:febtest:INFO: 12-3 | XA-000-08-002-000-005-024-02 | 25.1 | 1218.6
13:41:21:febtest:INFO: 3-4 | XA-000-08-002-000-004-112-04 | 40.9 | 1171.5
13:41:21:febtest:INFO: 10-5 | XA-000-08-002-000-005-025-02 | 25.1 | 1212.7
13:41:21:febtest:INFO: 1-6 | XA-000-08-002-000-004-086-10 | 21.9 | 1230.3
13:41:21:febtest:INFO: 8-7 | XA-000-08-002-000-005-022-02 | -9.6 | 1323.5
13:41:22:ST3_smx:INFO: Configuring SMX FAST
13:41:23:ST3_smx:INFO: chip: 7-0 34.556970 C 1200.969315 mV
13:41:24:ST3_smx:INFO: Electrons
13:41:24:ST3_smx:INFO: # loops 0
13:41:25:ST3_smx:INFO: # loops 1
13:41:27:ST3_smx:INFO: # loops 2
13:41:28:ST3_smx:INFO: # loops 3
13:41:30:ST3_smx:INFO: # loops 4
13:41:31:ST3_smx:INFO: Total # of broken channels: 0
13:41:31:ST3_smx:INFO: List of broken channels: []
13:41:31:ST3_smx:INFO: Total # of broken channels: 0
13:41:31:ST3_smx:INFO: List of broken channels: []
13:41:32:ST3_smx:INFO: Configuring SMX FAST
13:41:34:ST3_smx:INFO: chip: 14-1 18.745682 C 1253.730060 mV
13:41:34:ST3_smx:INFO: Electrons
13:41:34:ST3_smx:INFO: # loops 0
13:41:35:ST3_smx:INFO: # loops 1
13:41:37:ST3_smx:INFO: # loops 2
13:41:39:ST3_smx:INFO: # loops 3
13:41:40:ST3_smx:INFO: # loops 4
13:41:42:ST3_smx:INFO: Total # of broken channels: 0
13:41:42:ST3_smx:INFO: List of broken channels: []
13:41:42:ST3_smx:INFO: Total # of broken channels: 0
13:41:42:ST3_smx:INFO: List of broken channels: []
13:41:42:ST3_smx:INFO: Configuring SMX FAST
13:41:44:ST3_smx:INFO: chip: 5-2 37.726682 C 1183.292940 mV
13:41:44:ST3_smx:INFO: Electrons
13:41:44:ST3_smx:INFO: # loops 0
13:41:46:ST3_smx:INFO: # loops 1
13:41:47:ST3_smx:INFO: # loops 2
13:41:49:ST3_smx:INFO: # loops 3
13:41:51:ST3_smx:INFO: # loops 4
13:41:52:ST3_smx:INFO: Total # of broken channels: 0
13:41:52:ST3_smx:INFO: List of broken channels: []
13:41:52:ST3_smx:INFO: Total # of broken channels: 0
13:41:52:ST3_smx:INFO: List of broken channels: []
13:41:53:ST3_smx:INFO: Configuring SMX FAST
13:41:54:ST3_smx:INFO: chip: 12-3 31.389742 C 1200.969315 mV
13:41:54:ST3_smx:INFO: Electrons
13:41:54:ST3_smx:INFO: # loops 0
13:41:56:ST3_smx:INFO: # loops 1
13:41:58:ST3_smx:INFO: # loops 2
13:41:59:ST3_smx:INFO: # loops 3
13:42:01:ST3_smx:INFO: # loops 4
13:42:02:ST3_smx:INFO: Total # of broken channels: 0
13:42:02:ST3_smx:INFO: List of broken channels: []
13:42:02:ST3_smx:INFO: Total # of broken channels: 0
13:42:02:ST3_smx:INFO: List of broken channels: []
13:42:03:ST3_smx:INFO: Configuring SMX FAST
13:42:05:ST3_smx:INFO: chip: 3-4 40.898880 C 1171.483840 mV
13:42:05:ST3_smx:INFO: Electrons
13:42:05:ST3_smx:INFO: # loops 0
13:42:06:ST3_smx:INFO: # loops 1
13:42:08:ST3_smx:INFO: # loops 2
13:42:09:ST3_smx:INFO: # loops 3
13:42:11:ST3_smx:INFO: # loops 4
13:42:12:ST3_smx:INFO: Total # of broken channels: 0
13:42:12:ST3_smx:INFO: List of broken channels: []
13:42:12:ST3_smx:INFO: Total # of broken channels: 0
13:42:12:ST3_smx:INFO: List of broken channels: []
13:42:13:ST3_smx:INFO: Configuring SMX FAST
13:42:15:ST3_smx:INFO: chip: 10-5 31.389742 C 1189.190035 mV
13:42:15:ST3_smx:INFO: Electrons
13:42:15:ST3_smx:INFO: # loops 0
13:42:16:ST3_smx:INFO: # loops 1
13:42:18:ST3_smx:INFO: # loops 2
13:42:20:ST3_smx:INFO: # loops 3
13:42:21:ST3_smx:INFO: # loops 4
13:42:23:ST3_smx:INFO: Total # of broken channels: 0
13:42:23:ST3_smx:INFO: List of broken channels: []
13:42:23:ST3_smx:INFO: Total # of broken channels: 0
13:42:23:ST3_smx:INFO: List of broken channels: []
13:42:23:ST3_smx:INFO: Configuring SMX FAST
13:42:25:ST3_smx:INFO: chip: 1-6 28.225000 C 1212.728715 mV
13:42:25:ST3_smx:INFO: Electrons
13:42:25:ST3_smx:INFO: # loops 0
13:42:27:ST3_smx:INFO: # loops 1
13:42:28:ST3_smx:INFO: # loops 2
13:42:30:ST3_smx:INFO: # loops 3
13:42:31:ST3_smx:INFO: # loops 4
13:42:33:ST3_smx:INFO: Total # of broken channels: 0
13:42:33:ST3_smx:INFO: List of broken channels: []
13:42:33:ST3_smx:INFO: Total # of broken channels: 0
13:42:33:ST3_smx:INFO: List of broken channels: []
13:42:33:ST3_smx:INFO: Configuring SMX FAST
13:42:35:ST3_smx:INFO: chip: 8-7 9.288730 C 1265.400000 mV
13:42:35:ST3_smx:INFO: Electrons
13:42:35:ST3_smx:INFO: # loops 0
13:42:37:ST3_smx:INFO: # loops 1
13:42:39:ST3_smx:INFO: # loops 2
13:42:40:ST3_smx:INFO: # loops 3
13:42:42:ST3_smx:INFO: # loops 4
13:42:44:ST3_smx:INFO: Total # of broken channels: 0
13:42:44:ST3_smx:INFO: List of broken channels: []
13:42:44:ST3_smx:INFO: Total # of broken channels: 0
13:42:44:ST3_smx:INFO: List of broken channels: []
13:42:45:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:42:45:febtest:INFO: 7-0 | XA-000-08-002-000-004-114-04 | 34.6 | 1206.9
13:42:45:febtest:INFO: 14-1 | XA-000-08-002-000-005-023-02 | 18.7 | 1259.6
13:42:45:febtest:INFO: 5-2 | XA-000-08-002-000-004-113-04 | 37.7 | 1183.3
13:42:45:febtest:INFO: 12-3 | XA-000-08-002-000-005-024-02 | 31.4 | 1201.0
13:42:45:febtest:INFO: 3-4 | XA-000-08-002-000-004-112-04 | 40.9 | 1171.5
13:42:46:febtest:INFO: 10-5 | XA-000-08-002-000-005-025-02 | 34.6 | 1189.2
13:42:46:febtest:INFO: 1-6 | XA-000-08-002-000-004-086-10 | 28.2 | 1212.7
13:42:46:febtest:INFO: 8-7 | XA-000-08-002-000-005-022-02 | 9.3 | 1265.4
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_12_19-13_41_05
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL201031 M4UL2T1010311B2 42 A
FEB_SN : 2049
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 22242
MODULE_NAME: L4UL201031 M4UL2T1010311B2 42 A
MODULE_TYPE:
MODULE_LADDER: L4UL201031
MODULE_MODULE: M4UL2T1010311B2
MODULE_SIZE: 42
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['2.450', '1.7800', '1.851', '0.4752', '7.000', '1.5490', '7.000', '1.5490']
VI_after__Init : ['2.450', '1.9620', '1.850', '0.5711', '7.000', '1.5490', '7.000', '1.5490']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:42:53:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2049/TestDate_2023_12_19-13_41_05/