
FEB_2050 02.01.24 08:07:34
TextEdit.txt
08:04:35:ST3_hmp4040:INFO: 08:04:41:ST3_Shared:INFO: Listo of operators:Olga B.; 08:04:42:ST3_Shared:INFO: Listo of operators:Olga B.; Oleksandr S.; Using config file: /home/cbm/ipbus-software/controlhub/sys.config Starting ControlHub ... ok 08:05:00:febtest:INFO: FEB 8-2 selected 08:05:00:smx_tester:INFO: Setting Elink clock mode to 160 MHz 08:05:08:febtest:INFO: FEB 8-2 selected 08:05:08:smx_tester:INFO: Setting Elink clock mode to 160 MHz 08:05:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:05:11:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 08:05:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:05:48:ST3_ModuleSelector:INFO: 08:05:48:ST3_ModuleSelector:INFO: 08:05:48:febtest:INFO: Testing FEB with SN 2050 08:05:50:smx_tester:INFO: Scanning setup 08:05:50:elinks:INFO: Disabling clock on downlink 0 08:05:50:elinks:INFO: Disabling clock on downlink 1 08:05:50:elinks:INFO: Disabling clock on downlink 2 08:05:50:elinks:INFO: Disabling clock on downlink 3 08:05:50:elinks:INFO: Disabling clock on downlink 4 08:05:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:05:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14 08:05:50:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15 08:05:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:05:50:elinks:INFO: Disabling clock on downlink 0 08:05:50:elinks:INFO: Disabling clock on downlink 1 08:05:50:elinks:INFO: Disabling clock on downlink 2 08:05:50:elinks:INFO: Disabling clock on downlink 3 08:05:50:elinks:INFO: Disabling clock on downlink 4 08:05:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:05:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:05:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:05:50:elinks:INFO: Disabling clock on downlink 0 08:05:50:elinks:INFO: Disabling clock on downlink 1 08:05:50:elinks:INFO: Disabling clock on downlink 2 08:05:50:elinks:INFO: Disabling clock on downlink 3 08:05:50:elinks:INFO: Disabling clock on downlink 4 08:05:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:05:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:05:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:05:50:elinks:INFO: Disabling clock on downlink 0 08:05:50:elinks:INFO: Disabling clock on downlink 1 08:05:50:elinks:INFO: Disabling clock on downlink 2 08:05:50:elinks:INFO: Disabling clock on downlink 3 08:05:50:elinks:INFO: Disabling clock on downlink 4 08:05:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:05:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:05:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:05:50:elinks:INFO: Disabling clock on downlink 0 08:05:50:elinks:INFO: Disabling clock on downlink 1 08:05:50:elinks:INFO: Disabling clock on downlink 2 08:05:50:elinks:INFO: Disabling clock on downlink 3 08:05:50:elinks:INFO: Disabling clock on downlink 4 08:05:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:05:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:05:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:05:51:setup_element:INFO: Scanning clock phase 08:05:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:05:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:05:51:setup_element:INFO: Clock phase scan results for group 0, downlink 0 08:05:51:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:05:51:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:05:51:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:05:51:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:05:51:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 08:05:51:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXX___ Clock Delay: 33 08:05:51:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________________ Clock Delay: 40 08:05:51:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________________ Clock Delay: 40 08:05:51:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:05:51:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:05:51:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:05:51:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:05:51:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:05:51:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:05:51:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXXX Clock Delay: 35 08:05:51:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXXX Clock Delay: 35 08:05:51:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 0 08:05:51:setup_element:INFO: Scanning data phases 08:05:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:05:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:05:57:setup_element:INFO: Data phase scan results for group 0, downlink 0 08:05:57:setup_element:INFO: Eye window for uplink 0 : ________________________________XXXXX___ Data delay found: 14 08:05:57:setup_element:INFO: Eye window for uplink 1 : _____________________________XXXX_______ Data delay found: 10 08:05:57:setup_element:INFO: Eye window for uplink 2 : ________________________________XXXXX___ Data delay found: 14 08:05:57:setup_element:INFO: Eye window for uplink 3 : ______________________________XXXXX_____ Data delay found: 12 08:05:57:setup_element:INFO: Eye window for uplink 4 : __________________________________XXXX__ Data delay found: 15 08:05:57:setup_element:INFO: Eye window for uplink 5 : _____________________________XXXXX______ Data delay found: 11 08:05:57:setup_element:INFO: Eye window for uplink 6 : _____________________________XXXXX______ Data delay found: 11 08:05:57:setup_element:INFO: Eye window for uplink 7 : _________________________XXXXXX_________ Data delay found: 7 08:05:57:setup_element:INFO: Eye window for uplink 8 : XXX___________________________________XX Data delay found: 20 08:05:57:setup_element:INFO: Eye window for uplink 9 : ___XXXXX________________________________ Data delay found: 25 08:05:57:setup_element:INFO: Eye window for uplink 10: _XXXXXX_________________________________ Data delay found: 23 08:05:57:setup_element:INFO: Eye window for uplink 11: ____XXXXXX______________________________ Data delay found: 26 08:05:57:setup_element:INFO: Eye window for uplink 12: _____XXXXX______________________________ Data delay found: 27 08:05:57:setup_element:INFO: Eye window for uplink 13: _______XXXXXX___________________________ Data delay found: 29 08:05:57:setup_element:INFO: Eye window for uplink 14: __________XXXX__________________________ Data delay found: 31 08:05:57:setup_element:INFO: Eye window for uplink 15: ____________XXXXX_______________________ Data delay found: 34 08:05:57:setup_element:INFO: Setting the data phase to 14 for uplink 0 08:05:57:setup_element:INFO: Setting the data phase to 10 for uplink 1 08:05:57:setup_element:INFO: Setting the data phase to 14 for uplink 2 08:05:57:setup_element:INFO: Setting the data phase to 12 for uplink 3 08:05:57:setup_element:INFO: Setting the data phase to 15 for uplink 4 08:05:57:setup_element:INFO: Setting the data phase to 11 for uplink 5 08:05:57:setup_element:INFO: Setting the data phase to 11 for uplink 6 08:05:57:setup_element:INFO: Setting the data phase to 7 for uplink 7 08:05:57:setup_element:INFO: Setting the data phase to 20 for uplink 8 08:05:57:setup_element:INFO: Setting the data phase to 25 for uplink 9 08:05:57:setup_element:INFO: Setting the data phase to 23 for uplink 10 08:05:57:setup_element:INFO: Setting the data phase to 26 for uplink 11 08:05:57:setup_element:INFO: Setting the data phase to 27 for uplink 12 08:05:57:setup_element:INFO: Setting the data phase to 29 for uplink 13 08:05:57:setup_element:INFO: Setting the data phase to 31 for uplink 14 08:05:57:setup_element:INFO: Setting the data phase to 34 for uplink 15 08:05:57:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _______________________________________________________________________XXXXXX___ Uplink 5: _______________________________________________________________________XXXXXX___ Uplink 6: ________________________________________________________________________________ Uplink 7: ________________________________________________________________________________ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: ______________________________________________________________________XXXXXXXX__ Uplink 11: ______________________________________________________________________XXXXXXXX__ Uplink 12: _______________________________________________________________________XXXXXXXX_ Uplink 13: _______________________________________________________________________XXXXXXXX_ Uplink 14: ________________________________________________________________________XXXXXXXX Uplink 15: ________________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 1: Optimal Phase: 10 Window Length: 36 Eye Window: _____________________________XXXX_______ Uplink 2: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 3: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 4: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 5: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 6: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 7: Optimal Phase: 7 Window Length: 34 Eye Window: _________________________XXXXXX_________ Uplink 8: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 9: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 10: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 11: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 12: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 13: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ Uplink 14: Optimal Phase: 31 Window Length: 36 Eye Window: __________XXXX__________________________ Uplink 15: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ ] 08:05:57:setup_element:INFO: Beginning SMX ASICs map scan 08:05:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:05:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:05:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 08:05:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 08:05:57:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:05:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7 08:05:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6 08:05:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14 08:05:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15 08:05:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5 08:05:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4 08:05:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12 08:05:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13 08:05:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3 08:05:58:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2 08:05:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10 08:05:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11 08:05:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1 08:05:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0 08:05:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8 08:05:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9 08:06:00:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15) ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 0: _______________________________________________________________________XXXXXXXX_ Uplink 1: _______________________________________________________________________XXXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _______________________________________________________________________XXXXXX___ Uplink 5: _______________________________________________________________________XXXXXX___ Uplink 6: ________________________________________________________________________________ Uplink 7: ________________________________________________________________________________ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: ______________________________________________________________________XXXXXXXX__ Uplink 11: ______________________________________________________________________XXXXXXXX__ Uplink 12: _______________________________________________________________________XXXXXXXX_ Uplink 13: _______________________________________________________________________XXXXXXXX_ Uplink 14: ________________________________________________________________________XXXXXXXX Uplink 15: ________________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 1: Optimal Phase: 10 Window Length: 36 Eye Window: _____________________________XXXX_______ Uplink 2: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 3: Optimal Phase: 12 Window Length: 35 Eye Window: ______________________________XXXXX_____ Uplink 4: Optimal Phase: 15 Window Length: 36 Eye Window: __________________________________XXXX__ Uplink 5: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 6: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 7: Optimal Phase: 7 Window Length: 34 Eye Window: _________________________XXXXXX_________ Uplink 8: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 9: Optimal Phase: 25 Window Length: 35 Eye Window: ___XXXXX________________________________ Uplink 10: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 11: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 12: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 13: Optimal Phase: 29 Window Length: 34 Eye Window: _______XXXXXX___________________________ Uplink 14: Optimal Phase: 31 Window Length: 36 Eye Window: __________XXXX__________________________ Uplink 15: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ 08:06:00:setup_element:INFO: Performing Elink synchronization 08:06:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:06:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:06:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 08:06:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 08:06:00:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 08:06:00:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:06:00:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)] 1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)] 2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)] 3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)] 4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)] 5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)] 6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)] 7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)] 08:06:01:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:06:01:febtest:INFO: 7-0 | XA-000-08-002-000-003-238-01 | 21.9 | 1218.6 08:06:02:febtest:INFO: 14-1 | XA-000-08-002-000-005-015-05 | 15.6 | 1242.0 08:06:02:febtest:INFO: 5-2 | XA-000-08-002-000-004-059-01 | 40.9 | 1153.7 08:06:02:febtest:INFO: 12-3 | XA-000-08-002-000-005-009-05 | 18.7 | 1224.5 08:06:02:febtest:INFO: 3-4 | XA-000-08-002-000-003-177-03 | 34.6 | 1183.3 08:06:03:febtest:INFO: 10-5 | XA-000-08-002-000-005-012-05 | 12.4 | 1242.0 08:06:03:febtest:INFO: 1-6 | XA-000-08-002-000-001-000-03 | 31.4 | 1189.2 08:06:03:febtest:INFO: 8-7 | XA-000-08-002-000-005-013-05 | 28.2 | 1177.4 08:06:03:ST3_smx:INFO: Configuring SMX FAST 08:06:05:ST3_smx:INFO: chip: 7-0 18.745682 C 1224.468235 mV 08:06:05:ST3_smx:INFO: Electrons 08:06:05:ST3_smx:INFO: # loops 0 08:06:07:ST3_smx:INFO: # loops 1 08:06:09:ST3_smx:INFO: # loops 2 08:06:10:ST3_smx:INFO: # loops 3 08:06:12:ST3_smx:INFO: # loops 4 08:06:14:ST3_smx:INFO: Total # of broken channels: 0 08:06:14:ST3_smx:INFO: List of broken channels: [] 08:06:14:ST3_smx:INFO: Total # of broken channels: 2 08:06:14:ST3_smx:INFO: List of broken channels: [45, 49] 08:06:14:ST3_smx:INFO: Configuring SMX FAST 08:06:16:ST3_smx:INFO: chip: 14-1 25.062742 C 1206.851500 mV 08:06:16:ST3_smx:INFO: Electrons 08:06:16:ST3_smx:INFO: # loops 0 08:06:18:ST3_smx:INFO: # loops 1 08:06:19:ST3_smx:INFO: # loops 2 08:06:21:ST3_smx:INFO: # loops 3 08:06:22:ST3_smx:INFO: # loops 4 08:06:24:ST3_smx:INFO: Total # of broken channels: 0 08:06:24:ST3_smx:INFO: List of broken channels: [] 08:06:24:ST3_smx:INFO: Total # of broken channels: 1 08:06:24:ST3_smx:INFO: List of broken channels: [41] 08:06:24:ST3_smx:INFO: Configuring SMX FAST 08:06:26:ST3_smx:INFO: chip: 5-2 34.556970 C 1183.292940 mV 08:06:26:ST3_smx:INFO: Electrons 08:06:26:ST3_smx:INFO: # loops 0 08:06:28:ST3_smx:INFO: # loops 1 08:06:30:ST3_smx:INFO: # loops 2 08:06:31:ST3_smx:INFO: # loops 3 08:06:33:ST3_smx:INFO: # loops 4 08:06:34:ST3_smx:INFO: Total # of broken channels: 0 08:06:34:ST3_smx:INFO: List of broken channels: [] 08:06:34:ST3_smx:INFO: Total # of broken channels: 0 08:06:34:ST3_smx:INFO: List of broken channels: [] 08:06:35:ST3_smx:INFO: Configuring SMX FAST 08:06:37:ST3_smx:INFO: chip: 12-3 25.062742 C 1218.600960 mV 08:06:37:ST3_smx:INFO: Electrons 08:06:37:ST3_smx:INFO: # loops 0 08:06:38:ST3_smx:INFO: # loops 1 08:06:40:ST3_smx:INFO: # loops 2 08:06:42:ST3_smx:INFO: # loops 3 08:06:43:ST3_smx:INFO: # loops 4 08:06:45:ST3_smx:INFO: Total # of broken channels: 0 08:06:45:ST3_smx:INFO: List of broken channels: [] 08:06:45:ST3_smx:INFO: Total # of broken channels: 0 08:06:45:ST3_smx:INFO: List of broken channels: [] 08:06:45:ST3_smx:INFO: Configuring SMX FAST 08:06:47:ST3_smx:INFO: chip: 3-4 31.389742 C 1200.969315 mV 08:06:47:ST3_smx:INFO: Electrons 08:06:47:ST3_smx:INFO: # loops 0 08:06:49:ST3_smx:INFO: # loops 1 08:06:51:ST3_smx:INFO: # loops 2 08:06:52:ST3_smx:INFO: # loops 3 08:06:54:ST3_smx:INFO: # loops 4 08:06:55:ST3_smx:INFO: Total # of broken channels: 0 08:06:55:ST3_smx:INFO: List of broken channels: [] 08:06:55:ST3_smx:INFO: Total # of broken channels: 0 08:06:55:ST3_smx:INFO: List of broken channels: [] 08:06:56:ST3_smx:INFO: Configuring SMX FAST 08:06:58:ST3_smx:INFO: chip: 10-5 18.745682 C 1230.330540 mV 08:06:58:ST3_smx:INFO: Electrons 08:06:58:ST3_smx:INFO: # loops 0 08:07:00:ST3_smx:INFO: # loops 1 08:07:02:ST3_smx:INFO: # loops 2 08:07:03:ST3_smx:INFO: # loops 3 08:07:05:ST3_smx:INFO: # loops 4 08:07:06:ST3_smx:INFO: Total # of broken channels: 1 08:07:06:ST3_smx:INFO: List of broken channels: [102] 08:07:06:ST3_smx:INFO: Total # of broken channels: 1 08:07:06:ST3_smx:INFO: List of broken channels: [102] 08:07:07:ST3_smx:INFO: Configuring SMX FAST 08:07:09:ST3_smx:INFO: chip: 1-6 44.073563 C 1147.806000 mV 08:07:09:ST3_smx:INFO: Electrons 08:07:09:ST3_smx:INFO: # loops 0 08:07:10:ST3_smx:INFO: # loops 1 08:07:12:ST3_smx:INFO: # loops 2 08:07:14:ST3_smx:INFO: # loops 3 08:07:15:ST3_smx:INFO: # loops 4 08:07:17:ST3_smx:INFO: Total # of broken channels: 0 08:07:17:ST3_smx:INFO: List of broken channels: [] 08:07:17:ST3_smx:INFO: Total # of broken channels: 0 08:07:17:ST3_smx:INFO: List of broken channels: [] 08:07:17:ST3_smx:INFO: Configuring SMX FAST 08:07:19:ST3_smx:INFO: chip: 8-7 25.062742 C 1200.969315 mV 08:07:19:ST3_smx:INFO: Electrons 08:07:19:ST3_smx:INFO: # loops 0 08:07:21:ST3_smx:INFO: # loops 1 08:07:23:ST3_smx:INFO: # loops 2 08:07:24:ST3_smx:INFO: # loops 3 08:07:26:ST3_smx:INFO: # loops 4 08:07:27:ST3_smx:INFO: Total # of broken channels: 0 08:07:27:ST3_smx:INFO: List of broken channels: [] 08:07:27:ST3_smx:INFO: Total # of broken channels: 5 08:07:27:ST3_smx:INFO: List of broken channels: [3, 7, 9, 11, 17] 08:07:28:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:07:28:febtest:INFO: 7-0 | XA-000-08-002-000-003-238-01 | 25.1 | 1224.5 08:07:28:febtest:INFO: 14-1 | XA-000-08-002-000-005-015-05 | 28.2 | 1206.9 08:07:29:febtest:INFO: 5-2 | XA-000-08-002-000-004-059-01 | 37.7 | 1189.2 08:07:29:febtest:INFO: 12-3 | XA-000-08-002-000-005-009-05 | 25.1 | 1218.6 08:07:29:febtest:INFO: 3-4 | XA-000-08-002-000-003-177-03 | 31.4 | 1201.0 08:07:29:febtest:INFO: 10-5 | XA-000-08-002-000-005-012-05 | 18.7 | 1230.3 08:07:30:febtest:INFO: 1-6 | XA-000-08-002-000-001-000-03 | 44.1 | 1147.8 08:07:30:febtest:INFO: 8-7 | XA-000-08-002-000-005-013-05 | 25.1 | 1201.0 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2024_01_02-08_05_11 OPERATOR : Olga B.; Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 2050 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: MODULE_NAME: MODULE_TYPE: MODULE_LADDER: MODULE_MODULE: MODULE_SIZE: 0 MODULE_GRADE: --------------------------------------- VI_before_Init : ['2.450', '1.8790', '1.851', '0.4230', '7.000', '1.5260', '7.000', '1.5260'] VI_after__Init : ['2.450', '1.9900', '1.850', '0.5948', '7.000', '1.5300', '7.000', '1.5300'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 08:07:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:07:34:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 08:07:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 08:08:11:ST3_ModuleSelector:INFO: L4UL201031 M4UL2T0010310B2 42 A 08:08:11:ST3_ModuleSelector:INFO: 07312 08:08:12:febtest:INFO: Testing FEB with SN 2050 08:08:13:smx_tester:INFO: Scanning setup 08:08:13:elinks:INFO: Disabling clock on downlink 0 08:08:13:elinks:INFO: Disabling clock on downlink 1 08:08:13:elinks:INFO: Disabling clock on downlink 2 08:08:13:elinks:INFO: Disabling clock on downlink 3 08:08:13:elinks:INFO: Disabling clock on downlink 4 08:08:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:08:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14 08:08:13:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15 08:08:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:08:13:elinks:INFO: Disabling clock on downlink 0 08:08:13:elinks:INFO: Disabling clock on downlink 1 08:08:13:elinks:INFO: Disabling clock on downlink 2 08:08:13:elinks:INFO: Disabling clock on downlink 3 08:08:13:elinks:INFO: Disabling clock on downlink 4 08:08:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:08:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 08:08:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:08:13:elinks:INFO: Disabling clock on downlink 0 08:08:13:elinks:INFO: Disabling clock on downlink 1 08:08:13:elinks:INFO: Disabling clock on downlink 2 08:08:13:elinks:INFO: Disabling clock on downlink 3 08:08:13:elinks:INFO: Disabling clock on downlink 4 08:08:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:08:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 08:08:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:08:13:elinks:INFO: Disabling clock on downlink 0 08:08:13:elinks:INFO: Disabling clock on downlink 1 08:08:13:elinks:INFO: Disabling clock on downlink 2 08:08:13:elinks:INFO: Disabling clock on downlink 3 08:08:13:elinks:INFO: Disabling clock on downlink 4 08:08:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:08:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 08:08:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:08:14:elinks:INFO: Disabling clock on downlink 0 08:08:14:elinks:INFO: Disabling clock on downlink 1 08:08:14:elinks:INFO: Disabling clock on downlink 2 08:08:14:elinks:INFO: Disabling clock on downlink 3 08:08:14:elinks:INFO: Disabling clock on downlink 4 08:08:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 08:08:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 08:08:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 08:08:14:setup_element:INFO: Scanning clock phase 08:08:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:08:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:08:14:setup_element:INFO: Clock phase scan results for group 0, downlink 0 08:08:14:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 08:08:14:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 08:08:14:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:08:14:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:08:14:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:08:14:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:08:14:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:08:14:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:08:14:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:08:14:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 08:08:14:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:08:14:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 08:08:14:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:08:14:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 08:08:14:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXXX Clock Delay: 35 08:08:14:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXXX Clock Delay: 35 08:08:14:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 0 08:08:14:setup_element:INFO: Scanning data phases 08:08:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:08:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:08:20:setup_element:INFO: Data phase scan results for group 0, downlink 0 08:08:20:setup_element:INFO: Eye window for uplink 0 : _______________________________XXXXXX___ Data delay found: 13 08:08:20:setup_element:INFO: Eye window for uplink 1 : ____________________________XXXXX_______ Data delay found: 10 08:08:20:setup_element:INFO: Eye window for uplink 2 : _______________________________XXXX_____ Data delay found: 12 08:08:20:setup_element:INFO: Eye window for uplink 3 : _____________________________XXXXX______ Data delay found: 11 08:08:20:setup_element:INFO: Eye window for uplink 4 : _________________________________XXXXX__ Data delay found: 15 08:08:20:setup_element:INFO: Eye window for uplink 5 : _____________________________XXXX_______ Data delay found: 10 08:08:20:setup_element:INFO: Eye window for uplink 6 : _____________________________XXXXXXXXXXX Data delay found: 14 08:08:20:setup_element:INFO: Eye window for uplink 7 : _________________________XXXXX__XXXXXXXX Data delay found: 12 08:08:20:setup_element:INFO: Eye window for uplink 8 : XXX___________________________________XX Data delay found: 20 08:08:20:setup_element:INFO: Eye window for uplink 9 : __XXXXX_________________________________ Data delay found: 24 08:08:20:setup_element:INFO: Eye window for uplink 10: _XXXXXX_________________________________ Data delay found: 23 08:08:20:setup_element:INFO: Eye window for uplink 11: ____XXXXX_______________________________ Data delay found: 26 08:08:20:setup_element:INFO: Eye window for uplink 12: _____XXXXX______________________________ Data delay found: 27 08:08:20:setup_element:INFO: Eye window for uplink 13: _______XXXXX____________________________ Data delay found: 29 08:08:20:setup_element:INFO: Eye window for uplink 14: _________XXXXX__________________________ Data delay found: 31 08:08:20:setup_element:INFO: Eye window for uplink 15: ____________XXXXX_______________________ Data delay found: 34 08:08:20:setup_element:INFO: Setting the data phase to 13 for uplink 0 08:08:20:setup_element:INFO: Setting the data phase to 10 for uplink 1 08:08:20:setup_element:INFO: Setting the data phase to 12 for uplink 2 08:08:20:setup_element:INFO: Setting the data phase to 11 for uplink 3 08:08:20:setup_element:INFO: Setting the data phase to 15 for uplink 4 08:08:20:setup_element:INFO: Setting the data phase to 10 for uplink 5 08:08:20:setup_element:INFO: Setting the data phase to 14 for uplink 6 08:08:20:setup_element:INFO: Setting the data phase to 12 for uplink 7 08:08:20:setup_element:INFO: Setting the data phase to 20 for uplink 8 08:08:20:setup_element:INFO: Setting the data phase to 24 for uplink 9 08:08:20:setup_element:INFO: Setting the data phase to 23 for uplink 10 08:08:20:setup_element:INFO: Setting the data phase to 26 for uplink 11 08:08:20:setup_element:INFO: Setting the data phase to 27 for uplink 12 08:08:20:setup_element:INFO: Setting the data phase to 29 for uplink 13 08:08:20:setup_element:INFO: Setting the data phase to 31 for uplink 14 08:08:20:setup_element:INFO: Setting the data phase to 34 for uplink 15 08:08:20:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 0 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 0: ______________________________________________________________________XXXXXXXXX_ Uplink 1: ______________________________________________________________________XXXXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _______________________________________________________________________XXXXXXX__ Uplink 5: _______________________________________________________________________XXXXXXX__ Uplink 6: ______________________________________________________________________XXXXXXXX__ Uplink 7: ______________________________________________________________________XXXXXXXX__ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: _______________________________________________________________________XXXXXXX__ Uplink 11: _______________________________________________________________________XXXXXXX__ Uplink 12: _______________________________________________________________________XXXXXXXX_ Uplink 13: _______________________________________________________________________XXXXXXXX_ Uplink 14: ________________________________________________________________________XXXXXXXX Uplink 15: ________________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 13 Window Length: 34 Eye Window: _______________________________XXXXXX___ Uplink 1: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 2: Optimal Phase: 12 Window Length: 36 Eye Window: _______________________________XXXX_____ Uplink 3: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 4: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 5: Optimal Phase: 10 Window Length: 36 Eye Window: _____________________________XXXX_______ Uplink 6: Optimal Phase: 14 Window Length: 29 Eye Window: _____________________________XXXXXXXXXXX Uplink 7: Optimal Phase: 12 Window Length: 25 Eye Window: _________________________XXXXX__XXXXXXXX Uplink 8: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 9: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 10: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 11: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 12: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 13: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 14: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 15: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ ] 08:08:20:setup_element:INFO: Beginning SMX ASICs map scan 08:08:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:08:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:08:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 08:08:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 08:08:20:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:08:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7 08:08:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6 08:08:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14 08:08:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15 08:08:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5 08:08:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4 08:08:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12 08:08:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13 08:08:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3 08:08:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2 08:08:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10 08:08:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11 08:08:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1 08:08:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0 08:08:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8 08:08:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9 08:08:23:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 0 Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6) ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15) ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4) ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13) ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2) ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11) ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0) ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 0: ______________________________________________________________________XXXXXXXXX_ Uplink 1: ______________________________________________________________________XXXXXXXXX_ Uplink 2: _______________________________________________________________________XXXXXXX__ Uplink 3: _______________________________________________________________________XXXXXXX__ Uplink 4: _______________________________________________________________________XXXXXXX__ Uplink 5: _______________________________________________________________________XXXXXXX__ Uplink 6: ______________________________________________________________________XXXXXXXX__ Uplink 7: ______________________________________________________________________XXXXXXXX__ Uplink 8: ______________________________________________________________________XXXXXXXX__ Uplink 9: ______________________________________________________________________XXXXXXXX__ Uplink 10: _______________________________________________________________________XXXXXXX__ Uplink 11: _______________________________________________________________________XXXXXXX__ Uplink 12: _______________________________________________________________________XXXXXXXX_ Uplink 13: _______________________________________________________________________XXXXXXXX_ Uplink 14: ________________________________________________________________________XXXXXXXX Uplink 15: ________________________________________________________________________XXXXXXXX Data phase characteristics: Uplink 0: Optimal Phase: 13 Window Length: 34 Eye Window: _______________________________XXXXXX___ Uplink 1: Optimal Phase: 10 Window Length: 35 Eye Window: ____________________________XXXXX_______ Uplink 2: Optimal Phase: 12 Window Length: 36 Eye Window: _______________________________XXXX_____ Uplink 3: Optimal Phase: 11 Window Length: 35 Eye Window: _____________________________XXXXX______ Uplink 4: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 5: Optimal Phase: 10 Window Length: 36 Eye Window: _____________________________XXXX_______ Uplink 6: Optimal Phase: 14 Window Length: 29 Eye Window: _____________________________XXXXXXXXXXX Uplink 7: Optimal Phase: 12 Window Length: 25 Eye Window: _________________________XXXXX__XXXXXXXX Uplink 8: Optimal Phase: 20 Window Length: 35 Eye Window: XXX___________________________________XX Uplink 9: Optimal Phase: 24 Window Length: 35 Eye Window: __XXXXX_________________________________ Uplink 10: Optimal Phase: 23 Window Length: 34 Eye Window: _XXXXXX_________________________________ Uplink 11: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 12: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 13: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 14: Optimal Phase: 31 Window Length: 35 Eye Window: _________XXXXX__________________________ Uplink 15: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ 08:08:23:setup_element:INFO: Performing Elink synchronization 08:08:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 08:08:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0] 08:08:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0] 08:08:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0] 08:08:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0 08:08:23:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 08:08:23:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)] 1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)] 2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)] 3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)] 4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)] 5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)] 6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)] 7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)] TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_7 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_7 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_7 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_14 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_14 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_14 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_5 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_5 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_5 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_12 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_12 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_12 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_3 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_3 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_3 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_10 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_10 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_10 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_1 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_1 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_1 TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_8 (Potential memory leak). TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_8 (Potential memory leak). TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_8 08:08:24:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:08:24:febtest:INFO: 7-0 | XA-000-08-002-000-003-238-01 | 25.1 | 1224.5 08:08:24:febtest:INFO: 14-1 | XA-000-08-002-000-005-015-05 | 18.7 | 1242.0 08:08:25:febtest:INFO: 5-2 | XA-000-08-002-000-004-059-01 | 40.9 | 1153.7 08:08:25:febtest:INFO: 12-3 | XA-000-08-002-000-005-009-05 | 21.9 | 1224.5 08:08:25:febtest:INFO: 3-4 | XA-000-08-002-000-003-177-03 | 37.7 | 1183.3 08:08:25:febtest:INFO: 10-5 | XA-000-08-002-000-005-012-05 | 15.6 | 1236.2 08:08:26:febtest:INFO: 1-6 | XA-000-08-002-000-001-000-03 | 34.6 | 1183.3 08:08:26:febtest:INFO: 8-7 | XA-000-08-002-000-005-013-05 | 31.4 | 1177.4 08:08:26:ST3_smx:INFO: Configuring SMX FAST 08:08:28:ST3_smx:INFO: chip: 7-0 21.902970 C 1224.468235 mV 08:08:28:ST3_smx:INFO: Electrons 08:08:28:ST3_smx:INFO: # loops 0 08:08:30:ST3_smx:INFO: # loops 1 08:08:31:ST3_smx:INFO: # loops 2 08:08:33:ST3_smx:INFO: # loops 3 08:08:35:ST3_smx:INFO: # loops 4 08:08:36:ST3_smx:INFO: Total # of broken channels: 0 08:08:36:ST3_smx:INFO: List of broken channels: [] 08:08:36:ST3_smx:INFO: Total # of broken channels: 0 08:08:36:ST3_smx:INFO: List of broken channels: [] 08:08:37:ST3_smx:INFO: Configuring SMX FAST 08:08:38:ST3_smx:INFO: chip: 14-1 28.225000 C 1206.851500 mV 08:08:38:ST3_smx:INFO: Electrons 08:08:38:ST3_smx:INFO: # loops 0 08:08:40:ST3_smx:INFO: # loops 1 08:08:42:ST3_smx:INFO: # loops 2 08:08:43:ST3_smx:INFO: # loops 3 08:08:45:ST3_smx:INFO: # loops 4 08:08:46:ST3_smx:INFO: Total # of broken channels: 0 08:08:46:ST3_smx:INFO: List of broken channels: [] 08:08:47:ST3_smx:INFO: Total # of broken channels: 1 08:08:47:ST3_smx:INFO: List of broken channels: [41] 08:08:47:ST3_smx:INFO: Configuring SMX FAST 08:08:49:ST3_smx:INFO: chip: 5-2 34.556970 C 1183.292940 mV 08:08:49:ST3_smx:INFO: Electrons 08:08:49:ST3_smx:INFO: # loops 0 08:08:50:ST3_smx:INFO: # loops 1 08:08:52:ST3_smx:INFO: # loops 2 08:08:54:ST3_smx:INFO: # loops 3 08:08:55:ST3_smx:INFO: # loops 4 08:08:57:ST3_smx:INFO: Total # of broken channels: 0 08:08:57:ST3_smx:INFO: List of broken channels: [] 08:08:57:ST3_smx:INFO: Total # of broken channels: 0 08:08:57:ST3_smx:INFO: List of broken channels: [] 08:08:57:ST3_smx:INFO: Configuring SMX FAST 08:08:59:ST3_smx:INFO: chip: 12-3 28.225000 C 1218.600960 mV 08:08:59:ST3_smx:INFO: Electrons 08:08:59:ST3_smx:INFO: # loops 0 08:09:01:ST3_smx:INFO: # loops 1 08:09:02:ST3_smx:INFO: # loops 2 08:09:04:ST3_smx:INFO: # loops 3 08:09:06:ST3_smx:INFO: # loops 4 08:09:07:ST3_smx:INFO: Total # of broken channels: 0 08:09:07:ST3_smx:INFO: List of broken channels: [] 08:09:07:ST3_smx:INFO: Total # of broken channels: 0 08:09:07:ST3_smx:INFO: List of broken channels: [] 08:09:07:ST3_smx:INFO: Configuring SMX FAST 08:09:09:ST3_smx:INFO: chip: 3-4 34.556970 C 1200.969315 mV 08:09:09:ST3_smx:INFO: Electrons 08:09:09:ST3_smx:INFO: # loops 0 08:09:11:ST3_smx:INFO: # loops 1 08:09:13:ST3_smx:INFO: # loops 2 08:09:15:ST3_smx:INFO: # loops 3 08:09:17:ST3_smx:INFO: # loops 4 08:09:18:ST3_smx:INFO: Total # of broken channels: 0 08:09:18:ST3_smx:INFO: List of broken channels: [] 08:09:18:ST3_smx:INFO: Total # of broken channels: 0 08:09:18:ST3_smx:INFO: List of broken channels: [] 08:09:19:ST3_smx:INFO: Configuring SMX FAST 08:09:21:ST3_smx:INFO: chip: 10-5 21.902970 C 1230.330540 mV 08:09:21:ST3_smx:INFO: Electrons 08:09:21:ST3_smx:INFO: # loops 0 08:09:22:ST3_smx:INFO: # loops 1 08:09:24:ST3_smx:INFO: # loops 2 08:09:26:ST3_smx:INFO: # loops 3 08:09:27:ST3_smx:INFO: # loops 4 08:09:29:ST3_smx:INFO: Total # of broken channels: 1 08:09:29:ST3_smx:INFO: List of broken channels: [102] 08:09:29:ST3_smx:INFO: Total # of broken channels: 1 08:09:29:ST3_smx:INFO: List of broken channels: [102] 08:09:29:ST3_smx:INFO: Configuring SMX FAST 08:09:31:ST3_smx:INFO: chip: 1-6 47.250730 C 1147.806000 mV 08:09:31:ST3_smx:INFO: Electrons 08:09:31:ST3_smx:INFO: # loops 0 08:09:33:ST3_smx:INFO: # loops 1 08:09:34:ST3_smx:INFO: # loops 2 08:09:36:ST3_smx:INFO: # loops 3 08:09:37:ST3_smx:INFO: # loops 4 08:09:39:ST3_smx:INFO: Total # of broken channels: 0 08:09:39:ST3_smx:INFO: List of broken channels: [] 08:09:39:ST3_smx:INFO: Total # of broken channels: 0 08:09:39:ST3_smx:INFO: List of broken channels: [] 08:09:39:ST3_smx:INFO: Configuring SMX FAST 08:09:41:ST3_smx:INFO: chip: 8-7 25.062742 C 1200.969315 mV 08:09:41:ST3_smx:INFO: Electrons 08:09:41:ST3_smx:INFO: # loops 0 08:09:43:ST3_smx:INFO: # loops 1 08:09:44:ST3_smx:INFO: # loops 2 08:09:46:ST3_smx:INFO: # loops 3 08:09:48:ST3_smx:INFO: # loops 4 08:09:49:ST3_smx:INFO: Total # of broken channels: 0 08:09:49:ST3_smx:INFO: List of broken channels: [] 08:09:49:ST3_smx:INFO: Total # of broken channels: 0 08:09:49:ST3_smx:INFO: List of broken channels: [] 08:09:50:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 08:09:50:febtest:INFO: 7-0 | XA-000-08-002-000-003-238-01 | 28.2 | 1224.5 08:09:50:febtest:INFO: 14-1 | XA-000-08-002-000-005-015-05 | 31.4 | 1206.9 08:09:50:febtest:INFO: 5-2 | XA-000-08-002-000-004-059-01 | 37.7 | 1183.3 08:09:51:febtest:INFO: 12-3 | XA-000-08-002-000-005-009-05 | 28.2 | 1218.6 08:09:51:febtest:INFO: 3-4 | XA-000-08-002-000-003-177-03 | 34.6 | 1201.0 08:09:51:febtest:INFO: 10-5 | XA-000-08-002-000-005-012-05 | 21.9 | 1230.3 08:09:51:febtest:INFO: 1-6 | XA-000-08-002-000-001-000-03 | 47.3 | 1147.8 08:09:51:febtest:INFO: 8-7 | XA-000-08-002-000-005-013-05 | 25.1 | 1201.0 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2024_01_02-08_07_34 OPERATOR : Olga B.; Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4UL201031 M4UL2T0010310B2 42 A FEB_SN : 2050 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 07312 MODULE_NAME: L4UL201031 M4UL2T0010310B2 42 A MODULE_TYPE: MODULE_LADDER: L4UL201031 MODULE_MODULE: M4UL2T0010310B2 MODULE_SIZE: 42 MODULE_GRADE: A --------------------------------------- VI_before_Init : ['2.450', '1.8700', '1.850', '0.4255', '7.000', '1.5310', '7.000', '1.5310'] VI_after__Init : ['2.450', '1.9910', '1.850', '0.5953', '7.000', '1.5340', '7.000', '1.5340'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 08:09:59:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2050/TestDate_2024_01_02-08_07_34/