FEB_2052 19.10.23 13:26:07
Info
13:25:33:febtest:INFO: FEB 8-2 B @ GSI
13:26:05:smx_tester:INFO: Setting Elink clock mode to 160 MHz
13:26:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:26:07:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
13:26:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:26:07:febtest:INFO: Tsting FEB with SN 2052
13:26:09:smx_tester:INFO: Scanning setup
13:26:09:elinks:INFO: Disabling clock on downlink 0
13:26:09:elinks:INFO: Disabling clock on downlink 1
13:26:09:elinks:INFO: Disabling clock on downlink 2
13:26:09:elinks:INFO: Disabling clock on downlink 3
13:26:09:elinks:INFO: Disabling clock on downlink 4
13:26:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:26:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:26:09:elinks:INFO: Disabling clock on downlink 0
13:26:09:elinks:INFO: Disabling clock on downlink 1
13:26:09:elinks:INFO: Disabling clock on downlink 2
13:26:09:elinks:INFO: Disabling clock on downlink 3
13:26:09:elinks:INFO: Disabling clock on downlink 4
13:26:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:26:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:26:09:elinks:INFO: Disabling clock on downlink 0
13:26:09:elinks:INFO: Disabling clock on downlink 1
13:26:09:elinks:INFO: Disabling clock on downlink 2
13:26:09:elinks:INFO: Disabling clock on downlink 3
13:26:09:elinks:INFO: Disabling clock on downlink 4
13:26:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:26:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:26:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:26:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:26:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:26:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:26:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:26:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:26:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:26:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:26:09:elinks:INFO: Disabling clock on downlink 0
13:26:09:elinks:INFO: Disabling clock on downlink 1
13:26:09:elinks:INFO: Disabling clock on downlink 2
13:26:09:elinks:INFO: Disabling clock on downlink 3
13:26:09:elinks:INFO: Disabling clock on downlink 4
13:26:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:26:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:26:09:elinks:INFO: Disabling clock on downlink 0
13:26:09:elinks:INFO: Disabling clock on downlink 1
13:26:09:elinks:INFO: Disabling clock on downlink 2
13:26:09:elinks:INFO: Disabling clock on downlink 3
13:26:09:elinks:INFO: Disabling clock on downlink 4
13:26:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:26:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:26:09:setup_element:INFO: Scanning clock phase
13:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:26:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:26:10:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:26:10:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:26:10:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:26:10:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:26:10:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:26:10:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:26:10:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:26:10:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:26:10:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:26:10:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
13:26:10:setup_element:INFO: Scanning data phases
13:26:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:26:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:26:15:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:26:15:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
13:26:15:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
13:26:15:setup_element:INFO: Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
13:26:15:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
13:26:15:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
13:26:15:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
13:26:15:setup_element:INFO: Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
13:26:15:setup_element:INFO: Eye window for uplink 31: ___________XXXXXX_______________________
Data delay found: 33
13:26:15:setup_element:INFO: Setting the data phase to 28 for uplink 24
13:26:15:setup_element:INFO: Setting the data phase to 31 for uplink 25
13:26:15:setup_element:INFO: Setting the data phase to 27 for uplink 26
13:26:15:setup_element:INFO: Setting the data phase to 31 for uplink 27
13:26:15:setup_element:INFO: Setting the data phase to 34 for uplink 28
13:26:15:setup_element:INFO: Setting the data phase to 35 for uplink 29
13:26:15:setup_element:INFO: Setting the data phase to 35 for uplink 30
13:26:15:setup_element:INFO: Setting the data phase to 33 for uplink 31
13:26:15:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXX___
Uplink 29: ______________________________________________________________________XXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 31:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
]
13:26:15:setup_element:INFO: Beginning SMX ASICs map scan
13:26:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:26:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:26:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:26:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:26:15:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:26:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:26:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:26:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:26:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:26:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:26:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:26:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:26:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:26:18:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXX___
Uplink 29: ______________________________________________________________________XXXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXXX__
Uplink 31: ______________________________________________________________________XXXXXXXX__
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 31:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
13:26:18:setup_element:INFO: Performing Elink synchronization
13:26:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:26:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:26:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:26:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:26:18:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:26:18:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:26:18:ST3_emu:INFO: Number of chips: 4
13:26:18:ST3_emu:INFO: Chip address: 0x1
13:26:18:ST3_emu:INFO: Chip address: 0x3
13:26:18:ST3_emu:INFO: Chip address: 0x5
13:26:18:ST3_emu:INFO: Chip address: 0x7
13:26:18:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:26:19:febtest:INFO: 0-1 | XA-000-08-002-000-001-120-15 | 56.8 | 1118.1
13:26:19:febtest:INFO: 0-3 | XA-000-08-002-000-001-007-03 | 37.7 | 1183.3
13:26:19:febtest:INFO: 0-5 | XA-000-08-002-000-001-009-03 | 21.9 | 1230.3
13:26:19:febtest:INFO: 0-7 | XA-000-08-002-000-001-126-15 | 28.2 | 1201.0
13:26:19:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:26:23:ST3_smx:INFO: chip: 0-1 53.612520 C 1106.178435 mV
13:26:23:ST3_smx:INFO: # loops 0
13:26:25:ST3_smx:INFO: # loops 1
13:26:26:ST3_smx:INFO: # loops 2
13:26:28:ST3_smx:INFO: # loops 3
13:26:30:ST3_smx:INFO: # loops 4
13:26:32:ST3_smx:INFO: Total # of broken channels: 0
13:26:32:ST3_smx:INFO: List of broken channels: []
13:26:32:ST3_smx:INFO: Total # of broken channels: 0
13:26:32:ST3_smx:INFO: List of broken channels: []
13:26:32:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:26:36:ST3_smx:INFO: chip: 0-3 37.726682 C 1165.571835 mV
13:26:36:ST3_smx:INFO: # loops 0
13:26:38:ST3_smx:INFO: # loops 1
13:26:39:ST3_smx:INFO: # loops 2
13:26:41:ST3_smx:INFO: # loops 3
13:26:43:ST3_smx:INFO: # loops 4
13:26:44:ST3_smx:INFO: Total # of broken channels: 0
13:26:44:ST3_smx:INFO: List of broken channels: []
13:26:44:ST3_smx:INFO: Total # of broken channels: 0
13:26:44:ST3_smx:INFO: List of broken channels: []
13:26:45:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:26:49:ST3_smx:INFO: chip: 0-5 31.389742 C 1183.292940 mV
13:26:49:ST3_smx:INFO: # loops 0
13:26:50:ST3_smx:INFO: # loops 1
13:26:52:ST3_smx:INFO: # loops 2
13:26:54:ST3_smx:INFO: # loops 3
13:26:55:ST3_smx:INFO: # loops 4
13:26:57:ST3_smx:INFO: Total # of broken channels: 0
13:26:57:ST3_smx:INFO: List of broken channels: []
13:26:57:ST3_smx:INFO: Total # of broken channels: 0
13:26:57:ST3_smx:INFO: List of broken channels: []
13:26:58:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:27:02:ST3_smx:INFO: chip: 0-7 34.556970 C 1171.483840 mV
13:27:02:ST3_smx:INFO: # loops 0
13:27:03:ST3_smx:INFO: # loops 1
13:27:05:ST3_smx:INFO: # loops 2
13:27:07:ST3_smx:INFO: # loops 3
13:27:08:ST3_smx:INFO: # loops 4
13:27:10:ST3_smx:INFO: Total # of broken channels: 0
13:27:10:ST3_smx:INFO: List of broken channels: []
13:27:10:ST3_smx:INFO: Total # of broken channels: 0
13:27:10:ST3_smx:INFO: List of broken channels: []
13:27:11:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:27:11:febtest:INFO: 0-1 | XA-000-08-002-000-001-120-15 | 56.8 | 1100.2
13:27:11:febtest:INFO: 0-3 | XA-000-08-002-000-001-007-03 | 40.9 | 1159.7
13:27:11:febtest:INFO: 0-5 | XA-000-08-002-000-001-009-03 | 34.6 | 1177.4
13:27:11:febtest:INFO: 0-7 | XA-000-08-002-000-001-126-15 | 34.6 | 1165.6
13:27:18:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2052/TestDate_2023_10_19-13_26_07/