FEB_2053 29.11.23 13:42:30
Info
13:42:02:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30
13:42:02:febtest:INFO: FEB8.2 selected
13:42:05:ST3_Shared:INFO: Listo of operators:Robert V.;
13:42:20:smx_tester:INFO: Setting Elink clock mode to 160 MHz
13:42:20:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
13:42:23:smx_tester:INFO: Setting Elink clock mode to 160 MHz
13:42:23:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
13:42:26:smx_tester:INFO: Setting Elink clock mode to 160 MHz
13:42:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:42:30:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
13:42:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:42:30:febtest:INFO: Tsting FEB with SN 2053
13:42:31:smx_tester:INFO: Scanning setup
13:42:31:elinks:INFO: Disabling clock on downlink 0
13:42:31:elinks:INFO: Disabling clock on downlink 1
13:42:31:elinks:INFO: Disabling clock on downlink 2
13:42:31:elinks:INFO: Disabling clock on downlink 3
13:42:31:elinks:INFO: Disabling clock on downlink 4
13:42:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:42:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:42:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:42:31:elinks:INFO: Disabling clock on downlink 0
13:42:31:elinks:INFO: Disabling clock on downlink 1
13:42:31:elinks:INFO: Disabling clock on downlink 2
13:42:31:elinks:INFO: Disabling clock on downlink 3
13:42:31:elinks:INFO: Disabling clock on downlink 4
13:42:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:42:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:42:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:42:32:elinks:INFO: Disabling clock on downlink 0
13:42:32:elinks:INFO: Disabling clock on downlink 1
13:42:32:elinks:INFO: Disabling clock on downlink 2
13:42:32:elinks:INFO: Disabling clock on downlink 3
13:42:32:elinks:INFO: Disabling clock on downlink 4
13:42:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:42:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:42:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:42:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:42:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:42:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:42:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:42:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:42:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:42:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:42:32:elinks:INFO: Disabling clock on downlink 0
13:42:32:elinks:INFO: Disabling clock on downlink 1
13:42:32:elinks:INFO: Disabling clock on downlink 2
13:42:32:elinks:INFO: Disabling clock on downlink 3
13:42:32:elinks:INFO: Disabling clock on downlink 4
13:42:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:42:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:42:32:elinks:INFO: Disabling clock on downlink 0
13:42:32:elinks:INFO: Disabling clock on downlink 1
13:42:32:elinks:INFO: Disabling clock on downlink 2
13:42:32:elinks:INFO: Disabling clock on downlink 3
13:42:32:elinks:INFO: Disabling clock on downlink 4
13:42:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:42:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:42:32:setup_element:INFO: Scanning clock phase
13:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:42:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:42:32:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:42:32:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXXX_
Clock Delay: 33
13:42:32:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXXX_
Clock Delay: 33
13:42:32:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:42:32:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:42:32:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:42:32:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:42:32:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:42:32:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:42:33:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
13:42:33:setup_element:INFO: Scanning data phases
13:42:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:42:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:42:37:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:42:37:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
13:42:37:setup_element:INFO: Eye window for uplink 25: __________XXXX__________________________
Data delay found: 31
13:42:37:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
13:42:37:setup_element:INFO: Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
13:42:37:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________
Data delay found: 33
13:42:37:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
13:42:37:setup_element:INFO: Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
13:42:37:setup_element:INFO: Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
13:42:37:setup_element:INFO: Setting the data phase to 29 for uplink 24
13:42:38:setup_element:INFO: Setting the data phase to 31 for uplink 25
13:42:38:setup_element:INFO: Setting the data phase to 29 for uplink 26
13:42:38:setup_element:INFO: Setting the data phase to 33 for uplink 27
13:42:38:setup_element:INFO: Setting the data phase to 33 for uplink 28
13:42:38:setup_element:INFO: Setting the data phase to 35 for uplink 29
13:42:38:setup_element:INFO: Setting the data phase to 35 for uplink 30
13:42:38:setup_element:INFO: Setting the data phase to 34 for uplink 31
13:42:38:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXXXX_
Uplink 25: _____________________________________________________________________XXXXXXXXXX_
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 31:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
]
13:42:38:setup_element:INFO: Beginning SMX ASICs map scan
13:42:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:42:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:42:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:42:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:42:38:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:42:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:42:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:42:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:42:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:42:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:42:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:42:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:42:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:42:40:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 70
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXXXX_
Uplink 25: _____________________________________________________________________XXXXXXXXXX_
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 28:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 31:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
13:42:40:setup_element:INFO: Performing Elink synchronization
13:42:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:42:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:42:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:42:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:42:40:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:42:40:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:42:40:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
13:42:41:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:42:41:febtest:INFO: 0-1 | XA-000-08-002-002-007-199-00 | 34.6 | 1171.5
13:42:41:febtest:INFO: 0-3 | XA-000-08-002-002-007-200-00 | 18.7 | 1218.6
13:42:42:febtest:INFO: 0-5 | XA-000-08-002-002-007-235-14 | 15.6 | 1230.3
13:42:42:febtest:INFO: 0-7 | XA-000-08-002-002-007-237-14 | 31.4 | 1183.3
13:42:42:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:42:46:ST3_smx:INFO: chip: 0-1 31.389742 C 1183.292940 mV
13:42:46:ST3_smx:INFO: Electrons
13:42:46:ST3_smx:INFO: # loops 0
13:42:47:ST3_smx:INFO: # loops 1
13:42:49:ST3_smx:INFO: # loops 2
13:42:51:ST3_smx:INFO: # loops 3
13:42:53:ST3_smx:INFO: # loops 4
13:42:54:ST3_smx:INFO: Total # of broken channels: 0
13:42:54:ST3_smx:INFO: List of broken channels: []
13:42:54:ST3_smx:INFO: Total # of broken channels: 0
13:42:54:ST3_smx:INFO: List of broken channels: []
13:42:55:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:42:59:ST3_smx:INFO: chip: 0-3 21.902970 C 1206.851500 mV
13:42:59:ST3_smx:INFO: Electrons
13:42:59:ST3_smx:INFO: # loops 0
13:43:01:ST3_smx:INFO: # loops 1
13:43:02:ST3_smx:INFO: # loops 2
13:43:04:ST3_smx:INFO: # loops 3
13:43:05:ST3_smx:INFO: # loops 4
13:43:07:ST3_smx:INFO: Total # of broken channels: 0
13:43:07:ST3_smx:INFO: List of broken channels: []
13:43:07:ST3_smx:INFO: Total # of broken channels: 0
13:43:07:ST3_smx:INFO: List of broken channels: []
13:43:07:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:43:11:ST3_smx:INFO: chip: 0-5 28.225000 C 1195.082160 mV
13:43:11:ST3_smx:INFO: Electrons
13:43:11:ST3_smx:INFO: # loops 0
13:43:13:ST3_smx:INFO: # loops 1
13:43:14:ST3_smx:INFO: # loops 2
13:43:16:ST3_smx:INFO: # loops 3
13:43:18:ST3_smx:INFO: # loops 4
13:43:19:ST3_smx:INFO: Total # of broken channels: 0
13:43:19:ST3_smx:INFO: List of broken channels: []
13:43:19:ST3_smx:INFO: Total # of broken channels: 0
13:43:19:ST3_smx:INFO: List of broken channels: []
13:43:20:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:43:23:ST3_smx:INFO: chip: 0-7 25.062742 C 1200.969315 mV
13:43:23:ST3_smx:INFO: Electrons
13:43:23:ST3_smx:INFO: # loops 0
13:43:25:ST3_smx:INFO: # loops 1
13:43:26:ST3_smx:INFO: # loops 2
13:43:28:ST3_smx:INFO: # loops 3
13:43:29:ST3_smx:INFO: # loops 4
13:43:31:ST3_smx:INFO: Total # of broken channels: 0
13:43:31:ST3_smx:INFO: List of broken channels: []
13:43:31:ST3_smx:INFO: Total # of broken channels: 0
13:43:31:ST3_smx:INFO: List of broken channels: []
13:43:32:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:43:32:febtest:INFO: 0-1 | XA-000-08-002-002-007-199-00 | 31.4 | 1183.3
13:43:32:febtest:INFO: 0-3 | XA-000-08-002-002-007-200-00 | 21.9 | 1212.7
13:43:32:febtest:INFO: 0-5 | XA-000-08-002-002-007-235-14 | 28.2 | 1195.1
13:43:33:febtest:INFO: 0-7 | XA-000-08-002-002-007-237-14 | 25.1 | 1201.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2023_11_29-13_42_30
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 205313:43:44:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2053/TestDate_2023_11_29-13_42_30/
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 0
FEB_B : 1
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '0.8106', '1.847', '1.2970', '7.000', '1.5440', '7.000', '1.5440']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']