10:47:16:febtest:INFO:	FEB 8-2 selected
10:47:16:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:47:20:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:47:20:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:47:20:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:47:20:febtest:INFO:	Testing FEB with SN 2053
10:47:22:smx_tester:INFO:	Scanning setup
10:47:22:elinks:INFO:	Disabling clock on downlink 0
10:47:22:elinks:INFO:	Disabling clock on downlink 1
10:47:22:elinks:INFO:	Disabling clock on downlink 2
10:47:22:elinks:INFO:	Disabling clock on downlink 3
10:47:22:elinks:INFO:	Disabling clock on downlink 4
10:47:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:47:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:47:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:47:22:elinks:INFO:	Disabling clock on downlink 0
10:47:22:elinks:INFO:	Disabling clock on downlink 1
10:47:22:elinks:INFO:	Disabling clock on downlink 2
10:47:22:elinks:INFO:	Disabling clock on downlink 3
10:47:22:elinks:INFO:	Disabling clock on downlink 4
10:47:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:47:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:47:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:47:22:elinks:INFO:	Disabling clock on downlink 0
10:47:22:elinks:INFO:	Disabling clock on downlink 1
10:47:22:elinks:INFO:	Disabling clock on downlink 2
10:47:22:elinks:INFO:	Disabling clock on downlink 3
10:47:22:elinks:INFO:	Disabling clock on downlink 4
10:47:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:47:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:47:22:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:47:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:47:22:elinks:INFO:	Disabling clock on downlink 0
10:47:22:elinks:INFO:	Disabling clock on downlink 1
10:47:22:elinks:INFO:	Disabling clock on downlink 2
10:47:22:elinks:INFO:	Disabling clock on downlink 3
10:47:22:elinks:INFO:	Disabling clock on downlink 4
10:47:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:47:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:47:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:47:22:elinks:INFO:	Disabling clock on downlink 0
10:47:22:elinks:INFO:	Disabling clock on downlink 1
10:47:22:elinks:INFO:	Disabling clock on downlink 2
10:47:22:elinks:INFO:	Disabling clock on downlink 3
10:47:22:elinks:INFO:	Disabling clock on downlink 4
10:47:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:47:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:47:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:47:23:setup_element:INFO:	Scanning clock phase
10:47:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:47:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:47:23:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:47:23:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:47:23:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:47:23:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:47:23:setup_element:INFO:	Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:47:23:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
10:47:23:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
10:47:23:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:47:23:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:47:23:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:47:23:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:47:23:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:47:23:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:47:23:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:47:23:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:47:23:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:47:23:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:47:23:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
10:47:23:setup_element:INFO:	Scanning data phases
10:47:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:47:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:47:29:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:47:29:setup_element:INFO:	Eye window for uplink 16: XXXX__XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 4
10:47:29:setup_element:INFO:	Eye window for uplink 17: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
10:47:29:setup_element:INFO:	Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
10:47:29:setup_element:INFO:	Eye window for uplink 19: __________________________________XXXX__
Data delay found: 15
10:47:29:setup_element:INFO:	Eye window for uplink 20: XXXX___________________________________X
Data delay found: 21
10:47:29:setup_element:INFO:	Eye window for uplink 21: XXX__________________________________XXX
Data delay found: 19
10:47:29:setup_element:INFO:	Eye window for uplink 22: XX_________________________________XXXXX
Data delay found: 18
10:47:29:setup_element:INFO:	Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
10:47:29:setup_element:INFO:	Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
10:47:29:setup_element:INFO:	Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:47:29:setup_element:INFO:	Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
10:47:29:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
10:47:29:setup_element:INFO:	Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
10:47:29:setup_element:INFO:	Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
10:47:29:setup_element:INFO:	Eye window for uplink 30: ________________XXXXX___________________
Data delay found: 38
10:47:29:setup_element:INFO:	Eye window for uplink 31: ______________XXXXX_X___________________
Data delay found: 37
10:47:29:setup_element:INFO:	Setting the data phase to 4 for uplink 16
10:47:29:setup_element:INFO:	Setting the data phase to 2 for uplink 17
10:47:29:setup_element:INFO:	Setting the data phase to 18 for uplink 18
10:47:29:setup_element:INFO:	Setting the data phase to 15 for uplink 19
10:47:29:setup_element:INFO:	Setting the data phase to 21 for uplink 20
10:47:29:setup_element:INFO:	Setting the data phase to 19 for uplink 21
10:47:29:setup_element:INFO:	Setting the data phase to 18 for uplink 22
10:47:29:setup_element:INFO:	Setting the data phase to 15 for uplink 23
10:47:29:setup_element:INFO:	Setting the data phase to 28 for uplink 24
10:47:29:setup_element:INFO:	Setting the data phase to 31 for uplink 25
10:47:29:setup_element:INFO:	Setting the data phase to 29 for uplink 26
10:47:29:setup_element:INFO:	Setting the data phase to 33 for uplink 27
10:47:29:setup_element:INFO:	Setting the data phase to 34 for uplink 28
10:47:29:setup_element:INFO:	Setting the data phase to 36 for uplink 29
10:47:29:setup_element:INFO:	Setting the data phase to 38 for uplink 30
10:47:29:setup_element:INFO:	Setting the data phase to 37 for uplink 31
10:47:29:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________XXXXXXX_
      Uplink 17: ________________________________________________________________________XXXXXXX_
      Uplink 18: ______________________________________________________________________XXXXXXXXX_
      Uplink 19: ______________________________________________________________________XXXXXXXXX_
      Uplink 20: ________________________________________________________________________________
      Uplink 21: ________________________________________________________________________________
      Uplink 22: ______________________________________________________________________XXXXXXXXX_
      Uplink 23: ______________________________________________________________________XXXXXXXXX_
      Uplink 24: _______________________________________________________________________XXXXXXXX_
      Uplink 25: _______________________________________________________________________XXXXXXXX_
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 4
      Window Length: 2
      Eye Window: XXXX__XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 17:
      Optimal Phase: 2
      Window Length: 6
      Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 20:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 21:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 22:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 23:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 24:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 29:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 30:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXX_X___________________
]
10:47:29:setup_element:INFO:	Beginning SMX ASICs map scan
10:47:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:47:29:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:47:29:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:47:29:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:47:29:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:47:29:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:47:29:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:47:29:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:47:29:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:47:29:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:47:29:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:47:29:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:47:29:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:47:30:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:47:30:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:47:30:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:47:30:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:47:30:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:47:30:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:47:30:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:47:31:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________XXXXXXX_
      Uplink 17: ________________________________________________________________________XXXXXXX_
      Uplink 18: ______________________________________________________________________XXXXXXXXX_
      Uplink 19: ______________________________________________________________________XXXXXXXXX_
      Uplink 20: ________________________________________________________________________________
      Uplink 21: ________________________________________________________________________________
      Uplink 22: ______________________________________________________________________XXXXXXXXX_
      Uplink 23: ______________________________________________________________________XXXXXXXXX_
      Uplink 24: _______________________________________________________________________XXXXXXXX_
      Uplink 25: _______________________________________________________________________XXXXXXXX_
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 4
      Window Length: 2
      Eye Window: XXXX__XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 17:
      Optimal Phase: 2
      Window Length: 6
      Eye Window: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 20:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 21:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 22:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 23:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 24:
      Optimal Phase: 28
      Window Length: 34
      Eye Window: ______XXXXXX____________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 29:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 30:
      Optimal Phase: 38
      Window Length: 35
      Eye Window: ________________XXXXX___________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 33
      Eye Window: ______________XXXXX_X___________________

10:47:31:setup_element:INFO:	Performing Elink synchronization
10:47:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:47:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:47:31:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:47:31:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:47:31:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:47:31:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:47:32:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |      [(0, 17)]     
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
10:47:32:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:47:33:febtest:INFO:	23-0 | XA-000-08-002-002-007-180-12 |  21.9 | 1236.2
10:47:33:febtest:INFO:	30-1 | XA-000-08-002-002-007-199-00 |  37.7 | 1177.4
10:47:33:febtest:INFO:	21-2 | XA-000-08-002-002-007-225-14 |  12.4 | 1271.2
10:47:33:febtest:INFO:	28-3 | XA-000-08-002-002-007-200-00 |  25.1 | 1218.6
10:47:33:febtest:INFO:	19-4 | XA-000-08-002-002-007-157-02 |  37.7 | 1195.1
10:47:34:febtest:INFO:	26-5 | XA-000-08-002-002-007-235-14 |  18.7 | 1242.0
10:47:34:febtest:INFO:	17-6 | XA-000-08-002-002-007-233-14 |  15.6 | 1259.6
10:47:34:febtest:INFO:	24-7 | XA-000-08-002-002-007-237-14 |  34.6 | 1189.2
10:47:34:ST3_smx:INFO:	Configuring SMX FAST
10:47:36:ST3_smx:INFO:	chip: 23-0 	 25.062742 C 	 1224.468235 mV
10:47:36:ST3_smx:INFO:		Electrons
10:47:36:ST3_smx:INFO:	# loops 0
10:47:38:ST3_smx:INFO:	# loops 1
10:47:39:ST3_smx:INFO:	# loops 2
10:47:41:ST3_smx:INFO:	# loops 3
10:47:43:ST3_smx:INFO:	# loops 4
10:47:45:ST3_smx:INFO:	Total # of broken channels: 0
10:47:45:ST3_smx:INFO:	List of broken channels: []
10:47:45:ST3_smx:INFO:	Total # of broken channels: 0
10:47:45:ST3_smx:INFO:	List of broken channels: []
10:47:45:ST3_smx:INFO:	Configuring SMX FAST
10:47:47:ST3_smx:INFO:	chip: 30-1 	 37.726682 C 	 1177.390875 mV
10:47:47:ST3_smx:INFO:		Electrons
10:47:47:ST3_smx:INFO:	# loops 0
10:47:49:ST3_smx:INFO:	# loops 1
10:47:51:ST3_smx:INFO:	# loops 2
10:47:52:ST3_smx:INFO:	# loops 3
10:47:54:ST3_smx:INFO:	# loops 4
10:47:56:ST3_smx:INFO:	Total # of broken channels: 0
10:47:56:ST3_smx:INFO:	List of broken channels: []
10:47:56:ST3_smx:INFO:	Total # of broken channels: 0
10:47:56:ST3_smx:INFO:	List of broken channels: []
10:47:56:ST3_smx:INFO:	Configuring SMX FAST
10:47:58:ST3_smx:INFO:	chip: 21-2 	 25.062742 C 	 1224.468235 mV
10:47:58:ST3_smx:INFO:		Electrons
10:47:58:ST3_smx:INFO:	# loops 0
10:48:00:ST3_smx:INFO:	# loops 1
10:48:01:ST3_smx:INFO:	# loops 2
10:48:03:ST3_smx:INFO:	# loops 3
10:48:05:ST3_smx:INFO:	# loops 4
10:48:06:ST3_smx:INFO:	Total # of broken channels: 0
10:48:06:ST3_smx:INFO:	List of broken channels: []
10:48:06:ST3_smx:INFO:	Total # of broken channels: 0
10:48:06:ST3_smx:INFO:	List of broken channels: []
10:48:07:ST3_smx:INFO:	Configuring SMX FAST
10:48:09:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1206.851500 mV
10:48:09:ST3_smx:INFO:		Electrons
10:48:09:ST3_smx:INFO:	# loops 0
10:48:11:ST3_smx:INFO:	# loops 1
10:48:12:ST3_smx:INFO:	# loops 2
10:48:14:ST3_smx:INFO:	# loops 3
10:48:15:ST3_smx:INFO:	# loops 4
10:48:17:ST3_smx:INFO:	Total # of broken channels: 0
10:48:17:ST3_smx:INFO:	List of broken channels: []
10:48:17:ST3_smx:INFO:	Total # of broken channels: 0
10:48:17:ST3_smx:INFO:	List of broken channels: []
10:48:18:ST3_smx:INFO:	Configuring SMX FAST
10:48:20:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1195.082160 mV
10:48:20:ST3_smx:INFO:		Electrons
10:48:20:ST3_smx:INFO:	# loops 0
10:48:21:ST3_smx:INFO:	# loops 1
10:48:23:ST3_smx:INFO:	# loops 2
10:48:25:ST3_smx:INFO:	# loops 3
10:48:26:ST3_smx:INFO:	# loops 4
10:48:28:ST3_smx:INFO:	Total # of broken channels: 0
10:48:28:ST3_smx:INFO:	List of broken channels: []
10:48:28:ST3_smx:INFO:	Total # of broken channels: 0
10:48:28:ST3_smx:INFO:	List of broken channels: []
10:48:29:ST3_smx:INFO:	Configuring SMX FAST
10:48:31:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1200.969315 mV
10:48:31:ST3_smx:INFO:		Electrons
10:48:31:ST3_smx:INFO:	# loops 0
10:48:32:ST3_smx:INFO:	# loops 1
10:48:34:ST3_smx:INFO:	# loops 2
10:48:36:ST3_smx:INFO:	# loops 3
10:48:37:ST3_smx:INFO:	# loops 4
10:48:39:ST3_smx:INFO:	Total # of broken channels: 0
10:48:39:ST3_smx:INFO:	List of broken channels: []
10:48:39:ST3_smx:INFO:	Total # of broken channels: 0
10:48:39:ST3_smx:INFO:	List of broken channels: []
10:48:40:ST3_smx:INFO:	Configuring SMX FAST
10:48:42:ST3_smx:INFO:	chip: 17-6 	 28.225000 C 	 1218.600960 mV
10:48:42:ST3_smx:INFO:		Electrons
10:48:42:ST3_smx:INFO:	# loops 0
Traceback (most recent call last):
  File "febtest.py", line 279, in DoFEB_MicrocableTest
    self.EMU.mysmx[i].MicroCableTest()
  File "/home/cbm/ST3_v2.29.06/lib/ST3_smx.py", line 584, in MicroCableTest
    val = self.smx.read(ch, (2*d))&0xFFF
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/smx_tester/smx.py", line 39, in read
    return self.ack_monitor.check_read()
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 88, in check_read
    return self._check(self._check_read, timeout)
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/ack_monitor.py", line 60, in _check
    raise AckNotReceived
hctsp.ack_monitor.AckNotReceived: Ack frame not received
10:49:50:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:49:50:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
10:49:50:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:49:50:febtest:INFO:	Testing FEB with SN 2053
10:49:51:smx_tester:INFO:	Scanning setup
10:49:51:elinks:INFO:	Disabling clock on downlink 0
10:49:51:elinks:INFO:	Disabling clock on downlink 1
10:49:51:elinks:INFO:	Disabling clock on downlink 2
10:49:51:elinks:INFO:	Disabling clock on downlink 3
10:49:51:elinks:INFO:	Disabling clock on downlink 4
10:49:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:49:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:49:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:49:51:elinks:INFO:	Disabling clock on downlink 0
10:49:51:elinks:INFO:	Disabling clock on downlink 1
10:49:51:elinks:INFO:	Disabling clock on downlink 2
10:49:51:elinks:INFO:	Disabling clock on downlink 3
10:49:51:elinks:INFO:	Disabling clock on downlink 4
10:49:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:49:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:49:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:49:51:elinks:INFO:	Disabling clock on downlink 0
10:49:51:elinks:INFO:	Disabling clock on downlink 1
10:49:51:elinks:INFO:	Disabling clock on downlink 2
10:49:51:elinks:INFO:	Disabling clock on downlink 3
10:49:51:elinks:INFO:	Disabling clock on downlink 4
10:49:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:49:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:49:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:49:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:49:52:elinks:INFO:	Disabling clock on downlink 0
10:49:52:elinks:INFO:	Disabling clock on downlink 1
10:49:52:elinks:INFO:	Disabling clock on downlink 2
10:49:52:elinks:INFO:	Disabling clock on downlink 3
10:49:52:elinks:INFO:	Disabling clock on downlink 4
10:49:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:49:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:49:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:49:52:elinks:INFO:	Disabling clock on downlink 0
10:49:52:elinks:INFO:	Disabling clock on downlink 1
10:49:52:elinks:INFO:	Disabling clock on downlink 2
10:49:52:elinks:INFO:	Disabling clock on downlink 3
10:49:52:elinks:INFO:	Disabling clock on downlink 4
10:49:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:49:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:49:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:49:52:setup_element:INFO:	Scanning clock phase
10:49:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:49:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:49:52:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:49:52:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:49:52:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
10:49:52:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:49:52:setup_element:INFO:	Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:49:52:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:49:52:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:49:52:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:49:52:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:49:52:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:49:52:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:49:52:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:49:52:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:49:52:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:49:52:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:49:52:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:49:52:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:49:52:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
10:49:52:setup_element:INFO:	Scanning data phases
10:49:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:49:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:49:58:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:49:58:setup_element:INFO:	Eye window for uplink 16: XXX___________________________________XX
Data delay found: 20
10:49:58:setup_element:INFO:	Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
10:49:58:setup_element:INFO:	Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
10:49:58:setup_element:INFO:	Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
10:49:58:setup_element:INFO:	Eye window for uplink 20: XXX___________________________________XX
Data delay found: 20
10:49:58:setup_element:INFO:	Eye window for uplink 21: XX___________________________________XXX
Data delay found: 19
10:49:58:setup_element:INFO:	Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
10:49:58:setup_element:INFO:	Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
10:49:58:setup_element:INFO:	Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
10:49:58:setup_element:INFO:	Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
10:49:58:setup_element:INFO:	Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
10:49:58:setup_element:INFO:	Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
10:49:58:setup_element:INFO:	Eye window for uplink 28: ___________XXXXXX_______________________
Data delay found: 33
10:49:58:setup_element:INFO:	Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
10:49:58:setup_element:INFO:	Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
10:49:58:setup_element:INFO:	Eye window for uplink 31: _____________XXXXXX_____________________
Data delay found: 35
10:49:58:setup_element:INFO:	Setting the data phase to 20 for uplink 16
10:49:58:setup_element:INFO:	Setting the data phase to 16 for uplink 17
10:49:58:setup_element:INFO:	Setting the data phase to 18 for uplink 18
10:49:58:setup_element:INFO:	Setting the data phase to 15 for uplink 19
10:49:58:setup_element:INFO:	Setting the data phase to 20 for uplink 20
10:49:58:setup_element:INFO:	Setting the data phase to 19 for uplink 21
10:49:58:setup_element:INFO:	Setting the data phase to 17 for uplink 22
10:49:58:setup_element:INFO:	Setting the data phase to 15 for uplink 23
10:49:58:setup_element:INFO:	Setting the data phase to 29 for uplink 24
10:49:58:setup_element:INFO:	Setting the data phase to 30 for uplink 25
10:49:58:setup_element:INFO:	Setting the data phase to 28 for uplink 26
10:49:58:setup_element:INFO:	Setting the data phase to 31 for uplink 27
10:49:58:setup_element:INFO:	Setting the data phase to 33 for uplink 28
10:49:58:setup_element:INFO:	Setting the data phase to 35 for uplink 29
10:49:58:setup_element:INFO:	Setting the data phase to 37 for uplink 30
10:49:58:setup_element:INFO:	Setting the data phase to 35 for uplink 31
10:49:58:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________XXXXXXX_
      Uplink 17: ________________________________________________________________________XXXXXXX_
      Uplink 18: ______________________________________________________________________XXXXXXXX__
      Uplink 19: ______________________________________________________________________XXXXXXXX__
      Uplink 20: _______________________________________________________________________XXXXXXXX_
      Uplink 21: _______________________________________________________________________XXXXXXXX_
      Uplink 22: ______________________________________________________________________XXXXXXXX__
      Uplink 23: ______________________________________________________________________XXXXXXXX__
      Uplink 24: ______________________________________________________________________XXXXXXXXX_
      Uplink 25: ______________________________________________________________________XXXXXXXXX_
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 17:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 20:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 21:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 22:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 23:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 24:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
]
10:49:58:setup_element:INFO:	Beginning SMX ASICs map scan
10:49:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:49:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:49:58:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:49:58:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:49:58:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:49:58:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:49:58:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:49:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:49:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:49:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:49:58:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:49:59:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:49:59:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:49:59:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:49:59:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:49:59:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:49:59:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:49:59:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:49:59:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:49:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:49:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:50:01:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________XXXXXXX_
      Uplink 17: ________________________________________________________________________XXXXXXX_
      Uplink 18: ______________________________________________________________________XXXXXXXX__
      Uplink 19: ______________________________________________________________________XXXXXXXX__
      Uplink 20: _______________________________________________________________________XXXXXXXX_
      Uplink 21: _______________________________________________________________________XXXXXXXX_
      Uplink 22: ______________________________________________________________________XXXXXXXX__
      Uplink 23: ______________________________________________________________________XXXXXXXX__
      Uplink 24: ______________________________________________________________________XXXXXXXXX_
      Uplink 25: ______________________________________________________________________XXXXXXXXX_
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 17:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 20:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 21:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 22:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 23:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 24:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________

10:50:01:setup_element:INFO:	Performing Elink synchronization
10:50:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:50:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:50:01:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:50:01:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:50:01:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:50:01:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:50:01:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_21 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_2__upli_21
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_19 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_4__upli_19
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_17 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_6__upli_17
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
10:50:02:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:50:02:febtest:INFO:	23-0 | XA-000-08-002-002-007-180-12 |  28.2 | 1224.5
10:50:02:febtest:INFO:	30-1 | XA-000-08-002-002-007-199-00 |  40.9 | 1177.4
10:50:03:febtest:INFO:	21-2 | XA-000-08-002-002-007-225-14 |  28.2 | 1224.5
10:50:03:febtest:INFO:	28-3 | XA-000-08-002-002-007-200-00 |  31.4 | 1212.7
10:50:03:febtest:INFO:	19-4 | XA-000-08-002-002-007-157-02 |  37.7 | 1201.0
10:50:03:febtest:INFO:	26-5 | XA-000-08-002-002-007-235-14 |  34.6 | 1201.0
10:50:03:febtest:INFO:	17-6 | XA-000-08-002-002-007-233-14 |  31.4 | 1218.6
10:50:04:febtest:INFO:	24-7 | XA-000-08-002-002-007-237-14 |  37.7 | 1189.2
10:50:04:ST3_smx:INFO:	Configuring SMX FAST
10:50:06:ST3_smx:INFO:	chip: 23-0 	 28.225000 C 	 1224.468235 mV
10:50:06:ST3_smx:INFO:		Electrons
10:50:06:ST3_smx:INFO:	# loops 0
10:50:07:ST3_smx:INFO:	# loops 1
10:50:09:ST3_smx:INFO:	# loops 2
10:50:11:ST3_smx:INFO:	# loops 3
10:50:12:ST3_smx:INFO:	# loops 4
10:50:14:ST3_smx:INFO:	Total # of broken channels: 0
10:50:14:ST3_smx:INFO:	List of broken channels: []
10:50:14:ST3_smx:INFO:	Total # of broken channels: 0
10:50:14:ST3_smx:INFO:	List of broken channels: []
10:50:14:ST3_smx:INFO:	Configuring SMX FAST
10:50:16:ST3_smx:INFO:	chip: 30-1 	 40.898880 C 	 1177.390875 mV
10:50:16:ST3_smx:INFO:		Electrons
10:50:16:ST3_smx:INFO:	# loops 0
10:50:18:ST3_smx:INFO:	# loops 1
10:50:20:ST3_smx:INFO:	# loops 2
10:50:21:ST3_smx:INFO:	# loops 3
10:50:23:ST3_smx:INFO:	# loops 4
10:50:25:ST3_smx:INFO:	Total # of broken channels: 0
10:50:25:ST3_smx:INFO:	List of broken channels: []
10:50:25:ST3_smx:INFO:	Total # of broken channels: 0
10:50:25:ST3_smx:INFO:	List of broken channels: []
10:50:25:ST3_smx:INFO:	Configuring SMX FAST
10:50:27:ST3_smx:INFO:	chip: 21-2 	 28.225000 C 	 1224.468235 mV
10:50:27:ST3_smx:INFO:		Electrons
10:50:27:ST3_smx:INFO:	# loops 0
10:50:29:ST3_smx:INFO:	# loops 1
10:50:31:ST3_smx:INFO:	# loops 2
10:50:32:ST3_smx:INFO:	# loops 3
10:50:34:ST3_smx:INFO:	# loops 4
10:50:35:ST3_smx:INFO:	Total # of broken channels: 0
10:50:35:ST3_smx:INFO:	List of broken channels: []
10:50:35:ST3_smx:INFO:	Total # of broken channels: 0
10:50:35:ST3_smx:INFO:	List of broken channels: []
10:50:36:ST3_smx:INFO:	Configuring SMX FAST
10:50:38:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1206.851500 mV
10:50:38:ST3_smx:INFO:		Electrons
10:50:38:ST3_smx:INFO:	# loops 0
10:50:40:ST3_smx:INFO:	# loops 1
10:50:41:ST3_smx:INFO:	# loops 2
10:50:43:ST3_smx:INFO:	# loops 3
10:50:45:ST3_smx:INFO:	# loops 4
10:50:46:ST3_smx:INFO:	Total # of broken channels: 0
10:50:46:ST3_smx:INFO:	List of broken channels: []
10:50:46:ST3_smx:INFO:	Total # of broken channels: 0
10:50:46:ST3_smx:INFO:	List of broken channels: []
10:50:47:ST3_smx:INFO:	Configuring SMX FAST
10:50:49:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1195.082160 mV
10:50:49:ST3_smx:INFO:		Electrons
10:50:49:ST3_smx:INFO:	# loops 0
10:50:51:ST3_smx:INFO:	# loops 1
10:50:52:ST3_smx:INFO:	# loops 2
10:50:54:ST3_smx:INFO:	# loops 3
10:50:56:ST3_smx:INFO:	# loops 4
10:50:57:ST3_smx:INFO:	Total # of broken channels: 0
10:50:57:ST3_smx:INFO:	List of broken channels: []
10:50:57:ST3_smx:INFO:	Total # of broken channels: 0
10:50:57:ST3_smx:INFO:	List of broken channels: []
10:50:58:ST3_smx:INFO:	Configuring SMX FAST
10:51:00:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1200.969315 mV
10:51:00:ST3_smx:INFO:		Electrons
10:51:00:ST3_smx:INFO:	# loops 0
10:51:01:ST3_smx:INFO:	# loops 1
10:51:03:ST3_smx:INFO:	# loops 2
10:51:05:ST3_smx:INFO:	# loops 3
10:51:06:ST3_smx:INFO:	# loops 4
10:51:08:ST3_smx:INFO:	Total # of broken channels: 0
10:51:08:ST3_smx:INFO:	List of broken channels: []
10:51:08:ST3_smx:INFO:	Total # of broken channels: 0
10:51:08:ST3_smx:INFO:	List of broken channels: []
10:51:08:ST3_smx:INFO:	Configuring SMX FAST
10:51:10:ST3_smx:INFO:	chip: 17-6 	 31.389742 C 	 1224.468235 mV
10:51:10:ST3_smx:INFO:		Electrons
10:51:10:ST3_smx:INFO:	# loops 0
10:51:12:ST3_smx:INFO:	# loops 1
10:51:14:ST3_smx:INFO:	# loops 2
10:51:15:ST3_smx:INFO:	# loops 3
10:51:17:ST3_smx:INFO:	# loops 4
10:51:19:ST3_smx:INFO:	Total # of broken channels: 0
10:51:19:ST3_smx:INFO:	List of broken channels: []
10:51:19:ST3_smx:INFO:	Total # of broken channels: 0
10:51:19:ST3_smx:INFO:	List of broken channels: []
10:51:19:ST3_smx:INFO:	Configuring SMX FAST
10:51:21:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1206.851500 mV
10:51:21:ST3_smx:INFO:		Electrons
10:51:21:ST3_smx:INFO:	# loops 0
10:51:23:ST3_smx:INFO:	# loops 1
10:51:25:ST3_smx:INFO:	# loops 2
10:51:26:ST3_smx:INFO:	# loops 3
10:51:28:ST3_smx:INFO:	# loops 4
10:51:29:ST3_smx:INFO:	Total # of broken channels: 0
10:51:29:ST3_smx:INFO:	List of broken channels: []
10:51:29:ST3_smx:INFO:	Total # of broken channels: 0
10:51:29:ST3_smx:INFO:	List of broken channels: []
10:51:30:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:51:30:febtest:INFO:	23-0 | XA-000-08-002-002-007-180-12 |  31.4 | 1224.5
10:51:30:febtest:INFO:	30-1 | XA-000-08-002-002-007-199-00 |  40.9 | 1177.4
10:51:31:febtest:INFO:	21-2 | XA-000-08-002-002-007-225-14 |  28.2 | 1224.5
10:51:31:febtest:INFO:	28-3 | XA-000-08-002-002-007-200-00 |  31.4 | 1206.9
10:51:31:febtest:INFO:	19-4 | XA-000-08-002-002-007-157-02 |  40.9 | 1195.1
10:51:31:febtest:INFO:	26-5 | XA-000-08-002-002-007-235-14 |  34.6 | 1201.0
10:51:31:febtest:INFO:	17-6 | XA-000-08-002-002-007-233-14 |  31.4 | 1224.5
10:51:32:febtest:INFO:	24-7 | XA-000-08-002-002-007-237-14 |  34.6 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2023_11_30-10_49_50
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L3DL500114 M3DL5T1001141A2 62 C

FEB_SN : 0
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '1.9770', '1.851', '0.6054', '7.000', '1.5520', '7.000', '1.5520']
VI_after__Init : ['2.450', '2.0170', '1.850', '0.3185', '7.000', '1.5510', '7.000', '1.5510']
VI_at__the_End : ['2.450', '2.0170', '1.850', '0.3185', '7.000', '1.5510', '7.000', '1.5510']
10:52:43:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2054/TestDate_2023_11_30-10_49_50/