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FEB_2054 30.11.23 10:42:20
Info
10:42:12:febtest:INFO: FEB 8-2 selected
10:42:12:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:42:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:42:20:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:42:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:42:20:febtest:INFO: Testing FEB with SN 2054
10:42:21:smx_tester:INFO: Scanning setup
10:42:21:elinks:INFO: Disabling clock on downlink 0
10:42:21:elinks:INFO: Disabling clock on downlink 1
10:42:21:elinks:INFO: Disabling clock on downlink 2
10:42:21:elinks:INFO: Disabling clock on downlink 3
10:42:21:elinks:INFO: Disabling clock on downlink 4
10:42:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:42:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:21:elinks:INFO: Disabling clock on downlink 0
10:42:22:elinks:INFO: Disabling clock on downlink 1
10:42:22:elinks:INFO: Disabling clock on downlink 2
10:42:22:elinks:INFO: Disabling clock on downlink 3
10:42:22:elinks:INFO: Disabling clock on downlink 4
10:42:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:22:elinks:INFO: Disabling clock on downlink 0
10:42:22:elinks:INFO: Disabling clock on downlink 1
10:42:22:elinks:INFO: Disabling clock on downlink 2
10:42:22:elinks:INFO: Disabling clock on downlink 3
10:42:22:elinks:INFO: Disabling clock on downlink 4
10:42:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:42:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:42:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:22:elinks:INFO: Disabling clock on downlink 0
10:42:22:elinks:INFO: Disabling clock on downlink 1
10:42:22:elinks:INFO: Disabling clock on downlink 2
10:42:22:elinks:INFO: Disabling clock on downlink 3
10:42:22:elinks:INFO: Disabling clock on downlink 4
10:42:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:42:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:22:elinks:INFO: Disabling clock on downlink 0
10:42:22:elinks:INFO: Disabling clock on downlink 1
10:42:22:elinks:INFO: Disabling clock on downlink 2
10:42:22:elinks:INFO: Disabling clock on downlink 3
10:42:22:elinks:INFO: Disabling clock on downlink 4
10:42:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:42:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:22:setup_element:INFO: Scanning clock phase
10:42:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:42:23:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:42:23:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:42:23:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:42:23:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
10:42:23:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
10:42:23:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:42:23:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:42:23:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:42:23:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:42:23:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:42:23:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:42:23:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:42:23:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:42:23:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
10:42:23:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
10:42:23:setup_element:INFO: Eye window for uplink 30: X_________________________________________________________________________XXXXXX
Clock Delay: 37
10:42:23:setup_element:INFO: Eye window for uplink 31: X_________________________________________________________________________XXXXXX
Clock Delay: 37
10:42:23:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2
10:42:23:setup_element:INFO: Scanning data phases
10:42:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:42:28:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:42:28:setup_element:INFO: Eye window for uplink 16: X___________________________________XXX_
Data delay found: 18
10:42:28:setup_element:INFO: Eye window for uplink 17: _______________________________XXXXX____
Data delay found: 13
10:42:28:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX
Data delay found: 17
10:42:28:setup_element:INFO: Eye window for uplink 19: _________________________________XXXX___
Data delay found: 14
10:42:28:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXX_
Data delay found: 16
10:42:28:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
10:42:28:setup_element:INFO: Eye window for uplink 22: __________________________________XXXX__
Data delay found: 15
10:42:28:setup_element:INFO: Eye window for uplink 23: ________________________________XXXX____
Data delay found: 13
10:42:28:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
10:42:28:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
10:42:28:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
10:42:28:setup_element:INFO: Eye window for uplink 27: __________XXXX__________________________
Data delay found: 31
10:42:28:setup_element:INFO: Eye window for uplink 28: ____________XXXX________________________
Data delay found: 33
10:42:28:setup_element:INFO: Eye window for uplink 29: ______________XXXX______________________
Data delay found: 35
10:42:28:setup_element:INFO: Eye window for uplink 30: ___________________XXXXX________________
Data delay found: 1
10:42:28:setup_element:INFO: Eye window for uplink 31: _________________XXXXX__________________
Data delay found: 39
10:42:28:setup_element:INFO: Setting the data phase to 18 for uplink 16
10:42:28:setup_element:INFO: Setting the data phase to 13 for uplink 17
10:42:28:setup_element:INFO: Setting the data phase to 17 for uplink 18
10:42:28:setup_element:INFO: Setting the data phase to 14 for uplink 19
10:42:28:setup_element:INFO: Setting the data phase to 16 for uplink 20
10:42:28:setup_element:INFO: Setting the data phase to 15 for uplink 21
10:42:28:setup_element:INFO: Setting the data phase to 15 for uplink 22
10:42:28:setup_element:INFO: Setting the data phase to 13 for uplink 23
10:42:28:setup_element:INFO: Setting the data phase to 27 for uplink 24
10:42:28:setup_element:INFO: Setting the data phase to 30 for uplink 25
10:42:28:setup_element:INFO: Setting the data phase to 28 for uplink 26
10:42:28:setup_element:INFO: Setting the data phase to 31 for uplink 27
10:42:28:setup_element:INFO: Setting the data phase to 33 for uplink 28
10:42:28:setup_element:INFO: Setting the data phase to 35 for uplink 29
10:42:28:setup_element:INFO: Setting the data phase to 1 for uplink 30
10:42:28:setup_element:INFO: Setting the data phase to 39 for uplink 31
10:42:28:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: ________________________________________________________________________________
Uplink 19: ________________________________________________________________________________
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: _______________________________________________________________________XXXXXXXX_
Uplink 25: _______________________________________________________________________XXXXXXXX_
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: X_________________________________________________________________________XXXXXX
Uplink 31: X_________________________________________________________________________XXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXX_
Uplink 17:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 18:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 20:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 21:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 22:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 23:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 28:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 29:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 30:
Optimal Phase: 1
Window Length: 35
Eye Window: ___________________XXXXX________________
Uplink 31:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
]
10:42:28:setup_element:INFO: Beginning SMX ASICs map scan
10:42:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:42:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:42:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:42:28:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:42:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:42:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:42:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:42:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:42:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:42:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:42:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:42:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:42:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:42:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:42:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:42:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:42:29:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:42:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:42:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:42:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:42:31:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 35
Window Length: 69
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXX__
Uplink 17: ______________________________________________________________________XXXXXXXX__
Uplink 18: ________________________________________________________________________________
Uplink 19: ________________________________________________________________________________
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: _______________________________________________________________________XXXXXXXX_
Uplink 25: _______________________________________________________________________XXXXXXXX_
Uplink 26: _______________________________________________________________________XXXXXXXX_
Uplink 27: _______________________________________________________________________XXXXXXXX_
Uplink 28: ________________________________________________________________________________
Uplink 29: ________________________________________________________________________________
Uplink 30: X_________________________________________________________________________XXXXXX
Uplink 31: X_________________________________________________________________________XXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXX_
Uplink 17:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 18:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 19:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 20:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 21:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 22:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 23:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 24:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 28:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 29:
Optimal Phase: 35
Window Length: 36
Eye Window: ______________XXXX______________________
Uplink 30:
Optimal Phase: 1
Window Length: 35
Eye Window: ___________________XXXXX________________
Uplink 31:
Optimal Phase: 39
Window Length: 35
Eye Window: _________________XXXXX__________________
10:42:31:setup_element:INFO: Performing Elink synchronization
10:42:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:42:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:42:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:42:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:42:31:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:42:31:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
10:42:32:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:42:32:febtest:INFO: 23-0 | XA-000-08-002-000-007-120-10 | 18.7 | 1247.9
10:42:33:febtest:INFO: 30-1 | XA-000-08-002-000-008-158-15 | 40.9 | 1171.5
10:42:33:febtest:INFO: 21-2 | XA-000-08-002-000-007-128-12 | 34.6 | 1189.2
10:42:33:febtest:INFO: 28-3 | XA-000-08-002-000-007-121-10 | 25.1 | 1218.6
10:42:33:febtest:INFO: 19-4 | XA-000-08-002-000-007-119-10 | 40.9 | 1165.6
10:42:34:febtest:INFO: 26-5 | XA-000-08-002-000-008-153-15 | 34.6 | 1177.4
10:42:34:febtest:INFO: 17-6 | XA-000-08-002-000-007-118-10 | 40.9 | 1165.6
10:42:34:febtest:INFO: 24-7 | XA-000-08-002-000-008-151-15 | 31.4 | 1201.0
10:42:34:ST3_smx:INFO: Configuring SMX FAST
10:42:36:ST3_smx:INFO: chip: 23-0 18.745682 C 1242.040240 mV
10:42:36:ST3_smx:INFO: Electrons
10:42:36:ST3_smx:INFO: # loops 0
10:42:38:ST3_smx:INFO: # loops 1
10:42:40:ST3_smx:INFO: # loops 2
10:42:42:ST3_smx:INFO: # loops 3
10:42:43:ST3_smx:INFO: # loops 4
10:42:45:ST3_smx:INFO: Total # of broken channels: 0
10:42:45:ST3_smx:INFO: List of broken channels: []
10:42:45:ST3_smx:INFO: Total # of broken channels: 0
10:42:45:ST3_smx:INFO: List of broken channels: []
10:42:46:ST3_smx:INFO: Configuring SMX FAST
10:42:48:ST3_smx:INFO: chip: 30-1 44.073563 C 1171.483840 mV
10:42:48:ST3_smx:INFO: Electrons
10:42:48:ST3_smx:INFO: # loops 0
10:42:49:ST3_smx:INFO: # loops 1
10:42:51:ST3_smx:INFO: # loops 2
10:42:53:ST3_smx:INFO: # loops 3
10:42:54:ST3_smx:INFO: # loops 4
10:42:56:ST3_smx:INFO: Total # of broken channels: 0
10:42:56:ST3_smx:INFO: List of broken channels: []
10:42:56:ST3_smx:INFO: Total # of broken channels: 0
10:42:56:ST3_smx:INFO: List of broken channels: []
10:42:57:ST3_smx:INFO: Configuring SMX FAST
10:42:59:ST3_smx:INFO: chip: 21-2 44.073563 C 1171.483840 mV
10:42:59:ST3_smx:INFO: Electrons
10:42:59:ST3_smx:INFO: # loops 0
10:43:00:ST3_smx:INFO: # loops 1
10:43:02:ST3_smx:INFO: # loops 2
10:43:04:ST3_smx:INFO: # loops 3
10:43:05:ST3_smx:INFO: # loops 4
10:43:07:ST3_smx:INFO: Total # of broken channels: 0
10:43:07:ST3_smx:INFO: List of broken channels: []
10:43:07:ST3_smx:INFO: Total # of broken channels: 0
10:43:07:ST3_smx:INFO: List of broken channels: []
10:43:07:ST3_smx:INFO: Configuring SMX FAST
10:43:09:ST3_smx:INFO: chip: 28-3 28.225000 C 1224.468235 mV
10:43:09:ST3_smx:INFO: Electrons
10:43:09:ST3_smx:INFO: # loops 0
10:43:11:ST3_smx:INFO: # loops 1
10:43:13:ST3_smx:INFO: # loops 2
10:43:14:ST3_smx:INFO: # loops 3
10:43:16:ST3_smx:INFO: # loops 4
10:43:17:ST3_smx:INFO: Total # of broken channels: 0
10:43:17:ST3_smx:INFO: List of broken channels: []
10:43:17:ST3_smx:INFO: Total # of broken channels: 0
10:43:17:ST3_smx:INFO: List of broken channels: []
10:43:18:ST3_smx:INFO: Configuring SMX FAST
10:43:20:ST3_smx:INFO: chip: 19-4 47.250730 C 1159.654860 mV
10:43:20:ST3_smx:INFO: Electrons
10:43:20:ST3_smx:INFO: # loops 0
10:43:22:ST3_smx:INFO: # loops 1
10:43:23:ST3_smx:INFO: # loops 2
10:43:25:ST3_smx:INFO: # loops 3
10:43:26:ST3_smx:INFO: # loops 4
10:43:28:ST3_smx:INFO: Total # of broken channels: 0
10:43:28:ST3_smx:INFO: List of broken channels: []
10:43:28:ST3_smx:INFO: Total # of broken channels: 0
10:43:28:ST3_smx:INFO: List of broken channels: []
10:43:29:ST3_smx:INFO: Configuring SMX FAST
10:43:31:ST3_smx:INFO: chip: 26-5 44.073563 C 1171.483840 mV
10:43:31:ST3_smx:INFO: Electrons
10:43:31:ST3_smx:INFO: # loops 0
10:43:32:ST3_smx:INFO: # loops 1
10:43:34:ST3_smx:INFO: # loops 2
10:43:35:ST3_smx:INFO: # loops 3
10:43:37:ST3_smx:INFO: # loops 4
10:43:39:ST3_smx:INFO: Total # of broken channels: 0
10:43:39:ST3_smx:INFO: List of broken channels: []
10:43:39:ST3_smx:INFO: Total # of broken channels: 0
10:43:39:ST3_smx:INFO: List of broken channels: []
10:43:39:ST3_smx:INFO: Configuring SMX FAST
10:43:41:ST3_smx:INFO: chip: 17-6 40.898880 C 1177.390875 mV
10:43:41:ST3_smx:INFO: Electrons
10:43:41:ST3_smx:INFO: # loops 0
10:43:43:ST3_smx:INFO: # loops 1
10:43:45:ST3_smx:INFO: # loops 2
10:43:46:ST3_smx:INFO: # loops 3
10:43:48:ST3_smx:INFO: # loops 4
10:43:50:ST3_smx:INFO: Total # of broken channels: 0
10:43:50:ST3_smx:INFO: List of broken channels: []
10:43:50:ST3_smx:INFO: Total # of broken channels: 0
10:43:50:ST3_smx:INFO: List of broken channels: []
10:43:50:ST3_smx:INFO: Configuring SMX FAST
10:43:52:ST3_smx:INFO: chip: 24-7 37.726682 C 1183.292940 mV
10:43:52:ST3_smx:INFO: Electrons
10:43:52:ST3_smx:INFO: # loops 0
10:43:54:ST3_smx:INFO: # loops 1
10:43:56:ST3_smx:INFO: # loops 2
10:43:57:ST3_smx:INFO: # loops 3
10:43:59:ST3_smx:INFO: # loops 4
10:44:01:ST3_smx:INFO: Total # of broken channels: 0
10:44:01:ST3_smx:INFO: List of broken channels: []
10:44:01:ST3_smx:INFO: Total # of broken channels: 0
10:44:01:ST3_smx:INFO: List of broken channels: []
10:44:01:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:44:01:febtest:INFO: 23-0 | XA-000-08-002-000-007-120-10 | 25.1 | 1242.0
10:44:02:febtest:INFO: 30-1 | XA-000-08-002-000-008-158-15 | 44.1 | 1177.4
10:44:02:febtest:INFO: 21-2 | XA-000-08-002-000-007-128-12 | 47.3 | 1171.5
10:44:02:febtest:INFO: 28-3 | XA-000-08-002-000-007-121-10 | 31.4 | 1224.5
10:44:02:febtest:INFO: 19-4 | XA-000-08-002-000-007-119-10 | 47.3 | 1159.7
10:44:03:febtest:INFO: 26-5 | XA-000-08-002-000-008-153-15 | 44.1 | 1171.5
10:44:03:febtest:INFO: 17-6 | XA-000-08-002-000-007-118-10 | 40.9 | 1177.4
10:44:03:febtest:INFO: 24-7 | XA-000-08-002-000-008-151-15 | 37.7 | 1183.3
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2023_11_30-10_42_20
OPERATOR : Robert V.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L3DL500114 M3DL5T1001141A2 62 C
FEB_SN : 0
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.5560', '1.846', '1.6680', '7.000', '1.5450', '7.000', '1.5450']
VI_after__Init : ['2.450', '2.0170', '1.850', '0.3185', '7.000', '1.5510', '7.000', '1.5510']
VI_at__the_End : ['2.450', '2.0170', '1.850', '0.3185', '7.000', '1.5510', '7.000', '1.5510']
10:44:15:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2054/TestDate_2023_11_30-10_42_20/