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FEB_2060 12.01.24 10:14:52
Info
10:12:05:febtest:INFO: FEB 8-2 selected
10:12:05:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:12:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:12:09:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:12:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:12:09:febtest:INFO: Testing FEB with SN 1059
10:12:10:smx_tester:INFO: Scanning setup
10:12:10:elinks:INFO: Disabling clock on downlink 0
10:12:10:elinks:INFO: Disabling clock on downlink 1
10:12:10:elinks:INFO: Disabling clock on downlink 2
10:12:10:elinks:INFO: Disabling clock on downlink 3
10:12:10:elinks:INFO: Disabling clock on downlink 4
10:12:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:12:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:10:elinks:INFO: Disabling clock on downlink 0
10:12:10:elinks:INFO: Disabling clock on downlink 1
10:12:10:elinks:INFO: Disabling clock on downlink 2
10:12:10:elinks:INFO: Disabling clock on downlink 3
10:12:10:elinks:INFO: Disabling clock on downlink 4
10:12:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:12:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:12:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:12:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:12:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:12:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:12:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:12:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:12:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:10:elinks:INFO: Disabling clock on downlink 0
10:12:10:elinks:INFO: Disabling clock on downlink 1
10:12:10:elinks:INFO: Disabling clock on downlink 2
10:12:10:elinks:INFO: Disabling clock on downlink 3
10:12:10:elinks:INFO: Disabling clock on downlink 4
10:12:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:12:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:11:elinks:INFO: Disabling clock on downlink 0
10:12:11:elinks:INFO: Disabling clock on downlink 1
10:12:11:elinks:INFO: Disabling clock on downlink 2
10:12:11:elinks:INFO: Disabling clock on downlink 3
10:12:11:elinks:INFO: Disabling clock on downlink 4
10:12:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:12:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:11:elinks:INFO: Disabling clock on downlink 0
10:12:11:elinks:INFO: Disabling clock on downlink 1
10:12:11:elinks:INFO: Disabling clock on downlink 2
10:12:11:elinks:INFO: Disabling clock on downlink 3
10:12:11:elinks:INFO: Disabling clock on downlink 4
10:12:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:12:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:12:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:12:11:setup_element:INFO: Scanning clock phase
10:12:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:11:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:12:11:setup_element:INFO: Eye window for uplink 8 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:12:11:setup_element:INFO: Eye window for uplink 9 : ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:12:11:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:12:11:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:12:11:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:12:11:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:12:11:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:12:11:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:12:11:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
10:12:11:setup_element:INFO: Scanning data phases
10:12:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:17:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:12:17:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXX_________
Data delay found: 8
10:12:17:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
10:12:17:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXXX______
Data delay found: 10
10:12:17:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXX___
Data delay found: 14
10:12:17:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXX_____
Data delay found: 12
10:12:17:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXX__
Data delay found: 15
10:12:17:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
10:12:17:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
10:12:17:setup_element:INFO: Setting the data phase to 8 for uplink 8
10:12:17:setup_element:INFO: Setting the data phase to 13 for uplink 9
10:12:17:setup_element:INFO: Setting the data phase to 10 for uplink 10
10:12:17:setup_element:INFO: Setting the data phase to 14 for uplink 11
10:12:17:setup_element:INFO: Setting the data phase to 12 for uplink 12
10:12:17:setup_element:INFO: Setting the data phase to 15 for uplink 13
10:12:17:setup_element:INFO: Setting the data phase to 10 for uplink 14
10:12:17:setup_element:INFO: Setting the data phase to 12 for uplink 15
10:12:17:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _____________________________________________________________________XXXXXXX____
Uplink 15: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 8:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 11:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 12:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 13:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
]
10:12:17:setup_element:INFO: Beginning SMX ASICs map scan
10:12:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:12:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:12:17:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:12:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:12:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:12:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:12:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:12:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:12:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:12:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:12:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:12:19:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 1
Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 8: ____________________________________________________________________XXXXXXXX____
Uplink 9: ____________________________________________________________________XXXXXXXX____
Uplink 10: ____________________________________________________________________XXXXXXXX____
Uplink 11: ____________________________________________________________________XXXXXXXX____
Uplink 12: ______________________________________________________________________XXXXXXX___
Uplink 13: ______________________________________________________________________XXXXXXX___
Uplink 14: _____________________________________________________________________XXXXXXX____
Uplink 15: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 8:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 9:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 10:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 11:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 12:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 13:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 14:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 15:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
10:12:19:setup_element:INFO: Performing Elink synchronization
10:12:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:12:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:12:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:12:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:12:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:12:20:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
10:12:20:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 1 | 0 | [8] | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | [(0, 14), (1, 15)]
10:12:20:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:12:20:febtest:INFO: 8-1 | XA-000-08-002-000-001-143-09 | 25.1 | 1236.2
10:12:21:febtest:INFO: 10-3 | XA-000-08-002-000-001-157-14 | 21.9 | 1242.0
10:12:21:febtest:INFO: 12-5 | XA-000-08-002-000-001-165-07 | 34.6 | 1201.0
10:12:21:febtest:INFO: 14-7 | XA-000-08-002-000-001-160-07 | 40.9 | 1171.5
10:12:21:ST3_smx:INFO: Configuring SMX FAST
10:12:23:ST3_smx:INFO: chip: 8-1 40.898880 C 1177.390875 mV
10:12:23:ST3_smx:INFO: Electrons
10:12:23:ST3_smx:INFO: # loops 0
10:12:25:ST3_smx:INFO: # loops 1
10:12:27:ST3_smx:INFO: # loops 2
10:12:28:ST3_smx:INFO: # loops 3
10:12:30:ST3_smx:INFO: # loops 4
10:12:32:ST3_smx:INFO: Total # of broken channels: 0
10:12:32:ST3_smx:INFO: List of broken channels: []
10:12:32:ST3_smx:INFO: Total # of broken channels: 0
10:12:32:ST3_smx:INFO: List of broken channels: []
10:12:32:ST3_smx:INFO: Configuring SMX FAST
10:12:34:ST3_smx:INFO: chip: 10-3 34.556970 C 1200.969315 mV
10:12:34:ST3_smx:INFO: Electrons
10:12:34:ST3_smx:INFO: # loops 0
10:12:36:ST3_smx:INFO: # loops 1
10:12:38:ST3_smx:INFO: # loops 2
10:12:39:ST3_smx:INFO: # loops 3
10:12:41:ST3_smx:INFO: # loops 4
10:12:43:ST3_smx:INFO: Total # of broken channels: 0
10:12:43:ST3_smx:INFO: List of broken channels: []
10:12:43:ST3_smx:INFO: Total # of broken channels: 0
10:12:43:ST3_smx:INFO: List of broken channels: []
10:12:44:ST3_smx:INFO: Configuring SMX FAST
10:12:46:ST3_smx:INFO: chip: 12-5 40.898880 C 1183.292940 mV
10:12:46:ST3_smx:INFO: Electrons
10:12:46:ST3_smx:INFO: # loops 0
10:12:47:ST3_smx:INFO: # loops 1
10:12:49:ST3_smx:INFO: # loops 2
10:12:51:ST3_smx:INFO: # loops 3
10:12:52:ST3_smx:INFO: # loops 4
10:12:54:ST3_smx:INFO: Total # of broken channels: 0
10:12:54:ST3_smx:INFO: List of broken channels: []
10:12:54:ST3_smx:INFO: Total # of broken channels: 0
10:12:54:ST3_smx:INFO: List of broken channels: []
10:12:55:ST3_smx:INFO: Configuring SMX FAST
10:12:57:ST3_smx:INFO: chip: 14-7 37.726682 C 1183.292940 mV
10:12:57:ST3_smx:INFO: Electrons
10:12:57:ST3_smx:INFO: # loops 0
10:12:58:ST3_smx:INFO: # loops 1
10:13:00:ST3_smx:INFO: # loops 2
10:13:01:ST3_smx:INFO: # loops 3
10:13:03:ST3_smx:INFO: # loops 4
10:13:05:ST3_smx:INFO: Total # of broken channels: 0
10:13:05:ST3_smx:INFO: List of broken channels: []
10:13:05:ST3_smx:INFO: Total # of broken channels: 0
10:13:05:ST3_smx:INFO: List of broken channels: []
10:13:05:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:13:06:febtest:INFO: 8-1 | XA-000-08-002-000-001-143-09 | 40.9 | 1177.4
10:13:06:febtest:INFO: 10-3 | XA-000-08-002-000-001-157-14 | 34.6 | 1201.0
10:13:06:febtest:INFO: 12-5 | XA-000-08-002-000-001-165-07 | 40.9 | 1189.2
10:13:06:febtest:INFO: 14-7 | XA-000-08-002-000-001-160-07 | 40.9 | 1183.3
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_12-10_12_09
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L6DL200120 M6DL2B2001202B2 124 A
FEB_SN : 1059
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.449', '0.9049', '1.847', '1.5210', '7.000', '1.5470', '7.000', '1.5470']
VI_after__Init : ['2.450', '1.9770', '1.850', '0.6014', '7.000', '1.5430', '7.000', '1.5430']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:14:45:febtest:INFO: FEB 8-2 selected
10:14:45:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:14:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:14:52:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:14:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:14:52:febtest:INFO: Testing FEB with SN 2060
10:14:54:smx_tester:INFO: Scanning setup
10:14:54:elinks:INFO: Disabling clock on downlink 0
10:14:54:elinks:INFO: Disabling clock on downlink 1
10:14:54:elinks:INFO: Disabling clock on downlink 2
10:14:54:elinks:INFO: Disabling clock on downlink 3
10:14:54:elinks:INFO: Disabling clock on downlink 4
10:14:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:14:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:54:elinks:INFO: Disabling clock on downlink 0
10:14:54:elinks:INFO: Disabling clock on downlink 1
10:14:54:elinks:INFO: Disabling clock on downlink 2
10:14:54:elinks:INFO: Disabling clock on downlink 3
10:14:54:elinks:INFO: Disabling clock on downlink 4
10:14:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:14:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:54:elinks:INFO: Disabling clock on downlink 0
10:14:54:elinks:INFO: Disabling clock on downlink 1
10:14:54:elinks:INFO: Disabling clock on downlink 2
10:14:54:elinks:INFO: Disabling clock on downlink 3
10:14:54:elinks:INFO: Disabling clock on downlink 4
10:14:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:14:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:14:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:14:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:14:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:14:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:14:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:14:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:14:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:54:elinks:INFO: Disabling clock on downlink 0
10:14:54:elinks:INFO: Disabling clock on downlink 1
10:14:54:elinks:INFO: Disabling clock on downlink 2
10:14:54:elinks:INFO: Disabling clock on downlink 3
10:14:54:elinks:INFO: Disabling clock on downlink 4
10:14:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:14:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:54:elinks:INFO: Disabling clock on downlink 0
10:14:54:elinks:INFO: Disabling clock on downlink 1
10:14:54:elinks:INFO: Disabling clock on downlink 2
10:14:54:elinks:INFO: Disabling clock on downlink 3
10:14:54:elinks:INFO: Disabling clock on downlink 4
10:14:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:14:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:14:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:14:55:setup_element:INFO: Scanning clock phase
10:14:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:14:55:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:14:55:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:14:55:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
10:14:55:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:14:55:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
10:14:55:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:14:55:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:14:55:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:14:55:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:14:55:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
10:14:55:setup_element:INFO: Scanning data phases
10:14:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:14:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:15:00:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:15:00:setup_element:INFO: Eye window for uplink 24: ____XXXXXX______________________________
Data delay found: 26
10:15:00:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
10:15:00:setup_element:INFO: Eye window for uplink 26: ___XXXXX________________________________
Data delay found: 25
10:15:00:setup_element:INFO: Eye window for uplink 27: _______XXXXX____________________________
Data delay found: 29
10:15:00:setup_element:INFO: Eye window for uplink 28: __________XXXXXX________________________
Data delay found: 32
10:15:00:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
10:15:00:setup_element:INFO: Eye window for uplink 30: _____________XXXXX______________________
Data delay found: 35
10:15:00:setup_element:INFO: Eye window for uplink 31: ___________XXXXXX_______________________
Data delay found: 33
10:15:00:setup_element:INFO: Setting the data phase to 26 for uplink 24
10:15:00:setup_element:INFO: Setting the data phase to 29 for uplink 25
10:15:00:setup_element:INFO: Setting the data phase to 25 for uplink 26
10:15:00:setup_element:INFO: Setting the data phase to 29 for uplink 27
10:15:00:setup_element:INFO: Setting the data phase to 32 for uplink 28
10:15:00:setup_element:INFO: Setting the data phase to 34 for uplink 29
10:15:00:setup_element:INFO: Setting the data phase to 35 for uplink 30
10:15:00:setup_element:INFO: Setting the data phase to 33 for uplink 31
10:15:00:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXX____
Uplink 27: ____________________________________________________________________XXXXXXXX____
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXX____
Uplink 31: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 27:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 28:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 31:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
]
10:15:00:setup_element:INFO: Beginning SMX ASICs map scan
10:15:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:15:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:15:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:15:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:15:00:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:15:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:15:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:15:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:15:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:15:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:15:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:15:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:15:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:15:03:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 24: ____________________________________________________________________XXXXXXXXX___
Uplink 25: ____________________________________________________________________XXXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXX____
Uplink 27: ____________________________________________________________________XXXXXXXX____
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXX____
Uplink 31: _____________________________________________________________________XXXXXXX____
Data phase characteristics:
Uplink 24:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 27:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 28:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 31:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
10:15:03:setup_element:INFO: Performing Elink synchronization
10:15:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:15:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:15:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:15:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:15:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:15:03:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
10:15:03:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
10:15:04:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:15:04:febtest:INFO: 30-1 | XA-000-08-002-000-001-168-07 | 34.6 | 1195.1
10:15:04:febtest:INFO: 28-3 | XA-000-08-002-000-001-166-07 | 56.8 | 1124.0
10:15:04:febtest:INFO: 26-5 | XA-000-08-002-000-001-144-14 | 31.4 | 1212.7
10:15:05:febtest:INFO: 24-7 | XA-000-08-002-000-001-167-07 | 44.1 | 1171.5
10:15:05:ST3_smx:INFO: Configuring SMX FAST
10:15:07:ST3_smx:INFO: chip: 30-1 37.726682 C 1189.190035 mV
10:15:07:ST3_smx:INFO: Electrons
10:15:07:ST3_smx:INFO: # loops 0
10:15:08:ST3_smx:INFO: # loops 1
10:15:10:ST3_smx:INFO: # loops 2
10:15:12:ST3_smx:INFO: # loops 3
10:15:13:ST3_smx:INFO: # loops 4
10:15:15:ST3_smx:INFO: Total # of broken channels: 0
10:15:15:ST3_smx:INFO: List of broken channels: []
10:15:15:ST3_smx:INFO: Total # of broken channels: 0
10:15:15:ST3_smx:INFO: List of broken channels: []
10:15:16:ST3_smx:INFO: Configuring SMX FAST
10:15:18:ST3_smx:INFO: chip: 28-3 63.173842 C 1100.211760 mV
10:15:18:ST3_smx:INFO: Electrons
10:15:18:ST3_smx:INFO: # loops 0
10:15:19:ST3_smx:INFO: # loops 1
10:15:21:ST3_smx:INFO: # loops 2
10:15:23:ST3_smx:INFO: # loops 3
10:15:24:ST3_smx:INFO: # loops 4
10:15:26:ST3_smx:INFO: Total # of broken channels: 0
10:15:26:ST3_smx:INFO: List of broken channels: []
10:15:26:ST3_smx:INFO: Total # of broken channels: 0
10:15:26:ST3_smx:INFO: List of broken channels: []
10:15:27:ST3_smx:INFO: Configuring SMX FAST
10:15:29:ST3_smx:INFO: chip: 26-5 40.898880 C 1183.292940 mV
10:15:29:ST3_smx:INFO: Electrons
10:15:29:ST3_smx:INFO: # loops 0
10:15:30:ST3_smx:INFO: # loops 1
10:15:32:ST3_smx:INFO: # loops 2
10:15:34:ST3_smx:INFO: # loops 3
10:15:36:ST3_smx:INFO: # loops 4
10:15:37:ST3_smx:INFO: Total # of broken channels: 0
10:15:37:ST3_smx:INFO: List of broken channels: []
10:15:37:ST3_smx:INFO: Total # of broken channels: 0
10:15:37:ST3_smx:INFO: List of broken channels: []
10:15:38:ST3_smx:INFO: Configuring SMX FAST
10:15:40:ST3_smx:INFO: chip: 24-7 44.073563 C 1165.571835 mV
10:15:40:ST3_smx:INFO: Electrons
10:15:40:ST3_smx:INFO: # loops 0
10:15:42:ST3_smx:INFO: # loops 1
10:15:43:ST3_smx:INFO: # loops 2
10:15:45:ST3_smx:INFO: # loops 3
10:15:47:ST3_smx:INFO: # loops 4
10:15:48:ST3_smx:INFO: Total # of broken channels: 0
10:15:48:ST3_smx:INFO: List of broken channels: []
10:15:48:ST3_smx:INFO: Total # of broken channels: 0
10:15:48:ST3_smx:INFO: List of broken channels: []
10:15:49:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:15:49:febtest:INFO: 30-1 | XA-000-08-002-000-001-168-07 | 37.7 | 1183.3
10:15:50:febtest:INFO: 28-3 | XA-000-08-002-000-001-166-07 | 63.2 | 1100.2
10:15:50:febtest:INFO: 26-5 | XA-000-08-002-000-001-144-14 | 40.9 | 1183.3
10:15:50:febtest:INFO: 24-7 | XA-000-08-002-000-001-167-07 | 44.1 | 1165.6
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_12-10_14_52
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L6DL200120 M6DL2B2001202B2 124 A
FEB_SN : 2060
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.449', '0.7489', '1.848', '0.9285', '7.001', '1.5410', '7.001', '1.5410']
VI_after__Init : ['2.450', '1.9770', '1.850', '0.6014', '7.000', '1.5430', '7.000', '1.5430']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:15:53:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2060/TestDate_2024_01_12-10_14_52/