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FEB_2061 15.01.24 09:40:46
Info
09:40:44:febtest:INFO: FEB 8-2 selected
09:40:44:smx_tester:INFO: Setting Elink clock mode to 160 MHz
09:40:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:40:46:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
09:40:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:40:46:febtest:INFO: Testing FEB with SN 2061
09:40:48:smx_tester:INFO: Scanning setup
09:40:48:elinks:INFO: Disabling clock on downlink 0
09:40:48:elinks:INFO: Disabling clock on downlink 1
09:40:48:elinks:INFO: Disabling clock on downlink 2
09:40:48:elinks:INFO: Disabling clock on downlink 3
09:40:48:elinks:INFO: Disabling clock on downlink 4
09:40:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:40:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:48:elinks:INFO: Disabling clock on downlink 0
09:40:48:elinks:INFO: Disabling clock on downlink 1
09:40:48:elinks:INFO: Disabling clock on downlink 2
09:40:48:elinks:INFO: Disabling clock on downlink 3
09:40:48:elinks:INFO: Disabling clock on downlink 4
09:40:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:40:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:48:elinks:INFO: Disabling clock on downlink 0
09:40:48:elinks:INFO: Disabling clock on downlink 1
09:40:48:elinks:INFO: Disabling clock on downlink 2
09:40:48:elinks:INFO: Disabling clock on downlink 3
09:40:48:elinks:INFO: Disabling clock on downlink 4
09:40:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:40:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:40:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:40:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:40:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:40:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:40:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:40:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:40:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:48:elinks:INFO: Disabling clock on downlink 0
09:40:48:elinks:INFO: Disabling clock on downlink 1
09:40:48:elinks:INFO: Disabling clock on downlink 2
09:40:48:elinks:INFO: Disabling clock on downlink 3
09:40:48:elinks:INFO: Disabling clock on downlink 4
09:40:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:40:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:48:elinks:INFO: Disabling clock on downlink 0
09:40:48:elinks:INFO: Disabling clock on downlink 1
09:40:48:elinks:INFO: Disabling clock on downlink 2
09:40:48:elinks:INFO: Disabling clock on downlink 3
09:40:48:elinks:INFO: Disabling clock on downlink 4
09:40:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:40:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:48:setup_element:INFO: Scanning clock phase
09:40:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:49:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:40:49:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:40:49:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:40:49:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:40:49:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
09:40:49:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:40:49:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:40:49:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:40:49:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:40:49:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
09:40:49:setup_element:INFO: Scanning data phases
09:40:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:54:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:40:54:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
09:40:54:setup_element:INFO: Eye window for uplink 25: __________XXXX__________________________
Data delay found: 31
09:40:54:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
09:40:54:setup_element:INFO: Eye window for uplink 27: __________XXXXX_________________________
Data delay found: 32
09:40:54:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
09:40:54:setup_element:INFO: Eye window for uplink 29: ____________XXXXXX______________________
Data delay found: 34
09:40:54:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXX____________________
Data delay found: 36
09:40:54:setup_element:INFO: Eye window for uplink 31: ____________XXXXXX______________________
Data delay found: 34
09:40:54:setup_element:INFO: Setting the data phase to 28 for uplink 24
09:40:54:setup_element:INFO: Setting the data phase to 31 for uplink 25
09:40:54:setup_element:INFO: Setting the data phase to 29 for uplink 26
09:40:54:setup_element:INFO: Setting the data phase to 32 for uplink 27
09:40:54:setup_element:INFO: Setting the data phase to 33 for uplink 28
09:40:54:setup_element:INFO: Setting the data phase to 34 for uplink 29
09:40:54:setup_element:INFO: Setting the data phase to 36 for uplink 30
09:40:54:setup_element:INFO: Setting the data phase to 34 for uplink 31
09:40:54:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXX___
Uplink 29: ______________________________________________________________________XXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 28:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 30:
Optimal Phase: 36
Window Length: 33
Eye Window: _____________XXXXXXX____________________
Uplink 31:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
]
09:40:54:setup_element:INFO: Beginning SMX ASICs map scan
09:40:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:40:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:40:54:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:40:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:40:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:40:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:40:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:40:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:40:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:40:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:40:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:40:57:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 32
Window Length: 71
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ____________________________________________________________________XXXXXXXXX___
Uplink 27: ____________________________________________________________________XXXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXX___
Uplink 29: ______________________________________________________________________XXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 28:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
Uplink 30:
Optimal Phase: 36
Window Length: 33
Eye Window: _____________XXXXXXX____________________
Uplink 31:
Optimal Phase: 34
Window Length: 34
Eye Window: ____________XXXXXX______________________
09:40:57:setup_element:INFO: Performing Elink synchronization
09:40:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:40:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:40:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:40:57:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
09:40:57:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
09:40:58:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:40:58:febtest:INFO: 30-1 | XA-000-08-002-000-001-113-15 | 40.9 | 1183.3
09:40:58:febtest:INFO: 28-3 | XA-000-08-002-000-001-087-01 | 50.4 | 1135.9
09:40:58:febtest:INFO: 26-5 | XA-000-08-002-000-001-085-01 | 37.7 | 1177.4
09:40:58:febtest:INFO: 24-7 | XA-000-08-002-000-001-089-01 | 28.2 | 1212.7
09:40:58:ST3_smx:INFO: Configuring SMX FAST
09:41:00:ST3_smx:INFO: chip: 30-1 47.250730 C 1153.732915 mV
09:41:00:ST3_smx:INFO: Electrons
09:41:00:ST3_smx:INFO: # loops 0
09:41:02:ST3_smx:INFO: # loops 1
09:41:04:ST3_smx:INFO: # loops 2
09:41:06:ST3_smx:INFO: # loops 3
09:41:08:ST3_smx:INFO: # loops 4
09:41:09:ST3_smx:INFO: Total # of broken channels: 0
09:41:09:ST3_smx:INFO: List of broken channels: []
09:41:09:ST3_smx:INFO: Total # of broken channels: 0
09:41:09:ST3_smx:INFO: List of broken channels: []
09:41:10:ST3_smx:INFO: Configuring SMX FAST
09:41:12:ST3_smx:INFO: chip: 28-3 50.430383 C 1141.874115 mV
09:41:12:ST3_smx:INFO: Electrons
09:41:12:ST3_smx:INFO: # loops 0
09:41:14:ST3_smx:INFO: # loops 1
09:41:16:ST3_smx:INFO: # loops 2
09:41:17:ST3_smx:INFO: # loops 3
09:41:19:ST3_smx:INFO: # loops 4
09:41:21:ST3_smx:INFO: Total # of broken channels: 0
09:41:21:ST3_smx:INFO: List of broken channels: []
09:41:21:ST3_smx:INFO: Total # of broken channels: 0
09:41:21:ST3_smx:INFO: List of broken channels: []
09:41:22:ST3_smx:INFO: Configuring SMX FAST
09:41:24:ST3_smx:INFO: chip: 26-5 44.073563 C 1171.483840 mV
09:41:24:ST3_smx:INFO: Electrons
09:41:24:ST3_smx:INFO: # loops 0
09:41:25:ST3_smx:INFO: # loops 1
09:41:27:ST3_smx:INFO: # loops 2
09:41:29:ST3_smx:INFO: # loops 3
09:41:30:ST3_smx:INFO: # loops 4
09:41:32:ST3_smx:INFO: Total # of broken channels: 0
09:41:32:ST3_smx:INFO: List of broken channels: []
09:41:32:ST3_smx:INFO: Total # of broken channels: 0
09:41:32:ST3_smx:INFO: List of broken channels: []
09:41:33:ST3_smx:INFO: Configuring SMX FAST
09:41:35:ST3_smx:INFO: chip: 24-7 40.898880 C 1171.483840 mV
09:41:35:ST3_smx:INFO: Electrons
09:41:35:ST3_smx:INFO: # loops 0
09:41:37:ST3_smx:INFO: # loops 1
09:41:38:ST3_smx:INFO: # loops 2
09:41:40:ST3_smx:INFO: # loops 3
09:41:42:ST3_smx:INFO: # loops 4
09:41:43:ST3_smx:INFO: Total # of broken channels: 0
09:41:43:ST3_smx:INFO: List of broken channels: []
09:41:43:ST3_smx:INFO: Total # of broken channels: 0
09:41:43:ST3_smx:INFO: List of broken channels: []
09:41:44:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
09:41:44:febtest:INFO: 30-1 | XA-000-08-002-000-001-113-15 | 50.4 | 1153.7
09:41:44:febtest:INFO: 28-3 | XA-000-08-002-000-001-087-01 | 50.4 | 1141.9
09:41:45:febtest:INFO: 26-5 | XA-000-08-002-000-001-085-01 | 40.9 | 1171.5
09:41:45:febtest:INFO: 24-7 | XA-000-08-002-000-001-089-01 | 40.9 | 1171.5
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_15-09_40_46
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 2061
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '0.7151', '1.847', '1.1030', '7.001', '1.5230', '7.001', '1.5230']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:41:48:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2061/TestDate_2024_01_15-09_40_46/