10:06:33:febtest:INFO:	FEB 8-2 selected
10:06:33:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
10:06:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:06:39:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
10:06:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:07:04:ST3_ModuleSelector:INFO:	L6DL200120 M6DL2B1001201B2 42 A

10:07:04:ST3_ModuleSelector:INFO:	
10:07:04:febtest:INFO:	Testing FEB with SN 1079
10:07:05:smx_tester:INFO:	Scanning setup
10:07:05:elinks:INFO:	Disabling clock on downlink 0
10:07:05:elinks:INFO:	Disabling clock on downlink 1
10:07:05:elinks:INFO:	Disabling clock on downlink 2
10:07:05:elinks:INFO:	Disabling clock on downlink 3
10:07:05:elinks:INFO:	Disabling clock on downlink 4
10:07:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:07:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:07:05:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:07:05:elinks:INFO:	Disabling clock on downlink 0
10:07:05:elinks:INFO:	Disabling clock on downlink 1
10:07:05:elinks:INFO:	Disabling clock on downlink 2
10:07:05:elinks:INFO:	Disabling clock on downlink 3
10:07:05:elinks:INFO:	Disabling clock on downlink 4
10:07:05:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:07:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
10:07:06:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
10:07:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:07:06:elinks:INFO:	Disabling clock on downlink 0
10:07:06:elinks:INFO:	Disabling clock on downlink 1
10:07:06:elinks:INFO:	Disabling clock on downlink 2
10:07:06:elinks:INFO:	Disabling clock on downlink 3
10:07:06:elinks:INFO:	Disabling clock on downlink 4
10:07:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:07:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:07:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:07:06:elinks:INFO:	Disabling clock on downlink 0
10:07:06:elinks:INFO:	Disabling clock on downlink 1
10:07:06:elinks:INFO:	Disabling clock on downlink 2
10:07:06:elinks:INFO:	Disabling clock on downlink 3
10:07:06:elinks:INFO:	Disabling clock on downlink 4
10:07:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:07:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:07:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:07:06:elinks:INFO:	Disabling clock on downlink 0
10:07:06:elinks:INFO:	Disabling clock on downlink 1
10:07:06:elinks:INFO:	Disabling clock on downlink 2
10:07:06:elinks:INFO:	Disabling clock on downlink 3
10:07:06:elinks:INFO:	Disabling clock on downlink 4
10:07:06:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:07:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:07:06:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:07:06:setup_element:INFO:	Scanning clock phase
10:07:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:07:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:07:06:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
10:07:06:setup_element:INFO:	Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:07:06:setup_element:INFO:	Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
10:07:06:setup_element:INFO:	Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:07:06:setup_element:INFO:	Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:07:06:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:07:06:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:07:06:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXX___
Clock Delay: 34
10:07:06:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXX___
Clock Delay: 34
10:07:06:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:07:06:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:07:06:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:07:06:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:07:06:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:07:06:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:07:06:setup_element:INFO:	Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:07:06:setup_element:INFO:	Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:07:06:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
10:07:07:setup_element:INFO:	Scanning data phases
10:07:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:07:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:07:12:setup_element:INFO:	Data phase scan results for group 0, downlink 1
10:07:12:setup_element:INFO:	Eye window for uplink 0 : __________XXXXX_________________________
Data delay found: 32
10:07:12:setup_element:INFO:	Eye window for uplink 1 : _____XXXXXX_____________________________
Data delay found: 27
10:07:12:setup_element:INFO:	Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
10:07:12:setup_element:INFO:	Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
10:07:12:setup_element:INFO:	Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
10:07:12:setup_element:INFO:	Eye window for uplink 5 : XXXXX__________________________________X
Data delay found: 21
10:07:12:setup_element:INFO:	Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
10:07:12:setup_element:INFO:	Eye window for uplink 7 : _________________________________XXXXXX_
Data delay found: 15
10:07:12:setup_element:INFO:	Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
10:07:12:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
10:07:12:setup_element:INFO:	Eye window for uplink 10: _________________________XXXXXX_________
Data delay found: 7
10:07:12:setup_element:INFO:	Eye window for uplink 11: _____________________________XXXXXX_____
Data delay found: 11
10:07:12:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
10:07:12:setup_element:INFO:	Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
10:07:12:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
10:07:12:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
10:07:12:setup_element:INFO:	Setting the data phase to 32 for uplink 0
10:07:12:setup_element:INFO:	Setting the data phase to 27 for uplink 1
10:07:12:setup_element:INFO:	Setting the data phase to 29 for uplink 2
10:07:12:setup_element:INFO:	Setting the data phase to 27 for uplink 3
10:07:12:setup_element:INFO:	Setting the data phase to 26 for uplink 4
10:07:12:setup_element:INFO:	Setting the data phase to 21 for uplink 5
10:07:12:setup_element:INFO:	Setting the data phase to 20 for uplink 6
10:07:12:setup_element:INFO:	Setting the data phase to 15 for uplink 7
10:07:12:setup_element:INFO:	Setting the data phase to 6 for uplink 8
10:07:12:setup_element:INFO:	Setting the data phase to 11 for uplink 9
10:07:12:setup_element:INFO:	Setting the data phase to 7 for uplink 10
10:07:12:setup_element:INFO:	Setting the data phase to 11 for uplink 11
10:07:12:setup_element:INFO:	Setting the data phase to 9 for uplink 12
10:07:12:setup_element:INFO:	Setting the data phase to 12 for uplink 13
10:07:12:setup_element:INFO:	Setting the data phase to 10 for uplink 14
10:07:12:setup_element:INFO:	Setting the data phase to 12 for uplink 15
10:07:12:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 69
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXX___
      Uplink  7: ________________________________________________________________________XXXXX___
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXXX__
      Uplink 11: ______________________________________________________________________XXXXXXXX__
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: ________________________________________________________________________XXXXXX__
      Uplink 15: ________________________________________________________________________XXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 1:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 6:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 7:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 8:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 10:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 11:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
]
10:07:12:setup_element:INFO:	Beginning SMX ASICs map scan
10:07:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:07:12:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:07:12:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:07:12:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:07:12:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:07:12:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:07:12:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:07:12:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:07:12:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:07:13:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:07:13:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:07:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:07:13:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:07:13:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:07:13:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:07:13:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:07:13:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:07:13:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:07:13:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:07:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:07:14:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:07:15:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 69
    Eye Windows:
      Uplink  0: ________________________________________________________________________XXXXXXXX
      Uplink  1: ________________________________________________________________________XXXXXXXX
      Uplink  2: _______________________________________________________________________XXXXXXX__
      Uplink  3: _______________________________________________________________________XXXXXXX__
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXX___
      Uplink  7: ________________________________________________________________________XXXXX___
      Uplink  8: _____________________________________________________________________XXXXXXXXX__
      Uplink  9: _____________________________________________________________________XXXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXXX__
      Uplink 11: ______________________________________________________________________XXXXXXXX__
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: ________________________________________________________________________XXXXXX__
      Uplink 15: ________________________________________________________________________XXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 1:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 2:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 3:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 4:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 5:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 6:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 7:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 8:
      Optimal Phase: 6
      Window Length: 35
      Eye Window: ________________________XXXXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 10:
      Optimal Phase: 7
      Window Length: 34
      Eye Window: _________________________XXXXXX_________
    Uplink 11:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 12:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 13:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____
    Uplink 14:
      Optimal Phase: 10
      Window Length: 35
      Eye Window: ____________________________XXXXX_______
    Uplink 15:
      Optimal Phase: 12
      Window Length: 35
      Eye Window: ______________________________XXXXX_____

10:07:15:setup_element:INFO:	Performing Elink synchronization
10:07:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:07:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:07:15:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:07:15:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:07:15:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
10:07:15:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:07:15:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
10:07:16:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:07:16:febtest:INFO:	1-0 | XA-000-08-002-002-008-054-02 |  31.4 | 1189.2
10:07:16:febtest:INFO:	8-1 | XA-000-08-002-002-008-055-02 |  21.9 | 1230.3
10:07:17:febtest:INFO:	3-2 | XA-000-08-002-002-008-050-02 |  21.9 | 1218.6
10:07:17:febtest:INFO:	10-3 | XA-000-08-002-002-008-060-02 |  34.6 | 1189.2
10:07:17:febtest:INFO:	5-4 | XA-000-08-002-002-008-058-02 |  40.9 | 1159.7
10:07:17:febtest:INFO:	12-5 | XA-000-08-002-002-007-236-14 |   9.3 | 1271.2
10:07:18:febtest:INFO:	7-6 | XA-000-08-002-002-008-053-02 |  21.9 | 1230.3
10:07:18:febtest:INFO:	14-7 | XA-000-08-002-002-007-234-14 |  -0.1 | 1311.9
10:07:18:ST3_smx:INFO:	Configuring SMX FAST
10:07:20:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1212.728715 mV
10:07:20:ST3_smx:INFO:		Electrons
10:07:20:ST3_smx:INFO:	# loops 0
10:07:22:ST3_smx:INFO:	# loops 1
10:07:23:ST3_smx:INFO:	# loops 2
10:07:25:ST3_smx:INFO:	# loops 3
10:07:26:ST3_smx:INFO:	# loops 4
10:07:28:ST3_smx:INFO:	Total # of broken channels: 0
10:07:28:ST3_smx:INFO:	List of broken channels: []
10:07:28:ST3_smx:INFO:	Total # of broken channels: 1
10:07:28:ST3_smx:INFO:	List of broken channels: [67]
10:07:28:ST3_smx:INFO:	Configuring SMX FAST
10:07:30:ST3_smx:INFO:	chip: 8-1 	 31.389742 C 	 1189.190035 mV
10:07:30:ST3_smx:INFO:		Electrons
10:07:30:ST3_smx:INFO:	# loops 0
10:07:32:ST3_smx:INFO:	# loops 1
10:07:34:ST3_smx:INFO:	# loops 2
10:07:36:ST3_smx:INFO:	# loops 3
10:07:37:ST3_smx:INFO:	# loops 4
10:07:39:ST3_smx:INFO:	Total # of broken channels: 0
10:07:39:ST3_smx:INFO:	List of broken channels: []
10:07:39:ST3_smx:INFO:	Total # of broken channels: 0
10:07:39:ST3_smx:INFO:	List of broken channels: []
10:07:40:ST3_smx:INFO:	Configuring SMX FAST
10:07:42:ST3_smx:INFO:	chip: 3-2 	 25.062742 C 	 1224.468235 mV
10:07:42:ST3_smx:INFO:		Electrons
10:07:42:ST3_smx:INFO:	# loops 0
10:07:43:ST3_smx:INFO:	# loops 1
10:07:45:ST3_smx:INFO:	# loops 2
10:07:47:ST3_smx:INFO:	# loops 3
10:07:49:ST3_smx:INFO:	# loops 4
10:07:50:ST3_smx:INFO:	Total # of broken channels: 0
10:07:50:ST3_smx:INFO:	List of broken channels: []
10:07:50:ST3_smx:INFO:	Total # of broken channels: 1
10:07:50:ST3_smx:INFO:	List of broken channels: [102]
10:07:51:ST3_smx:INFO:	Configuring SMX FAST
10:07:53:ST3_smx:INFO:	chip: 10-3 	 34.556970 C 	 1195.082160 mV
10:07:53:ST3_smx:INFO:		Electrons
10:07:53:ST3_smx:INFO:	# loops 0
10:07:54:ST3_smx:INFO:	# loops 1
10:07:56:ST3_smx:INFO:	# loops 2
10:07:58:ST3_smx:INFO:	# loops 3
10:07:59:ST3_smx:INFO:	# loops 4
10:08:01:ST3_smx:INFO:	Total # of broken channels: 0
10:08:01:ST3_smx:INFO:	List of broken channels: []
10:08:01:ST3_smx:INFO:	Total # of broken channels: 0
10:08:01:ST3_smx:INFO:	List of broken channels: []
10:08:01:ST3_smx:INFO:	Configuring SMX FAST
10:08:03:ST3_smx:INFO:	chip: 5-4 	 40.898880 C 	 1165.571835 mV
10:08:03:ST3_smx:INFO:		Electrons
10:08:03:ST3_smx:INFO:	# loops 0
10:08:05:ST3_smx:INFO:	# loops 1
10:08:06:ST3_smx:INFO:	# loops 2
10:08:08:ST3_smx:INFO:	# loops 3
10:08:10:ST3_smx:INFO:	# loops 4
10:08:11:ST3_smx:INFO:	Total # of broken channels: 0
10:08:11:ST3_smx:INFO:	List of broken channels: []
10:08:11:ST3_smx:INFO:	Total # of broken channels: 1
10:08:11:ST3_smx:INFO:	List of broken channels: [1]
10:08:12:ST3_smx:INFO:	Configuring SMX FAST
10:08:14:ST3_smx:INFO:	chip: 12-5 	 28.225000 C 	 1224.468235 mV
10:08:14:ST3_smx:INFO:		Electrons
10:08:14:ST3_smx:INFO:	# loops 0
10:08:15:ST3_smx:INFO:	# loops 1
10:08:17:ST3_smx:INFO:	# loops 2
10:08:18:ST3_smx:INFO:	# loops 3
10:08:20:ST3_smx:INFO:	# loops 4
10:08:22:ST3_smx:INFO:	Total # of broken channels: 0
10:08:22:ST3_smx:INFO:	List of broken channels: []
10:08:22:ST3_smx:INFO:	Total # of broken channels: 0
10:08:22:ST3_smx:INFO:	List of broken channels: []
10:08:22:ST3_smx:INFO:	Configuring SMX FAST
10:08:24:ST3_smx:INFO:	chip: 7-6 	 31.389742 C 	 1206.851500 mV
10:08:24:ST3_smx:INFO:		Electrons
10:08:24:ST3_smx:INFO:	# loops 0
10:08:26:ST3_smx:INFO:	# loops 1
10:08:27:ST3_smx:INFO:	# loops 2
10:08:29:ST3_smx:INFO:	# loops 3
10:08:30:ST3_smx:INFO:	# loops 4
10:08:32:ST3_smx:INFO:	Total # of broken channels: 0
10:08:32:ST3_smx:INFO:	List of broken channels: []
10:08:32:ST3_smx:INFO:	Total # of broken channels: 1
10:08:32:ST3_smx:INFO:	List of broken channels: [49]
10:08:32:ST3_smx:INFO:	Configuring SMX FAST
10:08:34:ST3_smx:INFO:	chip: 14-7 	 15.590880 C 	 1259.567515 mV
10:08:34:ST3_smx:INFO:		Electrons
10:08:34:ST3_smx:INFO:	# loops 0
10:08:36:ST3_smx:INFO:	# loops 1
10:08:37:ST3_smx:INFO:	# loops 2
10:08:39:ST3_smx:INFO:	# loops 3
10:08:41:ST3_smx:INFO:	# loops 4
10:08:42:ST3_smx:INFO:	Total # of broken channels: 0
10:08:42:ST3_smx:INFO:	List of broken channels: []
10:08:42:ST3_smx:INFO:	Total # of broken channels: 0
10:08:42:ST3_smx:INFO:	List of broken channels: []
10:08:43:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
10:08:43:febtest:INFO:	1-0 | XA-000-08-002-002-008-054-02 |  28.2 | 1212.7
10:08:43:febtest:INFO:	8-1 | XA-000-08-002-002-008-055-02 |  34.6 | 1189.2
10:08:44:febtest:INFO:	3-2 | XA-000-08-002-002-008-050-02 |  25.1 | 1224.5
10:08:44:febtest:INFO:	10-3 | XA-000-08-002-002-008-060-02 |  34.6 | 1195.1
10:08:44:febtest:INFO:	5-4 | XA-000-08-002-002-008-058-02 |  40.9 | 1171.5
10:08:44:febtest:INFO:	12-5 | XA-000-08-002-002-007-236-14 |  28.2 | 1224.5
10:08:45:febtest:INFO:	7-6 | XA-000-08-002-002-008-053-02 |  34.6 | 1206.9
10:08:45:febtest:INFO:	14-7 | XA-000-08-002-002-007-234-14 |  15.6 | 1259.6
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_15-10_06_39
OPERATOR  : Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L6DL200120 M6DL2B1001201B2 42 A

FEB_SN : 1079
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	
MODULE_NAME:	L6DL200120 M6DL2B1001201B2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L6DL200120
MODULE_MODULE:	M6DL2B1001201B2
MODULE_SIZE:	42
MODULE_GRADE:	A
---------------------------------------
VI_before_Init : ['2.450', '1.7880', '1.851', '0.5311', '7.000', '1.5460', '7.000', '1.5460']
VI_after__Init : ['2.450', '1.9940', '1.850', '0.6054', '7.000', '1.5470', '7.000', '1.5470']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
11:17:58:ST3_Shared:INFO:	Listo of operators:Alois Alzheimer
11:17:58:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
11:18:55:febtest:INFO:	FEB 8-2 selected
11:18:55:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
11:18:57:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:18:57:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
11:18:57:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:18:57:febtest:INFO:	Testing FEB with SN 2061
11:18:59:smx_tester:INFO:	Scanning setup
11:18:59:elinks:INFO:	Disabling clock on downlink 0
11:18:59:elinks:INFO:	Disabling clock on downlink 1
11:18:59:elinks:INFO:	Disabling clock on downlink 2
11:18:59:elinks:INFO:	Disabling clock on downlink 3
11:18:59:elinks:INFO:	Disabling clock on downlink 4
11:18:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:18:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:18:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:18:59:elinks:INFO:	Disabling clock on downlink 0
11:18:59:elinks:INFO:	Disabling clock on downlink 1
11:18:59:elinks:INFO:	Disabling clock on downlink 2
11:18:59:elinks:INFO:	Disabling clock on downlink 3
11:18:59:elinks:INFO:	Disabling clock on downlink 4
11:18:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:18:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:18:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:18:59:elinks:INFO:	Disabling clock on downlink 0
11:18:59:elinks:INFO:	Disabling clock on downlink 1
11:18:59:elinks:INFO:	Disabling clock on downlink 2
11:18:59:elinks:INFO:	Disabling clock on downlink 3
11:18:59:elinks:INFO:	Disabling clock on downlink 4
11:18:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:18:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
11:18:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
11:18:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:18:59:elinks:INFO:	Disabling clock on downlink 0
11:18:59:elinks:INFO:	Disabling clock on downlink 1
11:18:59:elinks:INFO:	Disabling clock on downlink 2
11:18:59:elinks:INFO:	Disabling clock on downlink 3
11:18:59:elinks:INFO:	Disabling clock on downlink 4
11:18:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:18:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:18:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:18:59:elinks:INFO:	Disabling clock on downlink 0
11:18:59:elinks:INFO:	Disabling clock on downlink 1
11:18:59:elinks:INFO:	Disabling clock on downlink 2
11:18:59:elinks:INFO:	Disabling clock on downlink 3
11:18:59:elinks:INFO:	Disabling clock on downlink 4
11:18:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:18:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:19:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:19:00:setup_element:INFO:	Scanning clock phase
11:19:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:19:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:19:00:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
11:19:00:setup_element:INFO:	Eye window for uplink 16: X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:19:00:setup_element:INFO:	Eye window for uplink 17: X________________________________________________________________________XXXXXXX
Clock Delay: 36
11:19:00:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
11:19:00:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
11:19:00:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:19:00:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:19:00:setup_element:INFO:	Eye window for uplink 22: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:19:00:setup_element:INFO:	Eye window for uplink 23: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:19:00:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:19:00:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
11:19:00:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:19:00:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
11:19:00:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
11:19:00:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
11:19:00:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:19:00:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:19:00:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
11:19:00:setup_element:INFO:	Scanning data phases
11:19:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:19:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:19:06:setup_element:INFO:	Data phase scan results for group 0, downlink 2
11:19:06:setup_element:INFO:	Eye window for uplink 16: XXXXXX________________________________XX
Data delay found: 21
11:19:06:setup_element:INFO:	Eye window for uplink 17: XX_________________________________XXXXX
Data delay found: 18
11:19:06:setup_element:INFO:	Eye window for uplink 18: XXXX_________________________________XXX
Data delay found: 20
11:19:06:setup_element:INFO:	Eye window for uplink 19: X_________________________________XXXXXX
Data delay found: 17
11:19:06:setup_element:INFO:	Eye window for uplink 20: _________________________________XXXXX__
Data delay found: 15
11:19:06:setup_element:INFO:	Eye window for uplink 21: ________________________________XXXXXX__
Data delay found: 14
11:19:06:setup_element:INFO:	Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
11:19:06:setup_element:INFO:	Eye window for uplink 23: __________________________________XXXXX_
Data delay found: 16
11:19:06:setup_element:INFO:	Eye window for uplink 24: ____XXXX________________________________
Data delay found: 25
11:19:06:setup_element:INFO:	Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
11:19:06:setup_element:INFO:	Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
11:19:06:setup_element:INFO:	Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
11:19:06:setup_element:INFO:	Eye window for uplink 28: __________XXXXX_________________________
Data delay found: 32
11:19:06:setup_element:INFO:	Eye window for uplink 29: ___________XXXXX________________________
Data delay found: 33
11:19:06:setup_element:INFO:	Eye window for uplink 30: ____________XXXXXXX_____________________
Data delay found: 35
11:19:06:setup_element:INFO:	Eye window for uplink 31: ___________XXXXXX_______________________
Data delay found: 33
11:19:06:setup_element:INFO:	Setting the data phase to 21 for uplink 16
11:19:06:setup_element:INFO:	Setting the data phase to 18 for uplink 17
11:19:06:setup_element:INFO:	Setting the data phase to 20 for uplink 18
11:19:06:setup_element:INFO:	Setting the data phase to 17 for uplink 19
11:19:06:setup_element:INFO:	Setting the data phase to 15 for uplink 20
11:19:06:setup_element:INFO:	Setting the data phase to 14 for uplink 21
11:19:06:setup_element:INFO:	Setting the data phase to 18 for uplink 22
11:19:06:setup_element:INFO:	Setting the data phase to 16 for uplink 23
11:19:06:setup_element:INFO:	Setting the data phase to 25 for uplink 24
11:19:06:setup_element:INFO:	Setting the data phase to 29 for uplink 25
11:19:06:setup_element:INFO:	Setting the data phase to 27 for uplink 26
11:19:06:setup_element:INFO:	Setting the data phase to 31 for uplink 27
11:19:06:setup_element:INFO:	Setting the data phase to 32 for uplink 28
11:19:06:setup_element:INFO:	Setting the data phase to 33 for uplink 29
11:19:06:setup_element:INFO:	Setting the data phase to 35 for uplink 30
11:19:06:setup_element:INFO:	Setting the data phase to 33 for uplink 31
11:19:06:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 68
    Eye Windows:
      Uplink 16: X________________________________________________________________________XXXXXXX
      Uplink 17: X________________________________________________________________________XXXXXXX
      Uplink 18: ________________________________________________________________________________
      Uplink 19: ________________________________________________________________________________
      Uplink 20: ______________________________________________________________________XXXXXXXX__
      Uplink 21: ______________________________________________________________________XXXXXXXX__
      Uplink 22: _______________________________________________________________________XXXXXXXX_
      Uplink 23: _______________________________________________________________________XXXXXXXX_
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: ________________________________________________________________________________
      Uplink 29: ________________________________________________________________________________
      Uplink 30: ________________________________________________________________________XXXXXXX_
      Uplink 31: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 21
      Window Length: 32
      Eye Window: XXXXXX________________________________XX
    Uplink 17:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 18:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 19:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 20:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 21:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 22:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 23:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 24:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 26:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 28:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 33
      Eye Window: ____________XXXXXXX_____________________
    Uplink 31:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
]
11:19:06:setup_element:INFO:	Beginning SMX ASICs map scan
11:19:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:19:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:19:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:19:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:19:06:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:19:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:19:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:19:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:19:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:19:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:19:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:19:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:19:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:19:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:19:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:19:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:19:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:19:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:19:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:19:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:19:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:19:08:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 68
    Eye Windows:
      Uplink 16: X________________________________________________________________________XXXXXXX
      Uplink 17: X________________________________________________________________________XXXXXXX
      Uplink 18: ________________________________________________________________________________
      Uplink 19: ________________________________________________________________________________
      Uplink 20: ______________________________________________________________________XXXXXXXX__
      Uplink 21: ______________________________________________________________________XXXXXXXX__
      Uplink 22: _______________________________________________________________________XXXXXXXX_
      Uplink 23: _______________________________________________________________________XXXXXXXX_
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: ________________________________________________________________________________
      Uplink 29: ________________________________________________________________________________
      Uplink 30: ________________________________________________________________________XXXXXXX_
      Uplink 31: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 21
      Window Length: 32
      Eye Window: XXXXXX________________________________XX
    Uplink 17:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 18:
      Optimal Phase: 20
      Window Length: 33
      Eye Window: XXXX_________________________________XXX
    Uplink 19:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 20:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 21:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 22:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 23:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 24:
      Optimal Phase: 25
      Window Length: 36
      Eye Window: ____XXXX________________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 26:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 27:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 28:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 33
      Eye Window: ____________XXXXXXX_____________________
    Uplink 31:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________

11:19:08:setup_element:INFO:	Performing Elink synchronization
11:19:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:19:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:19:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:19:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:19:08:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
11:19:08:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:19:09:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
11:19:09:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:19:10:febtest:INFO:	23-0 | XA-000-08-002-000-001-090-01 |  56.8 | 1124.0
11:19:10:febtest:INFO:	30-1 | XA-000-08-002-000-001-113-15 |  40.9 | 1195.1
11:19:10:febtest:INFO:	21-2 | XA-000-08-002-000-001-084-01 |  63.2 | 1100.2
11:19:10:febtest:INFO:	28-3 | XA-000-08-002-000-001-087-01 |  50.4 | 1147.8
11:19:10:febtest:INFO:	19-4 | XA-000-08-002-000-001-110-08 |  60.0 | 1118.1
11:19:11:febtest:INFO:	26-5 | XA-000-08-002-000-001-085-01 |  37.7 | 1183.3
11:19:11:febtest:INFO:	17-6 | XA-000-08-002-000-005-182-06 |  31.4 | 1201.0
11:19:11:febtest:INFO:	24-7 | XA-000-08-002-000-001-089-01 |  31.4 | 1206.9
11:19:11:ST3_smx:INFO:	Configuring SMX FAST
11:19:13:ST3_smx:INFO:	chip: 23-0 	 56.797143 C 	 1129.995435 mV
11:19:13:ST3_smx:INFO:		Electrons
11:19:13:ST3_smx:INFO:	# loops 0
11:19:15:ST3_smx:INFO:	# loops 1
11:19:17:ST3_smx:INFO:	# loops 2
11:19:18:ST3_smx:INFO:	# loops 3
11:19:20:ST3_smx:INFO:	# loops 4
11:19:22:ST3_smx:INFO:	Total # of broken channels: 0
11:19:22:ST3_smx:INFO:	List of broken channels: []
11:19:22:ST3_smx:INFO:	Total # of broken channels: 0
11:19:22:ST3_smx:INFO:	List of broken channels: []
11:19:22:ST3_smx:INFO:	Configuring SMX FAST
11:19:24:ST3_smx:INFO:	chip: 30-1 	 50.430383 C 	 1159.654860 mV
11:19:24:ST3_smx:INFO:		Electrons
11:19:24:ST3_smx:INFO:	# loops 0
11:19:26:ST3_smx:INFO:	# loops 1
11:19:28:ST3_smx:INFO:	# loops 2
11:19:29:ST3_smx:INFO:	# loops 3
11:19:31:ST3_smx:INFO:	# loops 4
11:19:33:ST3_smx:INFO:	Total # of broken channels: 0
11:19:33:ST3_smx:INFO:	List of broken channels: []
11:19:33:ST3_smx:INFO:	Total # of broken channels: 0
11:19:33:ST3_smx:INFO:	List of broken channels: []
11:19:33:ST3_smx:INFO:	Configuring SMX FAST
11:19:35:ST3_smx:INFO:	chip: 21-2 	 59.984250 C 	 1124.048640 mV
11:19:35:ST3_smx:INFO:		Electrons
11:19:35:ST3_smx:INFO:	# loops 0
11:19:37:ST3_smx:INFO:	# loops 1
11:19:39:ST3_smx:INFO:	# loops 2
11:19:40:ST3_smx:INFO:	# loops 3
11:19:42:ST3_smx:INFO:	# loops 4
11:19:44:ST3_smx:INFO:	Total # of broken channels: 0
11:19:44:ST3_smx:INFO:	List of broken channels: []
11:19:44:ST3_smx:INFO:	Total # of broken channels: 0
11:19:44:ST3_smx:INFO:	List of broken channels: []
11:19:44:ST3_smx:INFO:	Configuring SMX FAST
11:19:46:ST3_smx:INFO:	chip: 28-3 	 53.612520 C 	 1153.732915 mV
11:19:46:ST3_smx:INFO:		Electrons
11:19:46:ST3_smx:INFO:	# loops 0
11:19:48:ST3_smx:INFO:	# loops 1
11:19:50:ST3_smx:INFO:	# loops 2
11:19:51:ST3_smx:INFO:	# loops 3
11:19:53:ST3_smx:INFO:	# loops 4
11:19:54:ST3_smx:INFO:	Total # of broken channels: 0
11:19:54:ST3_smx:INFO:	List of broken channels: []
11:19:54:ST3_smx:INFO:	Total # of broken channels: 0
11:19:54:ST3_smx:INFO:	List of broken channels: []
11:19:55:ST3_smx:INFO:	Configuring SMX FAST
11:19:57:ST3_smx:INFO:	chip: 19-4 	 56.797143 C 	 1129.995435 mV
11:19:57:ST3_smx:INFO:		Electrons
11:19:57:ST3_smx:INFO:	# loops 0
11:19:59:ST3_smx:INFO:	# loops 1
11:20:00:ST3_smx:INFO:	# loops 2
11:20:02:ST3_smx:INFO:	# loops 3
11:20:04:ST3_smx:INFO:	# loops 4
11:20:05:ST3_smx:INFO:	Total # of broken channels: 0
11:20:05:ST3_smx:INFO:	List of broken channels: []
11:20:05:ST3_smx:INFO:	Total # of broken channels: 0
11:20:05:ST3_smx:INFO:	List of broken channels: []
11:20:06:ST3_smx:INFO:	Configuring SMX FAST
11:20:08:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1177.390875 mV
11:20:08:ST3_smx:INFO:		Electrons
11:20:08:ST3_smx:INFO:	# loops 0
11:20:09:ST3_smx:INFO:	# loops 1
11:20:11:ST3_smx:INFO:	# loops 2
11:20:13:ST3_smx:INFO:	# loops 3
11:20:14:ST3_smx:INFO:	# loops 4
11:20:16:ST3_smx:INFO:	Total # of broken channels: 0
11:20:16:ST3_smx:INFO:	List of broken channels: []
11:20:16:ST3_smx:INFO:	Total # of broken channels: 0
11:20:16:ST3_smx:INFO:	List of broken channels: []
11:20:16:ST3_smx:INFO:	Configuring SMX FAST
11:20:18:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1189.190035 mV
11:20:18:ST3_smx:INFO:		Electrons
11:20:18:ST3_smx:INFO:	# loops 0
11:20:20:ST3_smx:INFO:	# loops 1
11:20:22:ST3_smx:INFO:	# loops 2
11:20:23:ST3_smx:INFO:	# loops 3
11:20:25:ST3_smx:INFO:	# loops 4
11:20:27:ST3_smx:INFO:	Total # of broken channels: 0
11:20:27:ST3_smx:INFO:	List of broken channels: []
11:20:27:ST3_smx:INFO:	Total # of broken channels: 0
11:20:27:ST3_smx:INFO:	List of broken channels: []
11:20:27:ST3_smx:INFO:	Configuring SMX FAST
11:20:29:ST3_smx:INFO:	chip: 24-7 	 44.073563 C 	 1165.571835 mV
11:20:29:ST3_smx:INFO:		Electrons
11:20:29:ST3_smx:INFO:	# loops 0
11:20:31:ST3_smx:INFO:	# loops 1
11:20:32:ST3_smx:INFO:	# loops 2
11:20:34:ST3_smx:INFO:	# loops 3
11:20:36:ST3_smx:INFO:	# loops 4
11:20:37:ST3_smx:INFO:	Total # of broken channels: 0
11:20:37:ST3_smx:INFO:	List of broken channels: []
11:20:37:ST3_smx:INFO:	Total # of broken channels: 0
11:20:37:ST3_smx:INFO:	List of broken channels: []
11:20:38:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
11:20:38:febtest:INFO:	23-0 | XA-000-08-002-000-001-090-01 |  60.0 | 1130.0
11:20:38:febtest:INFO:	30-1 | XA-000-08-002-000-001-113-15 |  53.6 | 1159.7
11:20:39:febtest:INFO:	21-2 | XA-000-08-002-000-001-084-01 |  63.2 | 1124.0
11:20:39:febtest:INFO:	28-3 | XA-000-08-002-000-001-087-01 |  53.6 | 1153.7
11:20:39:febtest:INFO:	19-4 | XA-000-08-002-000-001-110-08 |  56.8 | 1130.0
11:20:39:febtest:INFO:	26-5 | XA-000-08-002-000-001-085-01 |  44.1 | 1171.5
11:20:40:febtest:INFO:	17-6 | XA-000-08-002-000-005-182-06 |  37.7 | 1195.1
11:20:40:febtest:INFO:	24-7 | XA-000-08-002-000-001-089-01 |  44.1 | 1165.6
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_15-11_18_57
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L6DL200120 M6DL2B1001201B2 42 A

FEB_SN : 2061
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.5070', '1.846', '2.1490', '7.000', '1.5440', '7.000', '1.5440']
VI_after__Init : ['2.450', '1.9940', '1.850', '0.6054', '7.000', '1.5470', '7.000', '1.5470']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
11:20:43:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2061/TestDate_2024_01_15-11_18_57/