13:13:16:ST3_hmp4040:INFO:	ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
13:13:21:febtest:INFO:	FEB 8-2 selected
13:13:21:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:13:21:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
13:13:34:febtest:INFO:	FEB 8-2 selected
13:13:34:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:13:34:ST3_emu:ERROR:	device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!13:14:23:febtest:INFO:	FEB 8-2 selected
13:14:23:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
13:14:32:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:14:32:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
13:14:32:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:14:33:febtest:INFO:	Testing FEB with SN 2062
13:14:34:smx_tester:INFO:	Scanning setup
13:14:34:elinks:INFO:	Disabling clock on downlink 0
13:14:34:elinks:INFO:	Disabling clock on downlink 1
13:14:34:elinks:INFO:	Disabling clock on downlink 2
13:14:34:elinks:INFO:	Disabling clock on downlink 3
13:14:34:elinks:INFO:	Disabling clock on downlink 4
13:14:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:14:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:14:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:14:35:elinks:INFO:	Disabling clock on downlink 0
13:14:35:elinks:INFO:	Disabling clock on downlink 1
13:14:35:elinks:INFO:	Disabling clock on downlink 2
13:14:35:elinks:INFO:	Disabling clock on downlink 3
13:14:35:elinks:INFO:	Disabling clock on downlink 4
13:14:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:14:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:14:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:14:35:elinks:INFO:	Disabling clock on downlink 0
13:14:35:elinks:INFO:	Disabling clock on downlink 1
13:14:35:elinks:INFO:	Disabling clock on downlink 2
13:14:35:elinks:INFO:	Disabling clock on downlink 3
13:14:35:elinks:INFO:	Disabling clock on downlink 4
13:14:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:14:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:14:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:14:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:14:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:14:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:14:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:14:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:14:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:14:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:14:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:14:35:elinks:INFO:	Disabling clock on downlink 0
13:14:35:elinks:INFO:	Disabling clock on downlink 1
13:14:35:elinks:INFO:	Disabling clock on downlink 2
13:14:35:elinks:INFO:	Disabling clock on downlink 3
13:14:35:elinks:INFO:	Disabling clock on downlink 4
13:14:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:14:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:14:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:14:35:elinks:INFO:	Disabling clock on downlink 0
13:14:35:elinks:INFO:	Disabling clock on downlink 1
13:14:35:elinks:INFO:	Disabling clock on downlink 2
13:14:35:elinks:INFO:	Disabling clock on downlink 3
13:14:35:elinks:INFO:	Disabling clock on downlink 4
13:14:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:14:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:14:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:14:35:setup_element:INFO:	Scanning clock phase
13:14:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:14:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:14:36:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:14:36:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:14:36:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:14:36:setup_element:INFO:	Eye window for uplink 26: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:14:36:setup_element:INFO:	Eye window for uplink 27: ____________________________________________________________________XXXXXXXX____
Clock Delay: 31
13:14:36:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:14:36:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:14:36:setup_element:INFO:	Eye window for uplink 30: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:14:36:setup_element:INFO:	Eye window for uplink 31: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:14:36:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
13:14:36:setup_element:INFO:	Scanning data phases
13:14:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:14:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:14:41:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:14:41:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
13:14:41:setup_element:INFO:	Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
13:14:41:setup_element:INFO:	Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
13:14:41:setup_element:INFO:	Eye window for uplink 27: __________XXXXX_________________________
Data delay found: 32
13:14:41:setup_element:INFO:	Eye window for uplink 28: _________XXXXX__________________________
Data delay found: 31
13:14:41:setup_element:INFO:	Eye window for uplink 29: __________XXXXXX________________________
Data delay found: 32
13:14:41:setup_element:INFO:	Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
13:14:41:setup_element:INFO:	Eye window for uplink 31: ______________XXXX______________________
Data delay found: 35
13:14:41:setup_element:INFO:	Setting the data phase to 28 for uplink 24
13:14:41:setup_element:INFO:	Setting the data phase to 31 for uplink 25
13:14:41:setup_element:INFO:	Setting the data phase to 28 for uplink 26
13:14:41:setup_element:INFO:	Setting the data phase to 32 for uplink 27
13:14:41:setup_element:INFO:	Setting the data phase to 31 for uplink 28
13:14:41:setup_element:INFO:	Setting the data phase to 32 for uplink 29
13:14:41:setup_element:INFO:	Setting the data phase to 37 for uplink 30
13:14:41:setup_element:INFO:	Setting the data phase to 35 for uplink 31
13:14:41:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXXX__
      Uplink 25: _____________________________________________________________________XXXXXXXXX__
      Uplink 26: ____________________________________________________________________XXXXXXXX____
      Uplink 27: ____________________________________________________________________XXXXXXXX____
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: ______________________________________________________________________XXXXXXX___
      Uplink 31: ______________________________________________________________________XXXXXXX___
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 29:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________
]
13:14:41:setup_element:INFO:	Beginning SMX ASICs map scan
13:14:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:14:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:14:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:14:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:14:41:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:14:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:14:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:14:42:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:14:42:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:14:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:14:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:14:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:14:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:14:44:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 32
    Window Length: 70
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXXX__
      Uplink 25: _____________________________________________________________________XXXXXXXXX__
      Uplink 26: ____________________________________________________________________XXXXXXXX____
      Uplink 27: ____________________________________________________________________XXXXXXXX____
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: ______________________________________________________________________XXXXXXX___
      Uplink 31: ______________________________________________________________________XXXXXXX___
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 26:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 29:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 36
      Eye Window: ______________XXXX______________________

13:14:44:setup_element:INFO:	Performing Elink synchronization
13:14:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:14:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:14:44:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:14:44:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:14:44:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:14:44:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:14:44:ST3_emu:INFO:	Number of chips: 4
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
13:14:45:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:14:45:febtest:INFO:	30-1 | XA-000-08-002-000-000-123-02 |  47.3 | 1153.7
13:14:46:febtest:INFO:	28-3 | XA-000-08-002-000-000-120-02 |  53.6 | 1141.9
13:14:46:febtest:INFO:	26-5 | XA-000-08-002-000-000-119-02 |  47.3 | 1153.7
13:14:46:febtest:INFO:	24-7 | XA-000-08-002-000-004-192-07 |  21.9 | 1236.2
13:14:46:ST3_smx:INFO:	Configuring SMX FAST
13:14:48:ST3_smx:INFO:	chip: 28-3 	 44.073563 C 	 1177.390875 mV
13:14:48:ST3_smx:INFO:		Electrons
13:14:48:ST3_smx:INFO:	# loops 0
13:14:50:ST3_smx:INFO:	# loops 1
13:14:51:ST3_smx:INFO:	# loops 2
13:14:53:ST3_smx:INFO:	# loops 3
13:14:54:ST3_smx:INFO:	# loops 4
13:14:56:ST3_smx:INFO:	Total # of broken channels: 0
13:14:56:ST3_smx:INFO:	List of broken channels: []
13:14:56:ST3_smx:INFO:	Total # of broken channels: 0
13:14:56:ST3_smx:INFO:	List of broken channels: []
13:14:57:ST3_smx:INFO:	Configuring SMX FAST
13:14:59:ST3_smx:INFO:	chip: 24-7 	 28.225000 C 	 1206.851500 mV
13:14:59:ST3_smx:INFO:		Electrons
13:14:59:ST3_smx:INFO:	# loops 0
13:15:01:ST3_smx:INFO:	# loops 1
13:15:02:ST3_smx:INFO:	# loops 2
13:15:04:ST3_smx:INFO:	# loops 3
13:15:05:ST3_smx:INFO:	# loops 4
13:15:07:ST3_smx:INFO:	Total # of broken channels: 0
13:15:07:ST3_smx:INFO:	List of broken channels: []
13:15:07:ST3_smx:INFO:	Total # of broken channels: 0
13:15:07:ST3_smx:INFO:	List of broken channels: []
13:15:08:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:15:08:febtest:INFO:	30-1 | XA-000-08-002-000-000-123-02 |  47.3 | 1147.8
13:15:08:febtest:INFO:	28-3 | XA-000-08-002-000-000-120-02 |  44.1 | 1177.4
13:15:09:febtest:INFO:	26-5 | XA-000-08-002-000-000-119-02 |  47.3 | 1147.8
13:15:09:febtest:INFO:	24-7 | XA-000-08-002-000-004-192-07 |  28.2 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_30-13_14_32
OPERATOR  : Alois Alzheimer
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 2062
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.7949', '1.850', '0.9076', '0.000', '0.0000', '7.000', '1.5720']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:15:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:15:17:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
13:15:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:15:18:febtest:INFO:	Testing FEB with SN 2062
13:15:19:smx_tester:INFO:	Scanning setup
13:15:19:elinks:INFO:	Disabling clock on downlink 0
13:15:19:elinks:INFO:	Disabling clock on downlink 1
13:15:19:elinks:INFO:	Disabling clock on downlink 2
13:15:19:elinks:INFO:	Disabling clock on downlink 3
13:15:19:elinks:INFO:	Disabling clock on downlink 4
13:15:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:15:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:15:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:15:20:elinks:INFO:	Disabling clock on downlink 0
13:15:20:elinks:INFO:	Disabling clock on downlink 1
13:15:20:elinks:INFO:	Disabling clock on downlink 2
13:15:20:elinks:INFO:	Disabling clock on downlink 3
13:15:20:elinks:INFO:	Disabling clock on downlink 4
13:15:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:15:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:15:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:15:20:elinks:INFO:	Disabling clock on downlink 0
13:15:20:elinks:INFO:	Disabling clock on downlink 1
13:15:20:elinks:INFO:	Disabling clock on downlink 2
13:15:20:elinks:INFO:	Disabling clock on downlink 3
13:15:20:elinks:INFO:	Disabling clock on downlink 4
13:15:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:15:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:15:20:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:15:20:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:15:20:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:15:20:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:15:20:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:15:20:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:15:20:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:15:20:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:15:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:15:20:elinks:INFO:	Disabling clock on downlink 0
13:15:20:elinks:INFO:	Disabling clock on downlink 1
13:15:20:elinks:INFO:	Disabling clock on downlink 2
13:15:20:elinks:INFO:	Disabling clock on downlink 3
13:15:20:elinks:INFO:	Disabling clock on downlink 4
13:15:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:15:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:15:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:15:20:elinks:INFO:	Disabling clock on downlink 0
13:15:20:elinks:INFO:	Disabling clock on downlink 1
13:15:20:elinks:INFO:	Disabling clock on downlink 2
13:15:20:elinks:INFO:	Disabling clock on downlink 3
13:15:20:elinks:INFO:	Disabling clock on downlink 4
13:15:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:15:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:15:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:15:20:setup_element:INFO:	Scanning clock phase
13:15:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:15:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:15:21:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:15:21:setup_element:INFO:	Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:15:21:setup_element:INFO:	Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:15:21:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:15:21:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:15:21:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:15:21:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:15:21:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:15:21:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:15:21:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
13:15:21:setup_element:INFO:	Scanning data phases
13:15:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:15:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:15:26:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:15:26:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
13:15:26:setup_element:INFO:	Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
13:15:26:setup_element:INFO:	Eye window for uplink 26: _____XXXX_______________________________
Data delay found: 26
13:15:26:setup_element:INFO:	Eye window for uplink 27: _______XXXXXX___________________________
Data delay found: 29
13:15:26:setup_element:INFO:	Eye window for uplink 28: _______XXXXXXX__________________________
Data delay found: 30
13:15:26:setup_element:INFO:	Eye window for uplink 29: _________XXXXXXX________________________
Data delay found: 32
13:15:26:setup_element:INFO:	Eye window for uplink 30: _____________X_XXXX_____________________
Data delay found: 35
13:15:26:setup_element:INFO:	Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
13:15:26:setup_element:INFO:	Setting the data phase to 28 for uplink 24
13:15:26:setup_element:INFO:	Setting the data phase to 31 for uplink 25
13:15:26:setup_element:INFO:	Setting the data phase to 26 for uplink 26
13:15:26:setup_element:INFO:	Setting the data phase to 29 for uplink 27
13:15:26:setup_element:INFO:	Setting the data phase to 30 for uplink 28
13:15:26:setup_element:INFO:	Setting the data phase to 32 for uplink 29
13:15:26:setup_element:INFO:	Setting the data phase to 35 for uplink 30
13:15:26:setup_element:INFO:	Setting the data phase to 35 for uplink 31
13:15:26:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 71
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: _____________________________________________________________________XXXXXXX____
      Uplink 27: _____________________________________________________________________XXXXXXX____
      Uplink 28: _____________________________________________________________________XXXXXXX____
      Uplink 29: _____________________________________________________________________XXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXXXXX__
      Uplink 31: _____________________________________________________________________XXXXXXXXX__
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 26:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 27:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 28:
      Optimal Phase: 30
      Window Length: 33
      Eye Window: _______XXXXXXX__________________________
    Uplink 29:
      Optimal Phase: 32
      Window Length: 33
      Eye Window: _________XXXXXXX________________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________X_XXXX_____________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
]
13:15:26:setup_element:INFO:	Beginning SMX ASICs map scan
13:15:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:15:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:15:26:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:15:26:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:15:26:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:15:26:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:15:26:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:15:27:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:15:27:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:15:27:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:15:27:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:15:27:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:15:27:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:15:29:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 71
    Eye Windows:
      Uplink 24: _____________________________________________________________________XXXXXXXX___
      Uplink 25: _____________________________________________________________________XXXXXXXX___
      Uplink 26: _____________________________________________________________________XXXXXXX____
      Uplink 27: _____________________________________________________________________XXXXXXX____
      Uplink 28: _____________________________________________________________________XXXXXXX____
      Uplink 29: _____________________________________________________________________XXXXXXX____
      Uplink 30: _____________________________________________________________________XXXXXXXXX__
      Uplink 31: _____________________________________________________________________XXXXXXXXX__
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 26:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 27:
      Optimal Phase: 29
      Window Length: 34
      Eye Window: _______XXXXXX___________________________
    Uplink 28:
      Optimal Phase: 30
      Window Length: 33
      Eye Window: _______XXXXXXX__________________________
    Uplink 29:
      Optimal Phase: 32
      Window Length: 33
      Eye Window: _________XXXXXXX________________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________X_XXXX_____________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________

13:15:29:setup_element:INFO:	Performing Elink synchronization
13:15:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:15:29:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:15:29:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:15:29:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:15:29:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:15:29:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:15:29:ST3_emu:INFO:	Number of chips: 4
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
13:15:30:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:15:30:febtest:INFO:	30-1 | XA-000-08-002-000-000-123-02 |  50.4 | 1147.8
13:15:30:febtest:INFO:	28-3 | XA-000-08-002-000-000-120-02 |  53.6 | 1141.9
13:15:31:febtest:INFO:	26-5 | XA-000-08-002-000-000-119-02 |  47.3 | 1159.7
13:15:31:febtest:INFO:	24-7 | XA-000-08-002-000-004-192-07 |  21.9 | 1236.2
13:15:31:ST3_smx:INFO:	Configuring SMX FAST
13:15:33:ST3_smx:INFO:	chip: 30-1 	 53.612520 C 	 1135.937260 mV
13:15:33:ST3_smx:INFO:		Electrons
13:15:33:ST3_smx:INFO:	# loops 0
13:15:34:ST3_smx:INFO:	# loops 1
13:15:36:ST3_smx:INFO:	# loops 2
13:15:37:ST3_smx:INFO:	# loops 3
13:15:39:ST3_smx:INFO:	# loops 4
13:15:41:ST3_smx:INFO:	Total # of broken channels: 0
13:15:41:ST3_smx:INFO:	List of broken channels: []
13:15:41:ST3_smx:INFO:	Total # of broken channels: 0
13:15:41:ST3_smx:INFO:	List of broken channels: []
13:15:41:ST3_smx:INFO:	Configuring SMX FAST
13:15:43:ST3_smx:INFO:	chip: 28-3 	 44.073563 C 	 1171.483840 mV
13:15:43:ST3_smx:INFO:		Electrons
13:15:43:ST3_smx:INFO:	# loops 0
13:15:45:ST3_smx:INFO:	# loops 1
13:15:47:ST3_smx:INFO:	# loops 2
13:15:48:ST3_smx:INFO:	# loops 3
13:15:50:ST3_smx:INFO:	# loops 4
13:15:51:ST3_smx:INFO:	Total # of broken channels: 0
13:15:51:ST3_smx:INFO:	List of broken channels: []
13:15:51:ST3_smx:INFO:	Total # of broken channels: 0
13:15:51:ST3_smx:INFO:	List of broken channels: []
13:15:52:ST3_smx:INFO:	Configuring SMX FAST
13:15:54:ST3_smx:INFO:	chip: 26-5 	 56.797143 C 	 1129.995435 mV
13:15:54:ST3_smx:INFO:		Electrons
13:15:54:ST3_smx:INFO:	# loops 0
13:15:56:ST3_smx:INFO:	# loops 1
13:15:57:ST3_smx:INFO:	# loops 2
13:15:59:ST3_smx:INFO:	# loops 3
13:16:00:ST3_smx:INFO:	# loops 4
13:16:02:ST3_smx:INFO:	Total # of broken channels: 0
13:16:02:ST3_smx:INFO:	List of broken channels: []
13:16:02:ST3_smx:INFO:	Total # of broken channels: 0
13:16:02:ST3_smx:INFO:	List of broken channels: []
13:16:03:ST3_smx:INFO:	Configuring SMX FAST
13:16:05:ST3_smx:INFO:	chip: 24-7 	 28.225000 C 	 1206.851500 mV
13:16:05:ST3_smx:INFO:		Electrons
13:16:05:ST3_smx:INFO:	# loops 0
13:16:07:ST3_smx:INFO:	# loops 1
13:16:08:ST3_smx:INFO:	# loops 2
13:16:10:ST3_smx:INFO:	# loops 3
13:16:11:ST3_smx:INFO:	# loops 4
13:16:13:ST3_smx:INFO:	Total # of broken channels: 0
13:16:13:ST3_smx:INFO:	List of broken channels: []
13:16:13:ST3_smx:INFO:	Total # of broken channels: 0
13:16:13:ST3_smx:INFO:	List of broken channels: []
13:16:14:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
13:16:14:febtest:INFO:	30-1 | XA-000-08-002-000-000-123-02 |  53.6 | 1135.9
13:16:14:febtest:INFO:	28-3 | XA-000-08-002-000-000-120-02 |  44.1 | 1177.4
13:16:15:febtest:INFO:	26-5 | XA-000-08-002-000-000-119-02 |  56.8 | 1130.0
13:16:15:febtest:INFO:	24-7 | XA-000-08-002-000-004-192-07 |  28.2 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_30-13_15_17
OPERATOR  : Alois Alzheimer
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 2062
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.9709', '1.850', '0.8977', '0.000', '0.0000', '7.001', '1.5760']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
13:16:17:ST3_Shared:INFO:	Listo of operators:Robert V.; 
13:16:21:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2062/TestDate_2024_01_30-13_15_17/