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FEB_2063 01.02.24 15:14:49
Info
15:14:02:febtest:INFO: FEB 8-2 selected
15:14:02:smx_tester:INFO: Setting Elink clock mode to 160 MHz
15:14:07:febtest:INFO: FEB 8-2 selected
15:14:07:smx_tester:INFO: Setting Elink clock mode to 160 MHz
15:14:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:14:23:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
15:14:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:14:24:febtest:INFO: Testing FEB with SN 2063
15:14:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:14:49:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
15:14:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:14:49:febtest:INFO: Testing FEB with SN 2063
15:14:51:smx_tester:INFO: Scanning setup
15:14:51:elinks:INFO: Disabling clock on downlink 0
15:14:51:elinks:INFO: Disabling clock on downlink 1
15:14:51:elinks:INFO: Disabling clock on downlink 2
15:14:51:elinks:INFO: Disabling clock on downlink 3
15:14:51:elinks:INFO: Disabling clock on downlink 4
15:14:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:14:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:51:elinks:INFO: Disabling clock on downlink 0
15:14:51:elinks:INFO: Disabling clock on downlink 1
15:14:51:elinks:INFO: Disabling clock on downlink 2
15:14:51:elinks:INFO: Disabling clock on downlink 3
15:14:51:elinks:INFO: Disabling clock on downlink 4
15:14:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:14:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:51:elinks:INFO: Disabling clock on downlink 0
15:14:51:elinks:INFO: Disabling clock on downlink 1
15:14:51:elinks:INFO: Disabling clock on downlink 2
15:14:51:elinks:INFO: Disabling clock on downlink 3
15:14:51:elinks:INFO: Disabling clock on downlink 4
15:14:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:14:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
15:14:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
15:14:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
15:14:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:14:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:14:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:52:elinks:INFO: Disabling clock on downlink 0
15:14:52:elinks:INFO: Disabling clock on downlink 1
15:14:52:elinks:INFO: Disabling clock on downlink 2
15:14:52:elinks:INFO: Disabling clock on downlink 3
15:14:52:elinks:INFO: Disabling clock on downlink 4
15:14:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:14:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:52:elinks:INFO: Disabling clock on downlink 0
15:14:52:elinks:INFO: Disabling clock on downlink 1
15:14:52:elinks:INFO: Disabling clock on downlink 2
15:14:52:elinks:INFO: Disabling clock on downlink 3
15:14:52:elinks:INFO: Disabling clock on downlink 4
15:14:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:14:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:14:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:14:52:setup_element:INFO: Scanning clock phase
15:14:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:14:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:14:52:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:14:52:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
15:14:52:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
15:14:52:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:14:52:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:14:52:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
15:14:52:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
15:14:52:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
15:14:52:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
15:14:52:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:14:52:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
15:14:52:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:14:52:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:14:52:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:14:52:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
15:14:52:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:14:52:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:14:52:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
15:14:52:setup_element:INFO: Scanning data phases
15:14:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:14:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:14:58:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:14:58:setup_element:INFO: Eye window for uplink 16: XX____________________________________XX
Data delay found: 19
15:14:58:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
15:14:58:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
15:14:58:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
15:14:58:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXXX
Data delay found: 17
15:14:58:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXXX_
Data delay found: 15
15:14:58:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
15:14:58:setup_element:INFO: Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
15:14:58:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
15:14:58:setup_element:INFO: Eye window for uplink 25: _______XXXX_____________________________
Data delay found: 28
15:14:58:setup_element:INFO: Eye window for uplink 26: _____XXXXXX_____________________________
Data delay found: 27
15:14:58:setup_element:INFO: Eye window for uplink 27: ________XXXXX___________________________
Data delay found: 30
15:14:58:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
15:14:58:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
15:14:58:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
15:14:58:setup_element:INFO: Eye window for uplink 31: _____________XXXXXX_____________________
Data delay found: 35
15:14:58:setup_element:INFO: Setting the data phase to 19 for uplink 16
15:14:58:setup_element:INFO: Setting the data phase to 15 for uplink 17
15:14:58:setup_element:INFO: Setting the data phase to 18 for uplink 18
15:14:58:setup_element:INFO: Setting the data phase to 15 for uplink 19
15:14:58:setup_element:INFO: Setting the data phase to 17 for uplink 20
15:14:58:setup_element:INFO: Setting the data phase to 15 for uplink 21
15:14:58:setup_element:INFO: Setting the data phase to 17 for uplink 22
15:14:58:setup_element:INFO: Setting the data phase to 15 for uplink 23
15:14:58:setup_element:INFO: Setting the data phase to 26 for uplink 24
15:14:58:setup_element:INFO: Setting the data phase to 28 for uplink 25
15:14:58:setup_element:INFO: Setting the data phase to 27 for uplink 26
15:14:58:setup_element:INFO: Setting the data phase to 30 for uplink 27
15:14:58:setup_element:INFO: Setting the data phase to 33 for uplink 28
15:14:58:setup_element:INFO: Setting the data phase to 35 for uplink 29
15:14:58:setup_element:INFO: Setting the data phase to 37 for uplink 30
15:14:58:setup_element:INFO: Setting the data phase to 35 for uplink 31
15:14:58:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXXX
Uplink 17: _______________________________________________________________________XXXXXXXXX
Uplink 18: _______________________________________________________________________XXXXXXX__
Uplink 19: _______________________________________________________________________XXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: ________________________________________________________________________XXXXXXX_
Uplink 31: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 36
Eye Window: XX____________________________________XX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 23:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 28
Window Length: 36
Eye Window: _______XXXX_____________________________
Uplink 26:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 27:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 28:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 29:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
]
15:14:58:setup_element:INFO: Beginning SMX ASICs map scan
15:14:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:14:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:14:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:14:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:14:58:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:14:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:14:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:14:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:14:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:14:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:14:59:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:14:59:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:14:59:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:14:59:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:14:59:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:14:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:14:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:14:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:14:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:14:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:14:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:15:01:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 69
Eye Windows:
Uplink 16: _______________________________________________________________________XXXXXXXXX
Uplink 17: _______________________________________________________________________XXXXXXXXX
Uplink 18: _______________________________________________________________________XXXXXXX__
Uplink 19: _______________________________________________________________________XXXXXXX__
Uplink 20: ______________________________________________________________________XXXXXXXXX_
Uplink 21: ______________________________________________________________________XXXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXXX_
Uplink 23: ______________________________________________________________________XXXXXXXXX_
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: ________________________________________________________________________XXXXXXX_
Uplink 31: ________________________________________________________________________XXXXXXX_
Data phase characteristics:
Uplink 16:
Optimal Phase: 19
Window Length: 36
Eye Window: XX____________________________________XX
Uplink 17:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 18:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 19:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 20:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 21:
Optimal Phase: 15
Window Length: 34
Eye Window: _________________________________XXXXXX_
Uplink 22:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 23:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 28
Window Length: 36
Eye Window: _______XXXX_____________________________
Uplink 26:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 27:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 28:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 29:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
15:15:01:setup_element:INFO: Performing Elink synchronization
15:15:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:15:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:15:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:15:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:15:01:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:15:01:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:15:01:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
15:15:02:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:15:02:febtest:INFO: 23-0 | XA-000-08-002-000-004-128-02 | 44.1 | 1177.4
15:15:03:febtest:INFO: 30-1 | XA-000-08-002-000-004-043-06 | 53.6 | 1124.0
15:15:03:febtest:INFO: 21-2 | XA-000-08-002-000-004-133-02 | 34.6 | 1212.7
15:15:03:febtest:INFO: 28-3 | XA-000-08-002-000-004-045-06 | 60.0 | 1118.1
15:15:03:febtest:INFO: 19-4 | XA-000-08-002-000-004-131-02 | 34.6 | 1206.9
15:15:04:febtest:INFO: 26-5 | XA-000-08-002-000-004-048-01 | 50.4 | 1147.8
15:15:04:febtest:INFO: 17-6 | XA-000-08-002-000-004-129-02 | 47.3 | 1171.5
15:15:04:febtest:INFO: 24-7 | XA-000-08-002-000-004-042-06 | 47.3 | 1159.7
15:15:04:ST3_smx:INFO: Configuring SMX FAST
15:15:06:ST3_smx:INFO: chip: 23-0 47.250730 C 1165.571835 mV
15:15:06:ST3_smx:INFO: Electrons
15:15:06:ST3_smx:INFO: # loops 0
15:15:08:ST3_smx:INFO: # loops 1
15:15:10:ST3_smx:INFO: # loops 2
15:15:11:ST3_smx:INFO: # loops 3
15:15:13:ST3_smx:INFO: # loops 4
15:15:14:ST3_smx:INFO: Total # of broken channels: 0
15:15:14:ST3_smx:INFO: List of broken channels: []
15:15:14:ST3_smx:INFO: Total # of broken channels: 0
15:15:14:ST3_smx:INFO: List of broken channels: []
15:15:15:ST3_smx:INFO: Configuring SMX FAST
15:15:17:ST3_smx:INFO: chip: 30-1 47.250730 C 1153.732915 mV
15:15:17:ST3_smx:INFO: Electrons
15:15:17:ST3_smx:INFO: # loops 0
15:15:19:ST3_smx:INFO: # loops 1
15:15:21:ST3_smx:INFO: # loops 2
15:15:23:ST3_smx:INFO: # loops 3
15:15:24:ST3_smx:INFO: # loops 4
15:15:26:ST3_smx:INFO: Total # of broken channels: 0
15:15:26:ST3_smx:INFO: List of broken channels: []
15:15:26:ST3_smx:INFO: Total # of broken channels: 1
15:15:26:ST3_smx:INFO: List of broken channels: [111]
15:15:27:ST3_smx:INFO: Configuring SMX FAST
15:15:29:ST3_smx:INFO: chip: 21-2 37.726682 C 1200.969315 mV
15:15:29:ST3_smx:INFO: Electrons
15:15:29:ST3_smx:INFO: # loops 0
15:15:31:ST3_smx:INFO: # loops 1
15:15:32:ST3_smx:INFO: # loops 2
15:15:34:ST3_smx:INFO: # loops 3
15:15:35:ST3_smx:INFO: # loops 4
15:15:37:ST3_smx:INFO: Total # of broken channels: 0
15:15:37:ST3_smx:INFO: List of broken channels: []
15:15:37:ST3_smx:INFO: Total # of broken channels: 0
15:15:37:ST3_smx:INFO: List of broken channels: []
15:15:38:ST3_smx:INFO: Configuring SMX FAST
15:15:40:ST3_smx:INFO: chip: 28-3 53.612520 C 1147.806000 mV
15:15:40:ST3_smx:INFO: Electrons
15:15:40:ST3_smx:INFO: # loops 0
15:15:42:ST3_smx:INFO: # loops 1
15:15:43:ST3_smx:INFO: # loops 2
15:15:45:ST3_smx:INFO: # loops 3
15:15:47:ST3_smx:INFO: # loops 4
15:15:48:ST3_smx:INFO: Total # of broken channels: 0
15:15:48:ST3_smx:INFO: List of broken channels: []
15:15:48:ST3_smx:INFO: Total # of broken channels: 0
15:15:48:ST3_smx:INFO: List of broken channels: []
15:15:49:ST3_smx:INFO: Configuring SMX FAST
15:15:51:ST3_smx:INFO: chip: 19-4 50.430383 C 1159.654860 mV
15:15:51:ST3_smx:INFO: Electrons
15:15:51:ST3_smx:INFO: # loops 0
15:15:53:ST3_smx:INFO: # loops 1
15:15:55:ST3_smx:INFO: # loops 2
15:15:56:ST3_smx:INFO: # loops 3
15:15:58:ST3_smx:INFO: # loops 4
15:16:00:ST3_smx:INFO: Total # of broken channels: 0
15:16:00:ST3_smx:INFO: List of broken channels: []
15:16:00:ST3_smx:INFO: Total # of broken channels: 0
15:16:00:ST3_smx:INFO: List of broken channels: []
15:16:01:ST3_smx:INFO: Configuring SMX FAST
15:16:03:ST3_smx:INFO: chip: 26-5 50.430383 C 1153.732915 mV
15:16:03:ST3_smx:INFO: Electrons
15:16:03:ST3_smx:INFO: # loops 0
15:16:04:ST3_smx:INFO: # loops 1
15:16:06:ST3_smx:INFO: # loops 2
15:16:07:ST3_smx:INFO: # loops 3
15:16:09:ST3_smx:INFO: # loops 4
15:16:11:ST3_smx:INFO: Total # of broken channels: 1
15:16:11:ST3_smx:INFO: List of broken channels: [17]
15:16:11:ST3_smx:INFO: Total # of broken channels: 2
15:16:11:ST3_smx:INFO: List of broken channels: [17, 53]
15:16:12:ST3_smx:INFO: Configuring SMX FAST
15:16:14:ST3_smx:INFO: chip: 17-6 40.898880 C 1200.969315 mV
15:16:14:ST3_smx:INFO: Electrons
15:16:14:ST3_smx:INFO: # loops 0
15:16:15:ST3_smx:INFO: # loops 1
15:16:17:ST3_smx:INFO: # loops 2
15:16:19:ST3_smx:INFO: # loops 3
15:16:20:ST3_smx:INFO: # loops 4
15:16:22:ST3_smx:INFO: Total # of broken channels: 0
15:16:22:ST3_smx:INFO: List of broken channels: []
15:16:22:ST3_smx:INFO: Total # of broken channels: 0
15:16:22:ST3_smx:INFO: List of broken channels: []
15:16:23:ST3_smx:INFO: Configuring SMX FAST
15:16:25:ST3_smx:INFO: chip: 24-7 40.898880 C 1195.082160 mV
15:16:25:ST3_smx:INFO: Electrons
15:16:25:ST3_smx:INFO: # loops 0
15:16:27:ST3_smx:INFO: # loops 1
15:16:28:ST3_smx:INFO: # loops 2
15:16:30:ST3_smx:INFO: # loops 3
15:16:31:ST3_smx:INFO: # loops 4
15:16:33:ST3_smx:INFO: Total # of broken channels: 0
15:16:33:ST3_smx:INFO: List of broken channels: []
15:16:33:ST3_smx:INFO: Total # of broken channels: 0
15:16:33:ST3_smx:INFO: List of broken channels: []
15:16:34:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
15:16:34:febtest:INFO: 23-0 | XA-000-08-002-000-004-128-02 | 50.4 | 1165.6
15:16:34:febtest:INFO: 30-1 | XA-000-08-002-000-004-043-06 | 50.4 | 1153.7
15:16:34:febtest:INFO: 21-2 | XA-000-08-002-000-004-133-02 | 40.9 | 1201.0
15:16:35:febtest:INFO: 28-3 | XA-000-08-002-000-004-045-06 | 53.6 | 1147.8
15:16:35:febtest:INFO: 19-4 | XA-000-08-002-000-004-131-02 | 50.4 | 1159.7
15:16:35:febtest:INFO: 26-5 | XA-000-08-002-000-004-048-01 | 53.6 | 1153.7
15:16:35:febtest:INFO: 17-6 | XA-000-08-002-000-004-129-02 | 40.9 | 1201.0
15:16:36:febtest:INFO: 24-7 | XA-000-08-002-000-004-042-06 | 40.9 | 1195.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_02_01-15_14_49
OPERATOR : Oleksandr S.; Robert V.; Irakli K.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 2063
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '1.6040', '1.850', '2.3230', '2.450', '0.0001', '1.850', '0.0001']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
15:16:43:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2063/TestDate_2024_02_01-15_14_49/