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FEB_2064 04.01.24 11:15:09
Info
11:15:03:febtest:INFO: FEB 8-2 selected
11:15:03:smx_tester:INFO: Setting Elink clock mode to 160 MHz
11:15:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:15:09:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
11:15:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:15:10:febtest:INFO: Testing FEB with SN 2064
11:15:11:smx_tester:INFO: Scanning setup
11:15:11:elinks:INFO: Disabling clock on downlink 0
11:15:11:elinks:INFO: Disabling clock on downlink 1
11:15:11:elinks:INFO: Disabling clock on downlink 2
11:15:11:elinks:INFO: Disabling clock on downlink 3
11:15:11:elinks:INFO: Disabling clock on downlink 4
11:15:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:15:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:15:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:15:11:elinks:INFO: Disabling clock on downlink 0
11:15:11:elinks:INFO: Disabling clock on downlink 1
11:15:11:elinks:INFO: Disabling clock on downlink 2
11:15:11:elinks:INFO: Disabling clock on downlink 3
11:15:11:elinks:INFO: Disabling clock on downlink 4
11:15:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:15:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:15:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:15:11:elinks:INFO: Disabling clock on downlink 0
11:15:11:elinks:INFO: Disabling clock on downlink 1
11:15:11:elinks:INFO: Disabling clock on downlink 2
11:15:11:elinks:INFO: Disabling clock on downlink 3
11:15:11:elinks:INFO: Disabling clock on downlink 4
11:15:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:15:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:15:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:15:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:15:11:elinks:INFO: Disabling clock on downlink 0
11:15:11:elinks:INFO: Disabling clock on downlink 1
11:15:11:elinks:INFO: Disabling clock on downlink 2
11:15:11:elinks:INFO: Disabling clock on downlink 3
11:15:11:elinks:INFO: Disabling clock on downlink 4
11:15:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:15:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:15:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:15:11:elinks:INFO: Disabling clock on downlink 0
11:15:11:elinks:INFO: Disabling clock on downlink 1
11:15:11:elinks:INFO: Disabling clock on downlink 2
11:15:11:elinks:INFO: Disabling clock on downlink 3
11:15:12:elinks:INFO: Disabling clock on downlink 4
11:15:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:15:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:15:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:15:12:setup_element:INFO: Scanning clock phase
11:15:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:15:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:15:12:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:15:12:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:15:12:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:15:12:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
11:15:12:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
11:15:12:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:15:12:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:15:12:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:15:12:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
11:15:12:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
11:15:12:setup_element:INFO: Scanning data phases
11:15:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:15:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:15:17:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:15:17:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
11:15:17:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
11:15:17:setup_element:INFO: Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
11:15:17:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
11:15:17:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
11:15:17:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
11:15:17:setup_element:INFO: Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
11:15:17:setup_element:INFO: Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
11:15:17:setup_element:INFO: Setting the data phase to 28 for uplink 24
11:15:17:setup_element:INFO: Setting the data phase to 31 for uplink 25
11:15:17:setup_element:INFO: Setting the data phase to 27 for uplink 26
11:15:17:setup_element:INFO: Setting the data phase to 31 for uplink 27
11:15:17:setup_element:INFO: Setting the data phase to 33 for uplink 28
11:15:17:setup_element:INFO: Setting the data phase to 34 for uplink 29
11:15:17:setup_element:INFO: Setting the data phase to 35 for uplink 30
11:15:17:setup_element:INFO: Setting the data phase to 34 for uplink 31
11:15:17:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 31:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
]
11:15:17:setup_element:INFO: Beginning SMX ASICs map scan
11:15:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:15:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:15:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:15:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:15:17:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:15:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:15:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:15:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:15:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:15:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:15:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:15:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:15:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:15:20:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: _______________________________________________________________________XXXXXXX__
Uplink 25: _______________________________________________________________________XXXXXXX__
Uplink 26: ________________________________________________________________________________
Uplink 27: ________________________________________________________________________________
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 26:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 31:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
11:15:20:setup_element:INFO: Performing Elink synchronization
11:15:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:15:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:15:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:15:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:15:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:15:20:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
11:15:20:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
11:15:21:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:15:21:febtest:INFO: 30-1 | XA-000-08-002-001-008-007-10 | 18.7 | 1230.3
11:15:21:febtest:INFO: 28-3 | XA-000-08-002-001-007-205-01 | 50.4 | 1124.0
11:15:21:febtest:INFO: 26-5 | XA-000-08-002-001-007-206-01 | 40.9 | 1165.6
11:15:21:febtest:INFO: 24-7 | XA-000-08-002-001-007-211-06 | 40.9 | 1159.7
11:15:21:ST3_smx:INFO: Configuring SMX FAST
11:15:23:ST3_smx:INFO: chip: 30-1 28.225000 C 1195.082160 mV
11:15:23:ST3_smx:INFO: Electrons
11:15:23:ST3_smx:INFO: # loops 0
11:15:25:ST3_smx:INFO: # loops 1
11:15:27:ST3_smx:INFO: # loops 2
11:15:29:ST3_smx:INFO: # loops 3
11:15:30:ST3_smx:INFO: # loops 4
11:15:32:ST3_smx:INFO: Total # of broken channels: 0
11:15:32:ST3_smx:INFO: List of broken channels: []
11:15:32:ST3_smx:INFO: Total # of broken channels: 1
11:15:32:ST3_smx:INFO: List of broken channels: [63]
11:15:33:ST3_smx:INFO: Configuring SMX FAST
11:15:35:ST3_smx:INFO: chip: 28-3 47.250730 C 1147.806000 mV
11:15:35:ST3_smx:INFO: Electrons
11:15:35:ST3_smx:INFO: # loops 0
11:15:36:ST3_smx:INFO: # loops 1
11:15:38:ST3_smx:INFO: # loops 2
11:15:40:ST3_smx:INFO: # loops 3
11:15:41:ST3_smx:INFO: # loops 4
11:15:43:ST3_smx:INFO: Total # of broken channels: 1
11:15:43:ST3_smx:INFO: List of broken channels: [9]
11:15:43:ST3_smx:INFO: Total # of broken channels: 1
11:15:43:ST3_smx:INFO: List of broken channels: [9]
11:15:44:ST3_smx:INFO: Configuring SMX FAST
11:15:46:ST3_smx:INFO: chip: 26-5 37.726682 C 1177.390875 mV
11:15:46:ST3_smx:INFO: Electrons
11:15:46:ST3_smx:INFO: # loops 0
11:15:47:ST3_smx:INFO: # loops 1
11:15:49:ST3_smx:INFO: # loops 2
11:15:51:ST3_smx:INFO: # loops 3
11:15:52:ST3_smx:INFO: # loops 4
11:15:54:ST3_smx:INFO: Total # of broken channels: 0
11:15:54:ST3_smx:INFO: List of broken channels: []
11:15:54:ST3_smx:INFO: Total # of broken channels: 0
11:15:54:ST3_smx:INFO: List of broken channels: []
11:15:55:ST3_smx:INFO: Configuring SMX FAST
11:15:57:ST3_smx:INFO: chip: 24-7 40.898880 C 1165.571835 mV
11:15:57:ST3_smx:INFO: Electrons
11:15:57:ST3_smx:INFO: # loops 0
11:15:58:ST3_smx:INFO: # loops 1
11:16:00:ST3_smx:INFO: # loops 2
11:16:02:ST3_smx:INFO: # loops 3
11:16:03:ST3_smx:INFO: # loops 4
11:16:05:ST3_smx:INFO: Total # of broken channels: 0
11:16:05:ST3_smx:INFO: List of broken channels: []
11:16:05:ST3_smx:INFO: Total # of broken channels: 0
11:16:05:ST3_smx:INFO: List of broken channels: []
11:16:06:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
11:16:06:febtest:INFO: 30-1 | XA-000-08-002-001-008-007-10 | 31.4 | 1201.0
11:16:06:febtest:INFO: 28-3 | XA-000-08-002-001-007-205-01 | 47.3 | 1147.8
11:16:06:febtest:INFO: 26-5 | XA-000-08-002-001-007-206-01 | 37.7 | 1177.4
11:16:07:febtest:INFO: 24-7 | XA-000-08-002-001-007-211-06 | 40.9 | 1159.7
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_04-11_15_09
OPERATOR : Olga B.; Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL201031 M4UL2B1010311A2 42 A
FEB_SN : 2064
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '0.9817', '1.848', '1.0850', '7.000', '1.5470', '7.000', '1.5470']
VI_after__Init : ['2.450', '1.9950', '1.850', '0.6076', '7.000', '1.5500', '7.000', '1.5500']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
11:16:22:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2064/TestDate_2024_01_04-11_15_09/