
FEB_2064 04.01.24 14:14:31
TextEdit.txt
14:12:31:ST3_hmp4040:INFO: HAMEG,HMP2030,017836163,HW50010002/SW2.30 14:12:33:ST3_Shared:INFO: Listo of operators:Oleksandr S.; 14:14:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:14:20:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 14:14:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:14:20:febtest:INFO: Testing FEB with SN 2064 Traceback (most recent call last): File "febtest.py", line 267, in DoFEB_MicrocableTest if self.DoScanFEB8(reporter.out_dict): File "febtest.py", line 178, in DoScanFEB8 if self.EMU.Scan_FEB8(reporter): AttributeError: 'int' object has no attribute 'Scan_FEB8' 14:14:29:febtest:INFO: FEB 8-2 selected 14:14:29:smx_tester:INFO: Setting Elink clock mode to 160 MHz 14:14:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:14:31:ST3_Shared:INFO: -----------------------FEB-Microcable----------------------- 14:14:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:14:31:febtest:INFO: Testing FEB with SN 2064 14:14:32:smx_tester:INFO: Scanning setup 14:14:32:elinks:INFO: Disabling clock on downlink 0 14:14:32:elinks:INFO: Disabling clock on downlink 1 14:14:32:elinks:INFO: Disabling clock on downlink 2 14:14:32:elinks:INFO: Disabling clock on downlink 3 14:14:32:elinks:INFO: Disabling clock on downlink 4 14:14:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:14:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:14:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:14:32:elinks:INFO: Disabling clock on downlink 0 14:14:33:elinks:INFO: Disabling clock on downlink 1 14:14:33:elinks:INFO: Disabling clock on downlink 2 14:14:33:elinks:INFO: Disabling clock on downlink 3 14:14:33:elinks:INFO: Disabling clock on downlink 4 14:14:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:14:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:14:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:14:33:elinks:INFO: Disabling clock on downlink 0 14:14:33:elinks:INFO: Disabling clock on downlink 1 14:14:33:elinks:INFO: Disabling clock on downlink 2 14:14:33:elinks:INFO: Disabling clock on downlink 3 14:14:33:elinks:INFO: Disabling clock on downlink 4 14:14:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:14:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:14:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:14:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:14:33:elinks:INFO: Disabling clock on downlink 0 14:14:33:elinks:INFO: Disabling clock on downlink 1 14:14:33:elinks:INFO: Disabling clock on downlink 2 14:14:33:elinks:INFO: Disabling clock on downlink 3 14:14:33:elinks:INFO: Disabling clock on downlink 4 14:14:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:14:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:14:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:14:33:elinks:INFO: Disabling clock on downlink 0 14:14:33:elinks:INFO: Disabling clock on downlink 1 14:14:33:elinks:INFO: Disabling clock on downlink 2 14:14:33:elinks:INFO: Disabling clock on downlink 3 14:14:33:elinks:INFO: Disabling clock on downlink 4 14:14:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:14:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:14:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:14:33:setup_element:INFO: Scanning clock phase 14:14:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:14:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:14:34:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:14:34:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:14:34:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:14:34:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 14:14:34:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 14:14:34:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________ Clock Delay: 40 14:14:34:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________ Clock Delay: 40 14:14:34:setup_element:INFO: Eye window for uplink 22: X_______________________________________________________________________XXXXXXXX Clock Delay: 36 14:14:34:setup_element:INFO: Eye window for uplink 23: X_______________________________________________________________________XXXXXXXX Clock Delay: 36 14:14:34:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:14:34:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:14:34:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:14:34:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 14:14:34:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 14:14:34:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXXX_ Clock Delay: 34 14:14:34:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:14:34:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 14:14:34:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2 14:14:34:setup_element:INFO: Scanning data phases 14:14:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:14:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:14:39:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:14:39:setup_element:INFO: Eye window for uplink 16: X____________________________________XXX Data delay found: 18 14:14:39:setup_element:INFO: Eye window for uplink 17: _________________________________XXXX___ Data delay found: 14 14:14:39:setup_element:INFO: Eye window for uplink 18: X_________________________________XXXXX_ Data delay found: 17 14:14:39:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___ Data delay found: 14 14:14:39:setup_element:INFO: Eye window for uplink 20: XXXX___________________________________X Data delay found: 21 14:14:39:setup_element:INFO: Eye window for uplink 21: XXX__________________________________XXX Data delay found: 19 14:14:39:setup_element:INFO: Eye window for uplink 22: XXXX_________________________________XXX Data delay found: 20 14:14:39:setup_element:INFO: Eye window for uplink 23: XX__________________________________XXXX Data delay found: 18 14:14:39:setup_element:INFO: Eye window for uplink 24: ____XXXXXX______________________________ Data delay found: 26 14:14:39:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________ Data delay found: 29 14:14:39:setup_element:INFO: Eye window for uplink 26: ____XXXXX_______________________________ Data delay found: 26 14:14:39:setup_element:INFO: Eye window for uplink 27: ________XXXXX___________________________ Data delay found: 30 14:14:39:setup_element:INFO: Eye window for uplink 28: __________XXXXX_________________________ Data delay found: 32 14:14:39:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________ Data delay found: 34 14:14:39:setup_element:INFO: Eye window for uplink 30: ______________XXXXX_____________________ Data delay found: 36 14:14:39:setup_element:INFO: Eye window for uplink 31: ____________XXXXX_______________________ Data delay found: 34 14:14:39:setup_element:INFO: Setting the data phase to 18 for uplink 16 14:14:39:setup_element:INFO: Setting the data phase to 14 for uplink 17 14:14:39:setup_element:INFO: Setting the data phase to 17 for uplink 18 14:14:39:setup_element:INFO: Setting the data phase to 14 for uplink 19 14:14:39:setup_element:INFO: Setting the data phase to 21 for uplink 20 14:14:39:setup_element:INFO: Setting the data phase to 19 for uplink 21 14:14:39:setup_element:INFO: Setting the data phase to 20 for uplink 22 14:14:39:setup_element:INFO: Setting the data phase to 18 for uplink 23 14:14:39:setup_element:INFO: Setting the data phase to 26 for uplink 24 14:14:39:setup_element:INFO: Setting the data phase to 29 for uplink 25 14:14:39:setup_element:INFO: Setting the data phase to 26 for uplink 26 14:14:39:setup_element:INFO: Setting the data phase to 30 for uplink 27 14:14:39:setup_element:INFO: Setting the data phase to 32 for uplink 28 14:14:39:setup_element:INFO: Setting the data phase to 34 for uplink 29 14:14:39:setup_element:INFO: Setting the data phase to 36 for uplink 30 14:14:39:setup_element:INFO: Setting the data phase to 34 for uplink 31 14:14:39:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 35 Window Length: 69 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXXX_ Uplink 17: _______________________________________________________________________XXXXXXXX_ Uplink 18: ______________________________________________________________________XXXXXXXXX_ Uplink 19: ______________________________________________________________________XXXXXXXXX_ Uplink 20: ________________________________________________________________________________ Uplink 21: ________________________________________________________________________________ Uplink 22: X_______________________________________________________________________XXXXXXXX Uplink 23: X_______________________________________________________________________XXXXXXXX Uplink 24: _______________________________________________________________________XXXXXXXX_ Uplink 25: _______________________________________________________________________XXXXXXXX_ Uplink 26: ______________________________________________________________________XXXXXXXX__ Uplink 27: ______________________________________________________________________XXXXXXXX__ Uplink 28: ______________________________________________________________________XXXXXXXXX_ Uplink 29: ______________________________________________________________________XXXXXXXXX_ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 18 Window Length: 36 Eye Window: X____________________________________XXX Uplink 17: Optimal Phase: 14 Window Length: 36 Eye Window: _________________________________XXXX___ Uplink 18: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXX_ Uplink 19: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 20: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 21: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 22: Optimal Phase: 20 Window Length: 33 Eye Window: XXXX_________________________________XXX Uplink 23: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 24: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 25: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 26: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 27: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 28: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 29: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 30: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 31: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ ] 14:14:39:setup_element:INFO: Beginning SMX ASICs map scan 14:14:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:14:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:14:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:14:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:14:39:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:14:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 14:14:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 14:14:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:14:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:14:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:14:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:14:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:14:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:14:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:14:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:14:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:14:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:14:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:14:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:14:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:14:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:14:42:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 35 Window Length: 69 Eye Windows: Uplink 16: _______________________________________________________________________XXXXXXXX_ Uplink 17: _______________________________________________________________________XXXXXXXX_ Uplink 18: ______________________________________________________________________XXXXXXXXX_ Uplink 19: ______________________________________________________________________XXXXXXXXX_ Uplink 20: ________________________________________________________________________________ Uplink 21: ________________________________________________________________________________ Uplink 22: X_______________________________________________________________________XXXXXXXX Uplink 23: X_______________________________________________________________________XXXXXXXX Uplink 24: _______________________________________________________________________XXXXXXXX_ Uplink 25: _______________________________________________________________________XXXXXXXX_ Uplink 26: ______________________________________________________________________XXXXXXXX__ Uplink 27: ______________________________________________________________________XXXXXXXX__ Uplink 28: ______________________________________________________________________XXXXXXXXX_ Uplink 29: ______________________________________________________________________XXXXXXXXX_ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 18 Window Length: 36 Eye Window: X____________________________________XXX Uplink 17: Optimal Phase: 14 Window Length: 36 Eye Window: _________________________________XXXX___ Uplink 18: Optimal Phase: 17 Window Length: 33 Eye Window: X_________________________________XXXXX_ Uplink 19: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 20: Optimal Phase: 21 Window Length: 35 Eye Window: XXXX___________________________________X Uplink 21: Optimal Phase: 19 Window Length: 34 Eye Window: XXX__________________________________XXX Uplink 22: Optimal Phase: 20 Window Length: 33 Eye Window: XXXX_________________________________XXX Uplink 23: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 24: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 25: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 26: Optimal Phase: 26 Window Length: 35 Eye Window: ____XXXXX_______________________________ Uplink 27: Optimal Phase: 30 Window Length: 35 Eye Window: ________XXXXX___________________________ Uplink 28: Optimal Phase: 32 Window Length: 35 Eye Window: __________XXXXX_________________________ Uplink 29: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 30: Optimal Phase: 36 Window Length: 35 Eye Window: ______________XXXXX_____________________ Uplink 31: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ 14:14:42:setup_element:INFO: Performing Elink synchronization 14:14:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:14:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:14:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:14:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:14:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:14:42:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:14:42:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] 14:14:43:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 14:14:44:febtest:INFO: 23-0 | XA-000-08-002-001-007-196-01 | 28.2 | 1189.2 14:14:44:febtest:INFO: 30-1 | XA-000-08-002-001-008-007-10 | 12.4 | 1230.3 14:14:44:febtest:INFO: 21-2 | XA-000-08-002-001-007-195-01 | 34.6 | 1177.4 14:14:44:febtest:INFO: 28-3 | XA-000-08-002-001-007-205-01 | 44.1 | 1130.0 14:14:44:febtest:INFO: 19-4 | XA-000-08-002-001-007-201-01 | 37.7 | 1159.7 14:14:45:febtest:INFO: 26-5 | XA-000-08-002-001-007-206-01 | 34.6 | 1171.5 14:14:45:febtest:INFO: 17-6 | XA-000-08-002-001-007-198-01 | 34.6 | 1171.5 14:14:45:febtest:INFO: 24-7 | XA-000-08-002-001-007-211-06 | 40.9 | 1147.8 14:14:45:ST3_smx:INFO: Configuring SMX FAST 14:14:47:ST3_smx:INFO: chip: 23-0 31.389742 C 1183.292940 mV 14:14:47:ST3_smx:INFO: Electrons 14:14:47:ST3_smx:INFO: # loops 0 14:14:49:ST3_smx:INFO: # loops 1 14:14:50:ST3_smx:INFO: # loops 2 14:14:52:ST3_smx:INFO: # loops 3 14:14:54:ST3_smx:INFO: # loops 4 14:14:56:ST3_smx:INFO: Total # of broken channels: 0 14:14:56:ST3_smx:INFO: List of broken channels: [] 14:14:56:ST3_smx:INFO: Total # of broken channels: 0 14:14:56:ST3_smx:INFO: List of broken channels: [] 14:14:56:ST3_smx:INFO: Configuring SMX FAST 14:14:58:ST3_smx:INFO: chip: 30-1 25.062742 C 1200.969315 mV 14:14:58:ST3_smx:INFO: Electrons 14:14:58:ST3_smx:INFO: # loops 0 14:15:00:ST3_smx:INFO: # loops 1 14:15:02:ST3_smx:INFO: # loops 2 14:15:03:ST3_smx:INFO: # loops 3 14:15:05:ST3_smx:INFO: # loops 4 14:15:07:ST3_smx:INFO: Total # of broken channels: 0 14:15:07:ST3_smx:INFO: List of broken channels: [] 14:15:07:ST3_smx:INFO: Total # of broken channels: 0 14:15:07:ST3_smx:INFO: List of broken channels: [] 14:15:07:ST3_smx:INFO: Configuring SMX FAST 14:15:09:ST3_smx:INFO: chip: 21-2 34.556970 C 1189.190035 mV 14:15:09:ST3_smx:INFO: Electrons 14:15:09:ST3_smx:INFO: # loops 0 14:15:11:ST3_smx:INFO: # loops 1 14:15:12:ST3_smx:INFO: # loops 2 14:15:14:ST3_smx:INFO: # loops 3 14:15:16:ST3_smx:INFO: # loops 4 14:15:17:ST3_smx:INFO: Total # of broken channels: 0 14:15:17:ST3_smx:INFO: List of broken channels: [] 14:15:17:ST3_smx:INFO: Total # of broken channels: 0 14:15:17:ST3_smx:INFO: List of broken channels: [] 14:15:18:ST3_smx:INFO: Configuring SMX FAST 14:15:20:ST3_smx:INFO: chip: 28-3 40.898880 C 1153.732915 mV 14:15:20:ST3_smx:INFO: Electrons 14:15:20:ST3_smx:INFO: # loops 0 14:15:22:ST3_smx:INFO: # loops 1 14:15:23:ST3_smx:INFO: # loops 2 14:15:25:ST3_smx:INFO: # loops 3 14:15:27:ST3_smx:INFO: # loops 4 14:15:28:ST3_smx:INFO: Total # of broken channels: 0 14:15:28:ST3_smx:INFO: List of broken channels: [] 14:15:28:ST3_smx:INFO: Total # of broken channels: 0 14:15:28:ST3_smx:INFO: List of broken channels: [] 14:15:29:ST3_smx:INFO: Configuring SMX FAST 14:15:31:ST3_smx:INFO: chip: 19-4 34.556970 C 1177.390875 mV 14:15:31:ST3_smx:INFO: Electrons 14:15:31:ST3_smx:INFO: # loops 0 14:15:33:ST3_smx:INFO: # loops 1 14:15:34:ST3_smx:INFO: # loops 2 14:15:36:ST3_smx:INFO: # loops 3 14:15:38:ST3_smx:INFO: # loops 4 14:15:39:ST3_smx:INFO: Total # of broken channels: 0 14:15:39:ST3_smx:INFO: List of broken channels: [] 14:15:39:ST3_smx:INFO: Total # of broken channels: 0 14:15:39:ST3_smx:INFO: List of broken channels: [] 14:15:40:ST3_smx:INFO: Configuring SMX FAST 14:15:42:ST3_smx:INFO: chip: 26-5 34.556970 C 1183.292940 mV 14:15:42:ST3_smx:INFO: Electrons 14:15:42:ST3_smx:INFO: # loops 0 14:15:44:ST3_smx:INFO: # loops 1 14:15:45:ST3_smx:INFO: # loops 2 14:15:47:ST3_smx:INFO: # loops 3 14:15:49:ST3_smx:INFO: # loops 4 14:15:50:ST3_smx:INFO: Total # of broken channels: 0 14:15:50:ST3_smx:INFO: List of broken channels: [] 14:15:50:ST3_smx:INFO: Total # of broken channels: 0 14:15:50:ST3_smx:INFO: List of broken channels: [] 14:15:51:ST3_smx:INFO: Configuring SMX FAST 14:15:53:ST3_smx:INFO: chip: 17-6 31.389742 C 1183.292940 mV 14:15:53:ST3_smx:INFO: Electrons 14:15:53:ST3_smx:INFO: # loops 0 14:15:54:ST3_smx:INFO: # loops 1 14:15:56:ST3_smx:INFO: # loops 2 14:15:58:ST3_smx:INFO: # loops 3 14:15:59:ST3_smx:INFO: # loops 4 14:16:01:ST3_smx:INFO: Total # of broken channels: 0 14:16:01:ST3_smx:INFO: List of broken channels: [] 14:16:01:ST3_smx:INFO: Total # of broken channels: 0 14:16:01:ST3_smx:INFO: List of broken channels: [] 14:16:02:ST3_smx:INFO: Configuring SMX FAST 14:16:04:ST3_smx:INFO: chip: 24-7 40.898880 C 1165.571835 mV 14:16:04:ST3_smx:INFO: Electrons 14:16:04:ST3_smx:INFO: # loops 0 14:16:05:ST3_smx:INFO: # loops 1 14:16:07:ST3_smx:INFO: # loops 2 14:16:08:ST3_smx:INFO: # loops 3 14:16:10:ST3_smx:INFO: # loops 4 14:16:12:ST3_smx:INFO: Total # of broken channels: 0 14:16:12:ST3_smx:INFO: List of broken channels: [] 14:16:12:ST3_smx:INFO: Total # of broken channels: 0 14:16:12:ST3_smx:INFO: List of broken channels: [] 14:16:12:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 14:16:13:febtest:INFO: 23-0 | XA-000-08-002-001-007-196-01 | 31.4 | 1183.3 14:16:13:febtest:INFO: 30-1 | XA-000-08-002-001-008-007-10 | 25.1 | 1201.0 14:16:13:febtest:INFO: 21-2 | XA-000-08-002-001-007-195-01 | 34.6 | 1189.2 14:16:13:febtest:INFO: 28-3 | XA-000-08-002-001-007-205-01 | 40.9 | 1153.7 14:16:13:febtest:INFO: 19-4 | XA-000-08-002-001-007-201-01 | 34.6 | 1177.4 14:16:14:febtest:INFO: 26-5 | XA-000-08-002-001-007-206-01 | 34.6 | 1183.3 14:16:14:febtest:INFO: 17-6 | XA-000-08-002-001-007-198-01 | 34.6 | 1183.3 14:16:14:febtest:INFO: 24-7 | XA-000-08-002-001-007-211-06 | 40.9 | 1159.7 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 2024_01_04-14_14_31 OPERATOR : Oleksandr S.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : FEB_SN : 2064 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- --------------------------------------- VI_before_Init : ['2.447', '1.6330', '1.846', '2.2720', '7.001', '1.5280', '7.001', '1.5280'] VI_after__Init : ['0', '0', '0', '0', '0', '0'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 14:16:15:ST3_Shared:INFO: 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