FEB_2070 19.10.23 13:39:31
Info
13:39:26:febtest:INFO: FEB 8-2 B @ GSI
13:39:28:smx_tester:INFO: Setting Elink clock mode to 160 MHz
13:39:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:39:31:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
13:39:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:39:31:febtest:INFO: Tsting FEB with SN 2070
13:39:32:smx_tester:INFO: Scanning setup
13:39:32:elinks:INFO: Disabling clock on downlink 0
13:39:32:elinks:INFO: Disabling clock on downlink 1
13:39:32:elinks:INFO: Disabling clock on downlink 2
13:39:32:elinks:INFO: Disabling clock on downlink 3
13:39:32:elinks:INFO: Disabling clock on downlink 4
13:39:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:39:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:39:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:39:32:elinks:INFO: Disabling clock on downlink 0
13:39:32:elinks:INFO: Disabling clock on downlink 1
13:39:32:elinks:INFO: Disabling clock on downlink 2
13:39:32:elinks:INFO: Disabling clock on downlink 3
13:39:32:elinks:INFO: Disabling clock on downlink 4
13:39:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:39:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:39:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:39:32:elinks:INFO: Disabling clock on downlink 0
13:39:32:elinks:INFO: Disabling clock on downlink 1
13:39:32:elinks:INFO: Disabling clock on downlink 2
13:39:32:elinks:INFO: Disabling clock on downlink 3
13:39:32:elinks:INFO: Disabling clock on downlink 4
13:39:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:39:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:39:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:39:33:elinks:INFO: Disabling clock on downlink 0
13:39:33:elinks:INFO: Disabling clock on downlink 1
13:39:33:elinks:INFO: Disabling clock on downlink 2
13:39:33:elinks:INFO: Disabling clock on downlink 3
13:39:33:elinks:INFO: Disabling clock on downlink 4
13:39:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:39:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:39:33:elinks:INFO: Disabling clock on downlink 0
13:39:33:elinks:INFO: Disabling clock on downlink 1
13:39:33:elinks:INFO: Disabling clock on downlink 2
13:39:33:elinks:INFO: Disabling clock on downlink 3
13:39:33:elinks:INFO: Disabling clock on downlink 4
13:39:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:39:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:39:33:setup_element:INFO: Scanning clock phase
13:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:39:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:39:33:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:39:33:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:39:33:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:39:33:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:39:33:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:39:33:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:39:33:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:39:33:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:39:33:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
13:39:33:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
13:39:33:setup_element:INFO: Scanning data phases
13:39:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:39:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:39:39:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:39:39:setup_element:INFO: Eye window for uplink 24: ____XXXXXX______________________________
Data delay found: 26
13:39:39:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
13:39:39:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
13:39:39:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
13:39:39:setup_element:INFO: Eye window for uplink 28: __________XXXXX_________________________
Data delay found: 32
13:39:39:setup_element:INFO: Eye window for uplink 29: ___________XXXXXX_______________________
Data delay found: 33
13:39:39:setup_element:INFO: Eye window for uplink 30: ___________XXXXX________________________
Data delay found: 33
13:39:39:setup_element:INFO: Eye window for uplink 31: __________XXXXX_________________________
Data delay found: 32
13:39:39:setup_element:INFO: Setting the data phase to 26 for uplink 24
13:39:39:setup_element:INFO: Setting the data phase to 29 for uplink 25
13:39:39:setup_element:INFO: Setting the data phase to 29 for uplink 26
13:39:39:setup_element:INFO: Setting the data phase to 32 for uplink 27
13:39:39:setup_element:INFO: Setting the data phase to 32 for uplink 28
13:39:39:setup_element:INFO: Setting the data phase to 33 for uplink 29
13:39:39:setup_element:INFO: Setting the data phase to 33 for uplink 30
13:39:39:setup_element:INFO: Setting the data phase to 32 for uplink 31
13:39:39:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: ________________________________________________________________________XXXXXXX_
Uplink 27: ________________________________________________________________________XXXXXXX_
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ____________________________________________________________________XXXXXXXXX___
Uplink 31: ____________________________________________________________________XXXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 29:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 30:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 31:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
]
13:39:39:setup_element:INFO: Beginning SMX ASICs map scan
13:39:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:39:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:39:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:39:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:39:39:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:39:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:39:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:39:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:39:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:39:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:39:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:39:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:39:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:39:41:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 69
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: ________________________________________________________________________XXXXXXX_
Uplink 27: ________________________________________________________________________XXXXXXX_
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: ____________________________________________________________________XXXXXXXXX___
Uplink 31: ____________________________________________________________________XXXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 29:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 30:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 31:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
13:39:41:setup_element:INFO: Performing Elink synchronization
13:39:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:39:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:39:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:39:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:39:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:39:41:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:39:41:ST3_emu:INFO: Number of chips: 4
13:39:41:ST3_emu:INFO: Chip address: 0x1
13:39:41:ST3_emu:INFO: Chip address: 0x3
13:39:41:ST3_emu:INFO: Chip address: 0x5
13:39:41:ST3_emu:INFO: Chip address: 0x7
13:39:42:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:39:42:febtest:INFO: 0-1 | XA-000-08-002-000-001-118-15 | 47.3 | 1147.8
13:39:42:febtest:INFO: 0-3 | XA-000-08-002-000-001-136-09 | 50.4 | 1147.8
13:39:42:febtest:INFO: 0-5 | XA-000-08-002-000-001-131-09 | 37.7 | 1177.4
13:39:43:febtest:INFO: 0-7 | XA-000-08-002-000-001-127-15 | 31.4 | 1206.9
13:39:43:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:39:47:ST3_smx:INFO: chip: 0-1 53.612520 C 1112.140140 mV
13:39:47:ST3_smx:INFO: # loops 0
13:39:48:ST3_smx:INFO: # loops 1
13:39:50:ST3_smx:INFO: # loops 2
13:39:52:ST3_smx:INFO: # loops 3
13:39:53:ST3_smx:INFO: # loops 4
13:39:55:ST3_smx:INFO: Total # of broken channels: 0
13:39:55:ST3_smx:INFO: List of broken channels: []
13:39:55:ST3_smx:INFO: Total # of broken channels: 0
13:39:55:ST3_smx:INFO: List of broken channels: []
13:39:56:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:39:59:ST3_smx:INFO: chip: 0-3 50.430383 C 1124.048640 mV
13:39:59:ST3_smx:INFO: # loops 0
13:40:01:ST3_smx:INFO: # loops 1
13:40:03:ST3_smx:INFO: # loops 2
13:40:04:ST3_smx:INFO: # loops 3
13:40:06:ST3_smx:INFO: # loops 4
13:40:08:ST3_smx:INFO: Total # of broken channels: 0
13:40:08:ST3_smx:INFO: List of broken channels: []
13:40:08:ST3_smx:INFO: Total # of broken channels: 0
13:40:08:ST3_smx:INFO: List of broken channels: []
13:40:08:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:40:12:ST3_smx:INFO: chip: 0-5 44.073563 C 1147.806000 mV
13:40:12:ST3_smx:INFO: # loops 0
13:40:14:ST3_smx:INFO: # loops 1
13:40:16:ST3_smx:INFO: # loops 2
13:40:17:ST3_smx:INFO: # loops 3
13:40:19:ST3_smx:INFO: # loops 4
13:40:21:ST3_smx:INFO: Total # of broken channels: 0
13:40:21:ST3_smx:INFO: List of broken channels: []
13:40:21:ST3_smx:INFO: Total # of broken channels: 0
13:40:21:ST3_smx:INFO: List of broken channels: []
13:40:21:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:40:25:ST3_smx:INFO: chip: 0-7 40.898880 C 1147.806000 mV
13:40:25:ST3_smx:INFO: # loops 0
13:40:27:ST3_smx:INFO: # loops 1
13:40:28:ST3_smx:INFO: # loops 2
13:40:30:ST3_smx:INFO: # loops 3
13:40:32:ST3_smx:INFO: # loops 4
13:40:33:ST3_smx:INFO: Total # of broken channels: 0
13:40:33:ST3_smx:INFO: List of broken channels: []
13:40:33:ST3_smx:INFO: Total # of broken channels: 0
13:40:33:ST3_smx:INFO: List of broken channels: []
13:40:34:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:40:34:febtest:INFO: 0-1 | XA-000-08-002-000-001-118-15 | 53.6 | 1106.2
13:40:34:febtest:INFO: 0-3 | XA-000-08-002-000-001-136-09 | 53.6 | 1124.0
13:40:35:febtest:INFO: 0-5 | XA-000-08-002-000-001-131-09 | 44.1 | 1147.8
13:40:35:febtest:INFO: 0-7 | XA-000-08-002-000-001-127-15 | 44.1 | 1141.9
13:40:38:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2070/TestDate_2023_10_19-13_39_31/