14:08:57:ST3_hmp4040:INFO:	HAMEG,HMP2030,017836163,HW50010002/SW2.30
14:08:57:febtest:INFO:	FEB8.2 selected
14:08:59:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
14:09:05:febtest:INFO:	FEB 8-2 B @ GSI
14:09:19:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
14:09:22:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:09:22:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
14:09:22:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:09:22:febtest:INFO:	Tsting FEB with SN 2071
14:09:23:smx_tester:INFO:	Scanning setup
14:09:23:elinks:INFO:	Disabling clock on downlink 0
14:09:23:elinks:INFO:	Disabling clock on downlink 1
14:09:23:elinks:INFO:	Disabling clock on downlink 2
14:09:23:elinks:INFO:	Disabling clock on downlink 3
14:09:23:elinks:INFO:	Disabling clock on downlink 4
14:09:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:09:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:09:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:09:23:elinks:INFO:	Disabling clock on downlink 0
14:09:23:elinks:INFO:	Disabling clock on downlink 1
14:09:23:elinks:INFO:	Disabling clock on downlink 2
14:09:23:elinks:INFO:	Disabling clock on downlink 3
14:09:23:elinks:INFO:	Disabling clock on downlink 4
14:09:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:09:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:09:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:09:23:elinks:INFO:	Disabling clock on downlink 0
14:09:23:elinks:INFO:	Disabling clock on downlink 1
14:09:23:elinks:INFO:	Disabling clock on downlink 2
14:09:23:elinks:INFO:	Disabling clock on downlink 3
14:09:23:elinks:INFO:	Disabling clock on downlink 4
14:09:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:09:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:09:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:09:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:09:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:09:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:09:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:09:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:09:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:09:24:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:09:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:09:24:elinks:INFO:	Disabling clock on downlink 0
14:09:24:elinks:INFO:	Disabling clock on downlink 1
14:09:24:elinks:INFO:	Disabling clock on downlink 2
14:09:24:elinks:INFO:	Disabling clock on downlink 3
14:09:24:elinks:INFO:	Disabling clock on downlink 4
14:09:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:09:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:09:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:09:24:elinks:INFO:	Disabling clock on downlink 0
14:09:24:elinks:INFO:	Disabling clock on downlink 1
14:09:24:elinks:INFO:	Disabling clock on downlink 2
14:09:24:elinks:INFO:	Disabling clock on downlink 3
14:09:24:elinks:INFO:	Disabling clock on downlink 4
14:09:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:09:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:09:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:09:24:setup_element:INFO:	Scanning clock phase
14:09:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:09:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:09:24:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:09:24:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:09:24:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
14:09:24:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:09:24:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:09:24:setup_element:INFO:	Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:09:24:setup_element:INFO:	Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:09:24:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:09:24:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
14:09:24:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
14:09:24:setup_element:INFO:	Scanning data phases
14:09:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:09:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:09:30:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:09:30:setup_element:INFO:	Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
14:09:30:setup_element:INFO:	Eye window for uplink 25: ___________XXXX_________________________
Data delay found: 32
14:09:30:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
14:09:30:setup_element:INFO:	Eye window for uplink 27: ___________XXXXX________________________
Data delay found: 33
14:09:30:setup_element:INFO:	Eye window for uplink 28: ___________XXXXXX_______________________
Data delay found: 33
14:09:30:setup_element:INFO:	Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
14:09:30:setup_element:INFO:	Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
14:09:30:setup_element:INFO:	Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
14:09:30:setup_element:INFO:	Setting the data phase to 30 for uplink 24
14:09:30:setup_element:INFO:	Setting the data phase to 32 for uplink 25
14:09:30:setup_element:INFO:	Setting the data phase to 30 for uplink 26
14:09:30:setup_element:INFO:	Setting the data phase to 33 for uplink 27
14:09:30:setup_element:INFO:	Setting the data phase to 33 for uplink 28
14:09:30:setup_element:INFO:	Setting the data phase to 35 for uplink 29
14:09:30:setup_element:INFO:	Setting the data phase to 37 for uplink 30
14:09:30:setup_element:INFO:	Setting the data phase to 35 for uplink 31
14:09:30:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 24: ______________________________________________________________________XXXXXXXXX_
      Uplink 25: ______________________________________________________________________XXXXXXXXX_
      Uplink 26: _____________________________________________________________________XXXXXXXX___
      Uplink 27: _____________________________________________________________________XXXXXXXX___
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: _____________________________________________________________________XXXXXXXX___
      Uplink 31: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 36
      Eye Window: ___________XXXX_________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
]
14:09:30:setup_element:INFO:	Beginning SMX ASICs map scan
14:09:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:09:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:09:30:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:09:30:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:09:30:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:09:30:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:09:30:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:09:30:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:09:30:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:09:31:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:09:31:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:09:31:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:09:31:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:09:32:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 24: ______________________________________________________________________XXXXXXXXX_
      Uplink 25: ______________________________________________________________________XXXXXXXXX_
      Uplink 26: _____________________________________________________________________XXXXXXXX___
      Uplink 27: _____________________________________________________________________XXXXXXXX___
      Uplink 28: _____________________________________________________________________XXXXXXXX___
      Uplink 29: _____________________________________________________________________XXXXXXXX___
      Uplink 30: _____________________________________________________________________XXXXXXXX___
      Uplink 31: _____________________________________________________________________XXXXXXXX___
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 36
      Eye Window: ___________XXXX_________________________
    Uplink 26:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 27:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 28:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 30:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 31:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________

14:09:32:setup_element:INFO:	Performing Elink synchronization
14:09:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:09:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:09:32:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:09:32:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:09:32:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:09:32:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
14:09:32:ST3_emu:INFO:	Number of chips: 4
14:09:32:ST3_emu:INFO:	Chip address:  	0x1
14:09:32:ST3_emu:INFO:	Chip address:  	0x3
14:09:32:ST3_emu:INFO:	Chip address:  	0x5
14:09:32:ST3_emu:INFO:	Chip address:  	0x7
14:09:33:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
14:09:33:febtest:INFO:	0-1 | XA-000-08-002-000-004-098-03 |  50.4 | 1147.8
14:09:34:febtest:INFO:	0-3 | XA-000-08-002-000-004-097-03 |  31.4 | 1201.0
14:09:34:febtest:INFO:	0-5 | XA-000-08-002-000-004-087-10 |  34.6 | 1201.0
14:09:34:febtest:INFO:	0-7 | XA-000-08-002-000-004-088-10 |  34.6 | 1195.1
14:09:34:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:09:38:ST3_smx:INFO:	chip: 0-1 	 40.898880 C 	 1165.571835 mV
14:09:38:ST3_smx:INFO:	# loops 0
14:09:40:ST3_smx:INFO:	# loops 1
14:09:42:ST3_smx:INFO:	# loops 2
14:09:43:ST3_smx:INFO:	# loops 3
14:09:45:ST3_smx:INFO:	# loops 4
14:09:47:ST3_smx:INFO:	Total # of broken channels: 0
14:09:47:ST3_smx:INFO:	List of broken channels: []
14:09:47:ST3_smx:INFO:	Total # of broken channels: 0
14:09:47:ST3_smx:INFO:	List of broken channels: []
14:09:47:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:09:51:ST3_smx:INFO:	chip: 0-3 	 31.389742 C 	 1177.390875 mV
14:09:51:ST3_smx:INFO:	# loops 0
14:09:53:ST3_smx:INFO:	# loops 1
14:09:55:ST3_smx:INFO:	# loops 2
14:09:56:ST3_smx:INFO:	# loops 3
14:09:58:ST3_smx:INFO:	# loops 4
14:10:00:ST3_smx:INFO:	Total # of broken channels: 0
14:10:00:ST3_smx:INFO:	List of broken channels: []
14:10:00:ST3_smx:INFO:	Total # of broken channels: 0
14:10:00:ST3_smx:INFO:	List of broken channels: []
14:10:00:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:10:04:ST3_smx:INFO:	chip: 0-5 	 34.556970 C 	 1171.483840 mV
14:10:04:ST3_smx:INFO:	# loops 0
14:10:06:ST3_smx:INFO:	# loops 1
14:10:07:ST3_smx:INFO:	# loops 2
14:10:09:ST3_smx:INFO:	# loops 3
14:10:11:ST3_smx:INFO:	# loops 4
14:10:13:ST3_smx:INFO:	Total # of broken channels: 0
14:10:13:ST3_smx:INFO:	List of broken channels: []
14:10:13:ST3_smx:INFO:	Total # of broken channels: 0
14:10:13:ST3_smx:INFO:	List of broken channels: []
14:10:13:ST3_smx:INFO:	PROCESS 1: Configuring AFE with typical values
14:10:17:ST3_smx:INFO:	chip: 0-7 	 37.726682 C 	 1153.732915 mV
14:10:17:ST3_smx:INFO:	# loops 0
14:10:19:ST3_smx:INFO:	# loops 1
14:10:20:ST3_smx:INFO:	# loops 2
14:10:22:ST3_smx:INFO:	# loops 3
14:10:24:ST3_smx:INFO:	# loops 4
14:10:25:ST3_smx:INFO:	Total # of broken channels: 0
14:10:25:ST3_smx:INFO:	List of broken channels: []
14:10:25:ST3_smx:INFO:	Total # of broken channels: 0
14:10:25:ST3_smx:INFO:	List of broken channels: []
14:10:26:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
14:10:26:febtest:INFO:	0-1 | XA-000-08-002-000-004-098-03 |  40.9 | 1159.7
14:10:27:febtest:INFO:	0-3 | XA-000-08-002-000-004-097-03 |  34.6 | 1171.5
14:10:27:febtest:INFO:	0-5 | XA-000-08-002-000-004-087-10 |  37.7 | 1165.6
14:10:27:febtest:INFO:	0-7 | XA-000-08-002-000-004-088-10 |  37.7 | 1153.7
14:10:29:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2071/TestDate_2023_10_17-14_09_22/