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FEB_2073 05.01.24 07:08:05
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07:08:03:febtest:INFO: FEB 8-2 selected
07:08:03:smx_tester:INFO: Setting Elink clock mode to 160 MHz
07:08:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:08:05:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
07:08:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:08:47:ST3_ModuleSelector:INFO: L4UL201031 M4UL2B3010313A2 62 B
07:08:47:ST3_ModuleSelector:INFO:
07:08:47:febtest:INFO: Testing FEB with SN 2073
07:08:48:smx_tester:INFO: Scanning setup
07:08:48:elinks:INFO: Disabling clock on downlink 0
07:08:48:elinks:INFO: Disabling clock on downlink 1
07:08:48:elinks:INFO: Disabling clock on downlink 2
07:08:48:elinks:INFO: Disabling clock on downlink 3
07:08:48:elinks:INFO: Disabling clock on downlink 4
07:08:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:08:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14
07:08:48:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15
07:08:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:08:48:elinks:INFO: Disabling clock on downlink 0
07:08:48:elinks:INFO: Disabling clock on downlink 1
07:08:48:elinks:INFO: Disabling clock on downlink 2
07:08:48:elinks:INFO: Disabling clock on downlink 3
07:08:48:elinks:INFO: Disabling clock on downlink 4
07:08:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:08:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:08:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:08:48:elinks:INFO: Disabling clock on downlink 0
07:08:48:elinks:INFO: Disabling clock on downlink 1
07:08:48:elinks:INFO: Disabling clock on downlink 2
07:08:48:elinks:INFO: Disabling clock on downlink 3
07:08:48:elinks:INFO: Disabling clock on downlink 4
07:08:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:08:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:08:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:08:49:elinks:INFO: Disabling clock on downlink 0
07:08:49:elinks:INFO: Disabling clock on downlink 1
07:08:49:elinks:INFO: Disabling clock on downlink 2
07:08:49:elinks:INFO: Disabling clock on downlink 3
07:08:49:elinks:INFO: Disabling clock on downlink 4
07:08:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:08:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:08:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:08:49:elinks:INFO: Disabling clock on downlink 0
07:08:49:elinks:INFO: Disabling clock on downlink 1
07:08:49:elinks:INFO: Disabling clock on downlink 2
07:08:49:elinks:INFO: Disabling clock on downlink 3
07:08:49:elinks:INFO: Disabling clock on downlink 4
07:08:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:08:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:08:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:08:49:setup_element:INFO: Scanning clock phase
07:08:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:08:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:08:49:setup_element:INFO: Clock phase scan results for group 0, downlink 0
07:08:49:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:08:49:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:08:49:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXX___
Clock Delay: 34
07:08:49:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXX___
Clock Delay: 34
07:08:49:setup_element:INFO: Eye window for uplink 4 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:08:49:setup_element:INFO: Eye window for uplink 5 : ____________________________________________________________________XXXXXXXXX___
Clock Delay: 32
07:08:49:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:08:49:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:08:49:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:08:49:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
07:08:49:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:08:49:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:08:49:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:08:49:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
07:08:49:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXXX
Clock Delay: 36
07:08:49:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXXX
Clock Delay: 36
07:08:49:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 0
07:08:49:setup_element:INFO: Scanning data phases
07:08:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:08:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:08:55:setup_element:INFO: Data phase scan results for group 0, downlink 0
07:08:55:setup_element:INFO: Eye window for uplink 0 : ________________________________XXXXXX__
Data delay found: 14
07:08:55:setup_element:INFO: Eye window for uplink 1 : _____________________________XXXXX______
Data delay found: 11
07:08:55:setup_element:INFO: Eye window for uplink 2 : _________________________________XXXXX__
Data delay found: 15
07:08:55:setup_element:INFO: Eye window for uplink 3 : _______________________________XXXXXX___
Data delay found: 13
07:08:55:setup_element:INFO: Eye window for uplink 4 : ______________________________XXXXX_____
Data delay found: 12
07:08:55:setup_element:INFO: Eye window for uplink 5 : ___________________________XXXX_________
Data delay found: 8
07:08:55:setup_element:INFO: Eye window for uplink 6 : ______________________________XXXX______
Data delay found: 11
07:08:55:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXX_________
Data delay found: 8
07:08:55:setup_element:INFO: Eye window for uplink 8 : ___________________________________XXXXX
Data delay found: 17
07:08:55:setup_element:INFO: Eye window for uplink 9 : XXXXX__________________________________X
Data delay found: 21
07:08:55:setup_element:INFO: Eye window for uplink 10: XXXXX_________________________________XX
Data delay found: 21
07:08:55:setup_element:INFO: Eye window for uplink 11: ___XXXXX________________________________
Data delay found: 25
07:08:55:setup_element:INFO: Eye window for uplink 12: _____XXXXX______________________________
Data delay found: 27
07:08:55:setup_element:INFO: Eye window for uplink 13: ________XXXXX___________________________
Data delay found: 30
07:08:55:setup_element:INFO: Eye window for uplink 14: _________XXXXX__________________________
Data delay found: 31
07:08:55:setup_element:INFO: Eye window for uplink 15: ____________XXXXX_______________________
Data delay found: 34
07:08:55:setup_element:INFO: Setting the data phase to 14 for uplink 0
07:08:55:setup_element:INFO: Setting the data phase to 11 for uplink 1
07:08:55:setup_element:INFO: Setting the data phase to 15 for uplink 2
07:08:55:setup_element:INFO: Setting the data phase to 13 for uplink 3
07:08:55:setup_element:INFO: Setting the data phase to 12 for uplink 4
07:08:55:setup_element:INFO: Setting the data phase to 8 for uplink 5
07:08:55:setup_element:INFO: Setting the data phase to 11 for uplink 6
07:08:55:setup_element:INFO: Setting the data phase to 8 for uplink 7
07:08:55:setup_element:INFO: Setting the data phase to 17 for uplink 8
07:08:55:setup_element:INFO: Setting the data phase to 21 for uplink 9
07:08:55:setup_element:INFO: Setting the data phase to 21 for uplink 10
07:08:55:setup_element:INFO: Setting the data phase to 25 for uplink 11
07:08:55:setup_element:INFO: Setting the data phase to 27 for uplink 12
07:08:55:setup_element:INFO: Setting the data phase to 30 for uplink 13
07:08:55:setup_element:INFO: Setting the data phase to 31 for uplink 14
07:08:55:setup_element:INFO: Setting the data phase to 34 for uplink 15
07:08:55:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ________________________________________________________________________XXXXX___
Uplink 3: ________________________________________________________________________XXXXX___
Uplink 4: ____________________________________________________________________XXXXXXXXX___
Uplink 5: ____________________________________________________________________XXXXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _________________________________________________________________________XXXXXXX
Uplink 15: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 1:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 2:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 3:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 4:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 5:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 6:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 7:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 8:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 9:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 10:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 11:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 12:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 13:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 14:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 15:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
]
07:08:55:setup_element:INFO: Beginning SMX ASICs map scan
07:08:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:08:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:08:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
07:08:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
07:08:55:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:08:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7
07:08:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6
07:08:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14
07:08:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15
07:08:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5
07:08:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4
07:08:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12
07:08:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13
07:08:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3
07:08:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2
07:08:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
07:08:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11
07:08:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1
07:08:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0
07:08:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8
07:08:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9
07:08:58:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 68
Eye Windows:
Uplink 0: _______________________________________________________________________XXXXXXXX_
Uplink 1: _______________________________________________________________________XXXXXXXX_
Uplink 2: ________________________________________________________________________XXXXX___
Uplink 3: ________________________________________________________________________XXXXX___
Uplink 4: ____________________________________________________________________XXXXXXXXX___
Uplink 5: ____________________________________________________________________XXXXXXXXX___
Uplink 6: ______________________________________________________________________XXXXXXXX__
Uplink 7: ______________________________________________________________________XXXXXXXX__
Uplink 8: ______________________________________________________________________XXXXXXXX__
Uplink 9: ______________________________________________________________________XXXXXXXX__
Uplink 10: _____________________________________________________________________XXXXXXXX___
Uplink 11: _____________________________________________________________________XXXXXXXX___
Uplink 12: _______________________________________________________________________XXXXXXXX_
Uplink 13: _______________________________________________________________________XXXXXXXX_
Uplink 14: _________________________________________________________________________XXXXXXX
Uplink 15: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 1:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 2:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 3:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 4:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 5:
Optimal Phase: 8
Window Length: 36
Eye Window: ___________________________XXXX_________
Uplink 6:
Optimal Phase: 11
Window Length: 36
Eye Window: ______________________________XXXX______
Uplink 7:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 8:
Optimal Phase: 17
Window Length: 35
Eye Window: ___________________________________XXXXX
Uplink 9:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 10:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 11:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 12:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 13:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 14:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 15:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
07:08:58:setup_element:INFO: Performing Elink synchronization
07:08:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:08:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:08:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
07:08:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
07:08:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
07:08:58:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:08:58:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)]
1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)]
2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)]
3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)]
4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)]
5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)]
6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)]
7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)]
07:08:59:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:08:59:febtest:INFO: 7-0 | XA-000-08-002-000-001-061-10 | 34.6 | 1189.2
07:09:00:febtest:INFO: 14-1 | XA-000-08-002-000-001-053-10 | 50.4 | 1118.1
07:09:00:febtest:INFO: 5-2 | XA-000-08-002-000-001-072-06 | 40.9 | 1159.7
07:09:00:febtest:INFO: 12-3 | XA-000-08-002-000-001-051-10 | 34.6 | 1177.4
07:09:00:febtest:INFO: 3-4 | XA-000-08-002-000-001-134-09 | 31.4 | 1183.3
07:09:01:febtest:INFO: 10-5 | XA-000-08-002-000-001-044-13 | 44.1 | 1147.8
07:09:01:febtest:INFO: 1-6 | XA-000-08-002-000-001-133-09 | 40.9 | 1153.7
07:09:01:febtest:INFO: 8-7 | XA-000-08-002-000-001-066-06 | 47.3 | 1124.0
07:09:01:ST3_smx:INFO: Configuring SMX FAST
07:09:03:ST3_smx:INFO: chip: 7-0 34.556970 C 1183.292940 mV
07:09:03:ST3_smx:INFO: Electrons
07:09:03:ST3_smx:INFO: # loops 0
07:09:05:ST3_smx:INFO: # loops 1
07:09:07:ST3_smx:INFO: # loops 2
07:09:08:ST3_smx:INFO: # loops 3
07:09:10:ST3_smx:INFO: # loops 4
07:09:11:ST3_smx:INFO: Total # of broken channels: 0
07:09:11:ST3_smx:INFO: List of broken channels: []
07:09:11:ST3_smx:INFO: Total # of broken channels: 0
07:09:11:ST3_smx:INFO: List of broken channels: []
07:09:12:ST3_smx:INFO: Configuring SMX FAST
07:09:14:ST3_smx:INFO: chip: 14-1 53.612520 C 1112.140140 mV
07:09:14:ST3_smx:INFO: Electrons
07:09:14:ST3_smx:INFO: # loops 0
07:09:15:ST3_smx:INFO: # loops 1
07:09:17:ST3_smx:INFO: # loops 2
07:09:19:ST3_smx:INFO: # loops 3
07:09:20:ST3_smx:INFO: # loops 4
07:09:22:ST3_smx:INFO: Total # of broken channels: 2
07:09:22:ST3_smx:INFO: List of broken channels: [20, 120]
07:09:22:ST3_smx:INFO: Total # of broken channels: 3
07:09:22:ST3_smx:INFO: List of broken channels: [14, 20, 120]
07:09:22:ST3_smx:INFO: Configuring SMX FAST
07:09:24:ST3_smx:INFO: chip: 5-2 47.250730 C 1159.654860 mV
07:09:24:ST3_smx:INFO: Electrons
07:09:24:ST3_smx:INFO: # loops 0
07:09:26:ST3_smx:INFO: # loops 1
07:09:27:ST3_smx:INFO: # loops 2
07:09:29:ST3_smx:INFO: # loops 3
07:09:30:ST3_smx:INFO: # loops 4
07:09:32:ST3_smx:INFO: Total # of broken channels: 0
07:09:32:ST3_smx:INFO: List of broken channels: []
07:09:32:ST3_smx:INFO: Total # of broken channels: 0
07:09:32:ST3_smx:INFO: List of broken channels: []
07:09:32:ST3_smx:INFO: Configuring SMX FAST
07:09:34:ST3_smx:INFO: chip: 12-3 44.073563 C 1159.654860 mV
07:09:34:ST3_smx:INFO: Electrons
07:09:34:ST3_smx:INFO: # loops 0
07:09:36:ST3_smx:INFO: # loops 1
07:09:37:ST3_smx:INFO: # loops 2
07:09:39:ST3_smx:INFO: # loops 3
07:09:40:ST3_smx:INFO: # loops 4
07:09:42:ST3_smx:INFO: Total # of broken channels: 1
07:09:42:ST3_smx:INFO: List of broken channels: [0]
07:09:42:ST3_smx:INFO: Total # of broken channels: 1
07:09:42:ST3_smx:INFO: List of broken channels: [0]
07:09:42:ST3_smx:INFO: Configuring SMX FAST
07:09:44:ST3_smx:INFO: chip: 3-4 40.898880 C 1171.483840 mV
07:09:44:ST3_smx:INFO: Electrons
07:09:44:ST3_smx:INFO: # loops 0
07:09:46:ST3_smx:INFO: # loops 1
07:09:48:ST3_smx:INFO: # loops 2
07:09:49:ST3_smx:INFO: # loops 3
07:09:51:ST3_smx:INFO: # loops 4
07:09:52:ST3_smx:INFO: Total # of broken channels: 0
07:09:52:ST3_smx:INFO: List of broken channels: []
07:09:52:ST3_smx:INFO: Total # of broken channels: 0
07:09:52:ST3_smx:INFO: List of broken channels: []
07:09:53:ST3_smx:INFO: Configuring SMX FAST
07:09:55:ST3_smx:INFO: chip: 10-5 47.250730 C 1147.806000 mV
07:09:55:ST3_smx:INFO: Electrons
07:09:55:ST3_smx:INFO: # loops 0
07:09:56:ST3_smx:INFO: # loops 1
07:09:58:ST3_smx:INFO: # loops 2
07:09:59:ST3_smx:INFO: # loops 3
07:10:01:ST3_smx:INFO: # loops 4
07:10:02:ST3_smx:INFO: Total # of broken channels: 0
07:10:02:ST3_smx:INFO: List of broken channels: []
07:10:02:ST3_smx:INFO: Total # of broken channels: 0
07:10:02:ST3_smx:INFO: List of broken channels: []
07:10:03:ST3_smx:INFO: Configuring SMX FAST
07:10:05:ST3_smx:INFO: chip: 1-6 37.726682 C 1177.390875 mV
07:10:05:ST3_smx:INFO: Electrons
07:10:05:ST3_smx:INFO: # loops 0
07:10:06:ST3_smx:INFO: # loops 1
07:10:08:ST3_smx:INFO: # loops 2
07:10:09:ST3_smx:INFO: # loops 3
07:10:11:ST3_smx:INFO: # loops 4
07:10:12:ST3_smx:INFO: Total # of broken channels: 0
07:10:12:ST3_smx:INFO: List of broken channels: []
07:10:12:ST3_smx:INFO: Total # of broken channels: 0
07:10:12:ST3_smx:INFO: List of broken channels: []
07:10:13:ST3_smx:INFO: Configuring SMX FAST
07:10:14:ST3_smx:INFO: chip: 8-7 53.612520 C 1118.096875 mV
07:10:14:ST3_smx:INFO: Electrons
07:10:14:ST3_smx:INFO: # loops 0
07:10:16:ST3_smx:INFO: # loops 1
07:10:18:ST3_smx:INFO: # loops 2
07:10:19:ST3_smx:INFO: # loops 3
07:10:21:ST3_smx:INFO: # loops 4
07:10:22:ST3_smx:INFO: Total # of broken channels: 0
07:10:22:ST3_smx:INFO: List of broken channels: []
07:10:22:ST3_smx:INFO: Total # of broken channels: 0
07:10:22:ST3_smx:INFO: List of broken channels: []
07:10:23:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:10:23:febtest:INFO: 7-0 | XA-000-08-002-000-001-061-10 | 40.9 | 1183.3
07:10:23:febtest:INFO: 14-1 | XA-000-08-002-000-001-053-10 | 60.0 | 1112.1
07:10:23:febtest:INFO: 5-2 | XA-000-08-002-000-001-072-06 | 47.3 | 1159.7
07:10:24:febtest:INFO: 12-3 | XA-000-08-002-000-001-051-10 | 47.3 | 1159.7
07:10:24:febtest:INFO: 3-4 | XA-000-08-002-000-001-134-09 | 40.9 | 1171.5
07:10:24:febtest:INFO: 10-5 | XA-000-08-002-000-001-044-13 | 47.3 | 1147.8
07:10:24:febtest:INFO: 1-6 | XA-000-08-002-000-001-133-09 | 37.7 | 1177.4
07:10:25:febtest:INFO: 8-7 | XA-000-08-002-000-001-066-06 | 53.6 | 1118.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_05-07_08_05
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL201031 M4UL2B3010313A2 62 B
FEB_SN : 2073
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:
MODULE_NAME: L4UL201031 M4UL2B3010313A2 62 B
MODULE_TYPE:
MODULE_LADDER: L4UL201031
MODULE_MODULE: M4UL2B3010313A2
MODULE_SIZE: 62
MODULE_GRADE: B
---------------------------------------
VI_before_Init : ['2.450', '1.8810', '1.850', '0.4308', '7.000', '1.5500', '7.000', '1.5500']
VI_after__Init : ['2.450', '2.0070', '1.850', '0.5850', '7.000', '1.5510', '7.000', '1.5510']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
07:11:18:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2073/TestDate_2024_01_05-07_08_05/