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FEB_2073 19.10.23 13:30:27
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13:27:24:ST3_Shared:INFO: Listo of operators:Kerstin S.;
13:30:15:febtest:INFO: FEB 8-2 B @ GSI
13:30:23:smx_tester:INFO: Setting Elink clock mode to 160 MHz
13:30:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:30:27:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
13:30:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:30:27:febtest:INFO: Tsting FEB with SN 2073
13:30:28:smx_tester:INFO: Scanning setup
13:30:28:elinks:INFO: Disabling clock on downlink 0
13:30:28:elinks:INFO: Disabling clock on downlink 1
13:30:28:elinks:INFO: Disabling clock on downlink 2
13:30:28:elinks:INFO: Disabling clock on downlink 3
13:30:28:elinks:INFO: Disabling clock on downlink 4
13:30:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:30:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:29:elinks:INFO: Disabling clock on downlink 0
13:30:29:elinks:INFO: Disabling clock on downlink 1
13:30:29:elinks:INFO: Disabling clock on downlink 2
13:30:29:elinks:INFO: Disabling clock on downlink 3
13:30:29:elinks:INFO: Disabling clock on downlink 4
13:30:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:29:elinks:INFO: Disabling clock on downlink 0
13:30:29:elinks:INFO: Disabling clock on downlink 1
13:30:29:elinks:INFO: Disabling clock on downlink 2
13:30:29:elinks:INFO: Disabling clock on downlink 3
13:30:29:elinks:INFO: Disabling clock on downlink 4
13:30:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:30:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:30:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:30:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:30:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:30:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:30:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:30:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:30:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:30:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:29:elinks:INFO: Disabling clock on downlink 0
13:30:29:elinks:INFO: Disabling clock on downlink 1
13:30:29:elinks:INFO: Disabling clock on downlink 2
13:30:29:elinks:INFO: Disabling clock on downlink 3
13:30:29:elinks:INFO: Disabling clock on downlink 4
13:30:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:30:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:29:elinks:INFO: Disabling clock on downlink 0
13:30:29:elinks:INFO: Disabling clock on downlink 1
13:30:29:elinks:INFO: Disabling clock on downlink 2
13:30:29:elinks:INFO: Disabling clock on downlink 3
13:30:29:elinks:INFO: Disabling clock on downlink 4
13:30:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:30:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:29:setup_element:INFO: Scanning clock phase
13:30:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:30:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:30:30:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:30:30:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:30:30:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
13:30:30:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:30:30:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
13:30:30:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:30:30:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
13:30:30:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:30:30:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:30:30:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
13:30:30:setup_element:INFO: Scanning data phases
13:30:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:30:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:30:35:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:30:35:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
13:30:35:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
13:30:35:setup_element:INFO: Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
13:30:35:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
13:30:35:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________
Data delay found: 33
13:30:35:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
13:30:35:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
13:30:35:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
13:30:35:setup_element:INFO: Setting the data phase to 26 for uplink 24
13:30:35:setup_element:INFO: Setting the data phase to 29 for uplink 25
13:30:35:setup_element:INFO: Setting the data phase to 27 for uplink 26
13:30:35:setup_element:INFO: Setting the data phase to 31 for uplink 27
13:30:35:setup_element:INFO: Setting the data phase to 33 for uplink 28
13:30:35:setup_element:INFO: Setting the data phase to 35 for uplink 29
13:30:35:setup_element:INFO: Setting the data phase to 36 for uplink 30
13:30:35:setup_element:INFO: Setting the data phase to 35 for uplink 31
13:30:35:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: _______________________________________________________________________XXXXXXX__
Uplink 31: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
]
13:30:35:setup_element:INFO: Beginning SMX ASICs map scan
13:30:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:30:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:30:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:30:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:30:35:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:30:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:30:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:30:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:30:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:30:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:30:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:30:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:30:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:30:38:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXXX__
Uplink 25: _____________________________________________________________________XXXXXXXXX__
Uplink 26: _____________________________________________________________________XXXXXXXX___
Uplink 27: _____________________________________________________________________XXXXXXXX___
Uplink 28: ______________________________________________________________________XXXXXXXX__
Uplink 29: ______________________________________________________________________XXXXXXXX__
Uplink 30: _______________________________________________________________________XXXXXXX__
Uplink 31: _______________________________________________________________________XXXXXXX__
Data phase characteristics:
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
13:30:38:setup_element:INFO: Performing Elink synchronization
13:30:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:30:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:30:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:30:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:30:38:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:30:38:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
13:30:38:ST3_emu:INFO: Number of chips: 4
13:30:38:ST3_emu:INFO: Chip address: 0x1
13:30:38:ST3_emu:INFO: Chip address: 0x3
13:30:38:ST3_emu:INFO: Chip address: 0x5
13:30:38:ST3_emu:INFO: Chip address: 0x7
13:30:38:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:30:38:febtest:INFO: 0-1 | XA-000-08-002-000-001-053-10 | 53.6 | 1118.1
13:30:39:febtest:INFO: 0-3 | XA-000-08-002-000-001-051-10 | 37.7 | 1177.4
13:30:39:febtest:INFO: 0-5 | XA-000-08-002-000-001-044-13 | 50.4 | 1135.9
13:30:39:febtest:INFO: 0-7 | XA-000-08-002-000-001-066-06 | 53.6 | 1118.1
13:30:39:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:30:43:ST3_smx:INFO: chip: 0-1 56.797143 C 1100.211760 mV
13:30:43:ST3_smx:INFO: # loops 0
13:30:45:ST3_smx:INFO: # loops 1
13:30:46:ST3_smx:INFO: # loops 2
13:30:48:ST3_smx:INFO: # loops 3
13:30:50:ST3_smx:INFO: # loops 4
13:30:51:ST3_smx:INFO: Total # of broken channels: 0
13:30:51:ST3_smx:INFO: List of broken channels: []
13:30:51:ST3_smx:INFO: Total # of broken channels: 0
13:30:51:ST3_smx:INFO: List of broken channels: []
13:30:52:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:30:56:ST3_smx:INFO: chip: 0-3 40.898880 C 1153.732915 mV
13:30:56:ST3_smx:INFO: # loops 0
13:30:57:ST3_smx:INFO: # loops 1
13:30:59:ST3_smx:INFO: # loops 2
13:31:01:ST3_smx:INFO: # loops 3
13:31:02:ST3_smx:INFO: # loops 4
13:31:04:ST3_smx:INFO: Total # of broken channels: 0
13:31:04:ST3_smx:INFO: List of broken channels: []
13:31:04:ST3_smx:INFO: Total # of broken channels: 0
13:31:04:ST3_smx:INFO: List of broken channels: []
13:31:05:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:31:08:ST3_smx:INFO: chip: 0-5 50.430383 C 1124.048640 mV
13:31:08:ST3_smx:INFO: # loops 0
13:31:10:ST3_smx:INFO: # loops 1
13:31:11:ST3_smx:INFO: # loops 2
13:31:13:ST3_smx:INFO: # loops 3
13:31:15:ST3_smx:INFO: # loops 4
13:31:17:ST3_smx:INFO: Total # of broken channels: 0
13:31:17:ST3_smx:INFO: List of broken channels: []
13:31:17:ST3_smx:INFO: Total # of broken channels: 0
13:31:17:ST3_smx:INFO: List of broken channels: []
13:31:17:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
13:31:21:ST3_smx:INFO: chip: 0-7 56.797143 C 1094.240115 mV
13:31:21:ST3_smx:INFO: # loops 0
13:31:23:ST3_smx:INFO: # loops 1
13:31:24:ST3_smx:INFO: # loops 2
13:31:26:ST3_smx:INFO: # loops 3
13:31:28:ST3_smx:INFO: # loops 4
13:31:29:ST3_smx:INFO: Total # of broken channels: 0
13:31:29:ST3_smx:INFO: List of broken channels: []
13:31:29:ST3_smx:INFO: Total # of broken channels: 0
13:31:29:ST3_smx:INFO: List of broken channels: []
13:31:30:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
13:31:30:febtest:INFO: 0-1 | XA-000-08-002-000-001-053-10 | 60.0 | 1094.2
13:31:30:febtest:INFO: 0-3 | XA-000-08-002-000-001-051-10 | 44.1 | 1141.9
13:31:31:febtest:INFO: 0-5 | XA-000-08-002-000-001-044-13 | 50.4 | 1118.1
13:31:31:febtest:INFO: 0-7 | XA-000-08-002-000-001-066-06 | 56.8 | 1094.2
13:31:37:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2073/TestDate_2023_10_19-13_30_27/