FEB_2077 05.01.24 10:25:35
Info
10:25:32:febtest:INFO: FEB 8-2 selected
10:25:32:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:25:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:25:35:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:25:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:25:36:febtest:INFO: Testing FEB with SN 2077
10:25:37:smx_tester:INFO: Scanning setup
10:25:37:elinks:INFO: Disabling clock on downlink 0
10:25:37:elinks:INFO: Disabling clock on downlink 1
10:25:37:elinks:INFO: Disabling clock on downlink 2
10:25:37:elinks:INFO: Disabling clock on downlink 3
10:25:37:elinks:INFO: Disabling clock on downlink 4
10:25:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:25:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:25:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:25:37:elinks:INFO: Disabling clock on downlink 0
10:25:37:elinks:INFO: Disabling clock on downlink 1
10:25:37:elinks:INFO: Disabling clock on downlink 2
10:25:37:elinks:INFO: Disabling clock on downlink 3
10:25:37:elinks:INFO: Disabling clock on downlink 4
10:25:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:25:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:25:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:25:37:elinks:INFO: Disabling clock on downlink 0
10:25:37:elinks:INFO: Disabling clock on downlink 1
10:25:37:elinks:INFO: Disabling clock on downlink 2
10:25:37:elinks:INFO: Disabling clock on downlink 3
10:25:37:elinks:INFO: Disabling clock on downlink 4
10:25:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:25:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:25:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:25:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:25:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:25:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:25:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:25:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:25:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:25:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:25:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:25:37:elinks:INFO: Disabling clock on downlink 0
10:25:37:elinks:INFO: Disabling clock on downlink 1
10:25:37:elinks:INFO: Disabling clock on downlink 2
10:25:37:elinks:INFO: Disabling clock on downlink 3
10:25:37:elinks:INFO: Disabling clock on downlink 4
10:25:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:25:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:25:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:25:37:elinks:INFO: Disabling clock on downlink 0
10:25:37:elinks:INFO: Disabling clock on downlink 1
10:25:37:elinks:INFO: Disabling clock on downlink 2
10:25:37:elinks:INFO: Disabling clock on downlink 3
10:25:37:elinks:INFO: Disabling clock on downlink 4
10:25:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:25:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:25:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:25:38:setup_element:INFO: Scanning clock phase
10:25:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:25:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:25:38:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:25:38:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:25:38:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:25:38:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:25:38:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:25:38:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:25:38:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:25:38:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
10:25:38:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
10:25:38:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
10:25:38:setup_element:INFO: Scanning data phases
10:25:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:25:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:25:43:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:25:43:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
10:25:43:setup_element:INFO: Eye window for uplink 25: __________XXXX__________________________
Data delay found: 31
10:25:43:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
10:25:43:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
10:25:43:setup_element:INFO: Eye window for uplink 28: ____________XXXX________________________
Data delay found: 33
10:25:43:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
10:25:43:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
10:25:43:setup_element:INFO: Eye window for uplink 31: _____________XXXX_______________________
Data delay found: 34
10:25:43:setup_element:INFO: Setting the data phase to 28 for uplink 24
10:25:43:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:25:43:setup_element:INFO: Setting the data phase to 29 for uplink 26
10:25:43:setup_element:INFO: Setting the data phase to 32 for uplink 27
10:25:43:setup_element:INFO: Setting the data phase to 33 for uplink 28
10:25:43:setup_element:INFO: Setting the data phase to 35 for uplink 29
10:25:43:setup_element:INFO: Setting the data phase to 36 for uplink 30
10:25:43:setup_element:INFO: Setting the data phase to 34 for uplink 31
10:25:43:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 72
Eye Windows:
Uplink 24: ______________________________________________________________________XXXXXXX___
Uplink 25: ______________________________________________________________________XXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXX___
Uplink 29: ______________________________________________________________________XXXXXXX___
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
]
10:25:43:setup_element:INFO: Beginning SMX ASICs map scan
10:25:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:25:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:25:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:25:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:25:43:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:25:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:25:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:25:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:25:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:25:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:25:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:25:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:25:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:25:46:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 72
Eye Windows:
Uplink 24: ______________________________________________________________________XXXXXXX___
Uplink 25: ______________________________________________________________________XXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: ______________________________________________________________________XXXXXXX___
Uplink 29: ______________________________________________________________________XXXXXXX___
Uplink 30: ________________________________________________________________________________
Uplink 31: ________________________________________________________________________________
Data phase characteristics:
Uplink 24:
Optimal Phase: 28
Window Length: 34
Eye Window: ______XXXXXX____________________________
Uplink 25:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 29:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 30:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 31:
Optimal Phase: 34
Window Length: 36
Eye Window: _____________XXXX_______________________
10:25:46:setup_element:INFO: Performing Elink synchronization
10:25:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:25:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:25:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:25:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:25:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:25:46:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
10:25:46:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
10:25:47:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:25:47:febtest:INFO: 30-1 | XA-000-08-002-001-008-018-13 | 28.2 | 1218.6
10:25:47:febtest:INFO: 28-3 | XA-000-08-002-001-008-017-13 | 50.4 | 1147.8
10:25:47:febtest:INFO: 26-5 | XA-000-08-002-002-008-051-02 | 37.7 | 1183.3
10:25:48:febtest:INFO: 24-7 | XA-000-08-002-002-008-057-02 | 31.4 | 1195.1
10:25:48:ST3_smx:INFO: Configuring SMX FAST
10:25:50:ST3_smx:INFO: chip: 30-1 28.225000 C 1224.468235 mV
10:25:50:ST3_smx:INFO: Electrons
10:25:50:ST3_smx:INFO: # loops 0
10:25:51:ST3_smx:INFO: # loops 1
10:25:53:ST3_smx:INFO: # loops 2
10:25:55:ST3_smx:INFO: # loops 3
10:25:56:ST3_smx:INFO: # loops 4
10:25:58:ST3_smx:INFO: Total # of broken channels: 0
10:25:58:ST3_smx:INFO: List of broken channels: []
10:25:58:ST3_smx:INFO: Total # of broken channels: 0
10:25:58:ST3_smx:INFO: List of broken channels: []
10:25:59:ST3_smx:INFO: Configuring SMX FAST
10:26:01:ST3_smx:INFO: chip: 28-3 44.073563 C 1171.483840 mV
10:26:01:ST3_smx:INFO: Electrons
10:26:01:ST3_smx:INFO: # loops 0
10:26:02:ST3_smx:INFO: # loops 1
10:26:04:ST3_smx:INFO: # loops 2
10:26:06:ST3_smx:INFO: # loops 3
10:26:07:ST3_smx:INFO: # loops 4
10:26:09:ST3_smx:INFO: Total # of broken channels: 0
10:26:09:ST3_smx:INFO: List of broken channels: []
10:26:09:ST3_smx:INFO: Total # of broken channels: 0
10:26:09:ST3_smx:INFO: List of broken channels: []
10:26:10:ST3_smx:INFO: Configuring SMX FAST
10:26:12:ST3_smx:INFO: chip: 26-5 34.556970 C 1189.190035 mV
10:26:12:ST3_smx:INFO: Electrons
10:26:12:ST3_smx:INFO: # loops 0
10:26:13:ST3_smx:INFO: # loops 1
10:26:15:ST3_smx:INFO: # loops 2
10:26:17:ST3_smx:INFO: # loops 3
10:26:18:ST3_smx:INFO: # loops 4
10:26:20:ST3_smx:INFO: Total # of broken channels: 0
10:26:20:ST3_smx:INFO: List of broken channels: []
10:26:20:ST3_smx:INFO: Total # of broken channels: 0
10:26:20:ST3_smx:INFO: List of broken channels: []
10:26:21:ST3_smx:INFO: Configuring SMX FAST
10:26:23:ST3_smx:INFO: chip: 24-7 34.556970 C 1183.292940 mV
10:26:23:ST3_smx:INFO: Electrons
10:26:23:ST3_smx:INFO: # loops 0
10:26:24:ST3_smx:INFO: # loops 1
10:26:26:ST3_smx:INFO: # loops 2
10:26:28:ST3_smx:INFO: # loops 3
10:26:29:ST3_smx:INFO: # loops 4
10:26:31:ST3_smx:INFO: Total # of broken channels: 0
10:26:31:ST3_smx:INFO: List of broken channels: []
10:26:31:ST3_smx:INFO: Total # of broken channels: 0
10:26:31:ST3_smx:INFO: List of broken channels: []
10:26:31:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:26:32:febtest:INFO: 30-1 | XA-000-08-002-001-008-018-13 | 28.2 | 1224.5
10:26:32:febtest:INFO: 28-3 | XA-000-08-002-001-008-017-13 | 44.1 | 1171.5
10:26:32:febtest:INFO: 26-5 | XA-000-08-002-002-008-051-02 | 37.7 | 1189.2
10:26:32:febtest:INFO: 24-7 | XA-000-08-002-002-008-057-02 | 34.6 | 1183.3
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_05-10_25_35
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4UL201031 M4UL2B3010313A2 62 B
FEB_SN : 2077
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '1.0300', '1.847', '1.4160', '7.001', '1.5500', '7.001', '1.5500']
VI_after__Init : ['2.450', '2.0070', '1.850', '0.5850', '7.000', '1.5510', '7.000', '1.5510']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:26:33:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2077/TestDate_2024_01_05-10_25_35/