09:05:34:febtest:INFO:	FEB 8-2 selected
09:05:34:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
09:05:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:05:39:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:05:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:06:10:ST3_ModuleSelector:INFO:	L4UL001055 M4UL0B1010551A2 42 A

09:06:10:ST3_ModuleSelector:INFO:	13362

09:06:10:febtest:INFO:	Testing FEB with SN 2078
09:06:11:smx_tester:INFO:	Scanning setup
09:06:11:elinks:INFO:	Disabling clock on downlink 0
09:06:11:elinks:INFO:	Disabling clock on downlink 1
09:06:11:elinks:INFO:	Disabling clock on downlink 2
09:06:11:elinks:INFO:	Disabling clock on downlink 3
09:06:11:elinks:INFO:	Disabling clock on downlink 4
09:06:11:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:06:11:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:11:elinks:INFO:	Disabling clock on downlink 0
09:06:11:elinks:INFO:	Disabling clock on downlink 1
09:06:11:elinks:INFO:	Disabling clock on downlink 2
09:06:11:elinks:INFO:	Disabling clock on downlink 3
09:06:11:elinks:INFO:	Disabling clock on downlink 4
09:06:11:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:11:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:06:11:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:11:elinks:INFO:	Disabling clock on downlink 0
09:06:11:elinks:INFO:	Disabling clock on downlink 1
09:06:11:elinks:INFO:	Disabling clock on downlink 2
09:06:11:elinks:INFO:	Disabling clock on downlink 3
09:06:11:elinks:INFO:	Disabling clock on downlink 4
09:06:12:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:06:12:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:06:12:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:12:elinks:INFO:	Disabling clock on downlink 0
09:06:12:elinks:INFO:	Disabling clock on downlink 1
09:06:12:elinks:INFO:	Disabling clock on downlink 2
09:06:12:elinks:INFO:	Disabling clock on downlink 3
09:06:12:elinks:INFO:	Disabling clock on downlink 4
09:06:12:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:06:12:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:12:elinks:INFO:	Disabling clock on downlink 0
09:06:12:elinks:INFO:	Disabling clock on downlink 1
09:06:12:elinks:INFO:	Disabling clock on downlink 2
09:06:12:elinks:INFO:	Disabling clock on downlink 3
09:06:12:elinks:INFO:	Disabling clock on downlink 4
09:06:12:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:06:12:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:12:setup_element:INFO:	Scanning clock phase
09:06:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:06:12:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:06:12:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:06:12:setup_element:INFO:	Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 17: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:06:12:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:06:12:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:12:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:12:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
09:06:12:setup_element:INFO:	Scanning data phases
09:06:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:06:12:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:06:18:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:06:18:setup_element:INFO:	Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
09:06:18:setup_element:INFO:	Eye window for uplink 17: ________________________________XXXX____
Data delay found: 13
09:06:18:setup_element:INFO:	Eye window for uplink 18: X_________________________________XXXXX_
Data delay found: 17
09:06:18:setup_element:INFO:	Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
09:06:18:setup_element:INFO:	Eye window for uplink 20: ___________________________________XXXXX
Data delay found: 17
09:06:18:setup_element:INFO:	Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
09:06:18:setup_element:INFO:	Eye window for uplink 22: __________________________________XXXX__
Data delay found: 15
09:06:18:setup_element:INFO:	Eye window for uplink 23: ________________________________XXXXX___
Data delay found: 14
09:06:18:setup_element:INFO:	Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
09:06:18:setup_element:INFO:	Eye window for uplink 25: _______XXXX_____________________________
Data delay found: 28
09:06:18:setup_element:INFO:	Eye window for uplink 26: _____XXXX_______________________________
Data delay found: 26
09:06:18:setup_element:INFO:	Eye window for uplink 27: ________XXXXX___________________________
Data delay found: 30
09:06:18:setup_element:INFO:	Eye window for uplink 28: _________XXXXXX_________________________
Data delay found: 31
09:06:18:setup_element:INFO:	Eye window for uplink 29: ___________XXXXX________________________
Data delay found: 33
09:06:18:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
09:06:18:setup_element:INFO:	Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
09:06:18:setup_element:INFO:	Setting the data phase to 18 for uplink 16
09:06:18:setup_element:INFO:	Setting the data phase to 13 for uplink 17
09:06:18:setup_element:INFO:	Setting the data phase to 17 for uplink 18
09:06:18:setup_element:INFO:	Setting the data phase to 14 for uplink 19
09:06:18:setup_element:INFO:	Setting the data phase to 17 for uplink 20
09:06:18:setup_element:INFO:	Setting the data phase to 16 for uplink 21
09:06:18:setup_element:INFO:	Setting the data phase to 15 for uplink 22
09:06:18:setup_element:INFO:	Setting the data phase to 14 for uplink 23
09:06:18:setup_element:INFO:	Setting the data phase to 26 for uplink 24
09:06:18:setup_element:INFO:	Setting the data phase to 28 for uplink 25
09:06:18:setup_element:INFO:	Setting the data phase to 26 for uplink 26
09:06:18:setup_element:INFO:	Setting the data phase to 30 for uplink 27
09:06:18:setup_element:INFO:	Setting the data phase to 31 for uplink 28
09:06:18:setup_element:INFO:	Setting the data phase to 33 for uplink 29
09:06:18:setup_element:INFO:	Setting the data phase to 35 for uplink 30
09:06:18:setup_element:INFO:	Setting the data phase to 34 for uplink 31
09:06:18:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 71
    Eye Windows:
      Uplink 16: _______________________________________________________________________XXXXXXX__
      Uplink 17: _______________________________________________________________________XXXXXXX__
      Uplink 18: _______________________________________________________________________XXXXXXX__
      Uplink 19: _______________________________________________________________________XXXXXXX__
      Uplink 20: ______________________________________________________________________XXXXXXXXX_
      Uplink 21: ______________________________________________________________________XXXXXXXXX_
      Uplink 22: ______________________________________________________________________XXXXXXXXX_
      Uplink 23: ______________________________________________________________________XXXXXXXXX_
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: _______________________________________________________________________XXXXXXX__
      Uplink 27: _______________________________________________________________________XXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXX__
      Uplink 29: _______________________________________________________________________XXXXXXX__
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 17:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 18:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 19:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 20:
      Optimal Phase: 17
      Window Length: 35
      Eye Window: ___________________________________XXXXX
    Uplink 21:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 22:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 23:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 24:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 25:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 26:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 27:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
]
09:06:18:setup_element:INFO:	Beginning SMX ASICs map scan
09:06:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:06:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:06:18:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:06:18:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:06:18:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:06:18:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:06:18:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:06:18:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:06:18:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:06:18:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:06:18:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:06:18:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:06:18:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:06:19:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:06:19:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:06:19:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:06:19:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:06:19:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:06:19:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:06:19:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:06:19:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:06:21:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 71
    Eye Windows:
      Uplink 16: _______________________________________________________________________XXXXXXX__
      Uplink 17: _______________________________________________________________________XXXXXXX__
      Uplink 18: _______________________________________________________________________XXXXXXX__
      Uplink 19: _______________________________________________________________________XXXXXXX__
      Uplink 20: ______________________________________________________________________XXXXXXXXX_
      Uplink 21: ______________________________________________________________________XXXXXXXXX_
      Uplink 22: ______________________________________________________________________XXXXXXXXX_
      Uplink 23: ______________________________________________________________________XXXXXXXXX_
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: _______________________________________________________________________XXXXXXX__
      Uplink 27: _______________________________________________________________________XXXXXXX__
      Uplink 28: _______________________________________________________________________XXXXXXX__
      Uplink 29: _______________________________________________________________________XXXXXXX__
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 17:
      Optimal Phase: 13
      Window Length: 36
      Eye Window: ________________________________XXXX____
    Uplink 18:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 19:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 20:
      Optimal Phase: 17
      Window Length: 35
      Eye Window: ___________________________________XXXXX
    Uplink 21:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 22:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 23:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 24:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 25:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 26:
      Optimal Phase: 26
      Window Length: 36
      Eye Window: _____XXXX_______________________________
    Uplink 27:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 35
      Eye Window: ___________XXXXX________________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________

09:06:21:setup_element:INFO:	Performing Elink synchronization
09:06:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:06:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:06:21:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:06:21:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:06:21:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:06:21:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:06:21:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
09:06:21:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:06:22:febtest:INFO:	23-0 | XA-000-08-002-000-007-108-13 |  44.1 | 1171.5
09:06:22:febtest:INFO:	30-1 | XA-000-08-002-000-007-000-06 |  -0.1 | 1329.2
09:06:22:febtest:INFO:	21-2 | XA-000-08-002-000-007-103-13 |  40.9 | 1183.3
09:06:22:febtest:INFO:	28-3 | XA-000-08-002-000-007-006-06 |  21.9 | 1247.9
09:06:23:febtest:INFO:	19-4 | XA-000-08-002-000-007-009-06 |  44.1 | 1165.6
09:06:23:febtest:INFO:	26-5 | XA-000-08-002-000-007-091-04 |  31.4 | 1212.7
09:06:23:febtest:INFO:	17-6 | XA-000-08-002-000-007-089-04 |  34.6 | 1201.0
09:06:23:febtest:INFO:	24-7 | XA-000-08-002-000-007-092-04 |  28.2 | 1230.3
09:06:24:ST3_smx:INFO:	Configuring SMX FAST
09:06:26:ST3_smx:INFO:	chip: 23-0 	 47.250730 C 	 1159.654860 mV
09:06:26:ST3_smx:INFO:		Electrons
09:06:26:ST3_smx:INFO:	# loops 0
09:06:27:ST3_smx:INFO:	# loops 1
09:06:29:ST3_smx:INFO:	# loops 2
09:06:30:ST3_smx:INFO:	# loops 3
09:06:32:ST3_smx:INFO:	# loops 4
09:06:34:ST3_smx:INFO:	Total # of broken channels: 0
09:06:34:ST3_smx:INFO:	List of broken channels: []
09:06:34:ST3_smx:INFO:	Total # of broken channels: 0
09:06:34:ST3_smx:INFO:	List of broken channels: []
09:06:34:ST3_smx:INFO:	Configuring SMX FAST
09:06:36:ST3_smx:INFO:	chip: 30-1 	 9.288730 C 	 1306.088235 mV
09:06:36:ST3_smx:INFO:		Electrons
09:06:36:ST3_smx:INFO:	# loops 0
09:06:38:ST3_smx:INFO:	# loops 1
09:06:39:ST3_smx:INFO:	# loops 2
09:06:41:ST3_smx:INFO:	# loops 3
09:06:42:ST3_smx:INFO:	# loops 4
09:06:44:ST3_smx:INFO:	Total # of broken channels: 0
09:06:44:ST3_smx:INFO:	List of broken channels: []
09:06:44:ST3_smx:INFO:	Total # of broken channels: 0
09:06:44:ST3_smx:INFO:	List of broken channels: []
09:06:44:ST3_smx:INFO:	Configuring SMX FAST
09:06:46:ST3_smx:INFO:	chip: 21-2 	 44.073563 C 	 1189.190035 mV
09:06:46:ST3_smx:INFO:		Electrons
09:06:46:ST3_smx:INFO:	# loops 0
09:06:48:ST3_smx:INFO:	# loops 1
09:06:49:ST3_smx:INFO:	# loops 2
09:06:51:ST3_smx:INFO:	# loops 3
09:06:52:ST3_smx:INFO:	# loops 4
09:06:54:ST3_smx:INFO:	Total # of broken channels: 0
09:06:54:ST3_smx:INFO:	List of broken channels: []
09:06:54:ST3_smx:INFO:	Total # of broken channels: 0
09:06:54:ST3_smx:INFO:	List of broken channels: []
09:06:54:ST3_smx:INFO:	Configuring SMX FAST
09:06:56:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1230.330540 mV
09:06:56:ST3_smx:INFO:		Electrons
09:06:56:ST3_smx:INFO:	# loops 0
09:06:58:ST3_smx:INFO:	# loops 1
09:07:00:ST3_smx:INFO:	# loops 2
09:07:01:ST3_smx:INFO:	# loops 3
09:07:03:ST3_smx:INFO:	# loops 4
09:07:04:ST3_smx:INFO:	Total # of broken channels: 0
09:07:04:ST3_smx:INFO:	List of broken channels: []
09:07:04:ST3_smx:INFO:	Total # of broken channels: 1
09:07:04:ST3_smx:INFO:	List of broken channels: [47]
09:07:05:ST3_smx:INFO:	Configuring SMX FAST
09:07:07:ST3_smx:INFO:	chip: 19-4 	 47.250730 C 	 1171.483840 mV
09:07:07:ST3_smx:INFO:		Electrons
09:07:07:ST3_smx:INFO:	# loops 0
09:07:08:ST3_smx:INFO:	# loops 1
09:07:10:ST3_smx:INFO:	# loops 2
09:07:11:ST3_smx:INFO:	# loops 3
09:07:13:ST3_smx:INFO:	# loops 4
09:07:14:ST3_smx:INFO:	Total # of broken channels: 0
09:07:14:ST3_smx:INFO:	List of broken channels: []
09:07:14:ST3_smx:INFO:	Total # of broken channels: 0
09:07:14:ST3_smx:INFO:	List of broken channels: []
09:07:15:ST3_smx:INFO:	Configuring SMX FAST
09:07:17:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1206.851500 mV
09:07:17:ST3_smx:INFO:		Electrons
09:07:17:ST3_smx:INFO:	# loops 0
09:07:18:ST3_smx:INFO:	# loops 1
09:07:20:ST3_smx:INFO:	# loops 2
09:07:22:ST3_smx:INFO:	# loops 3
09:07:23:ST3_smx:INFO:	# loops 4
09:07:25:ST3_smx:INFO:	Total # of broken channels: 0
09:07:25:ST3_smx:INFO:	List of broken channels: []
09:07:25:ST3_smx:INFO:	Total # of broken channels: 0
09:07:25:ST3_smx:INFO:	List of broken channels: []
09:07:25:ST3_smx:INFO:	Configuring SMX FAST
09:07:27:ST3_smx:INFO:	chip: 17-6 	 47.250730 C 	 1159.654860 mV
09:07:27:ST3_smx:INFO:		Electrons
09:07:27:ST3_smx:INFO:	# loops 0
09:07:29:ST3_smx:INFO:	# loops 1
09:07:30:ST3_smx:INFO:	# loops 2
09:07:32:ST3_smx:INFO:	# loops 3
09:07:33:ST3_smx:INFO:	# loops 4
09:07:35:ST3_smx:INFO:	Total # of broken channels: 0
09:07:35:ST3_smx:INFO:	List of broken channels: []
09:07:35:ST3_smx:INFO:	Total # of broken channels: 0
09:07:35:ST3_smx:INFO:	List of broken channels: []
09:07:35:ST3_smx:INFO:	Configuring SMX FAST
09:07:38:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1230.330540 mV
09:07:38:ST3_smx:INFO:		Electrons
09:07:38:ST3_smx:INFO:	# loops 0
09:07:39:ST3_smx:INFO:	# loops 1
09:07:41:ST3_smx:INFO:	# loops 2
09:07:43:ST3_smx:INFO:	# loops 3
09:07:45:ST3_smx:INFO:	# loops 4
09:07:47:ST3_smx:INFO:	Total # of broken channels: 0
09:07:47:ST3_smx:INFO:	List of broken channels: []
09:07:47:ST3_smx:INFO:	Total # of broken channels: 0
09:07:47:ST3_smx:INFO:	List of broken channels: []
09:07:47:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:07:47:febtest:INFO:	23-0 | XA-000-08-002-000-007-108-13 |  53.6 | 1159.7
09:07:47:febtest:INFO:	30-1 | XA-000-08-002-000-007-000-06 |  12.4 | 1306.1
09:07:48:febtest:INFO:	21-2 | XA-000-08-002-000-007-103-13 |  44.1 | 1189.2
09:07:48:febtest:INFO:	28-3 | XA-000-08-002-000-007-006-06 |  34.6 | 1230.3
09:07:48:febtest:INFO:	19-4 | XA-000-08-002-000-007-009-06 |  47.3 | 1171.5
09:07:48:febtest:INFO:	26-5 | XA-000-08-002-000-007-091-04 |  37.7 | 1206.9
09:07:48:febtest:INFO:	17-6 | XA-000-08-002-000-007-089-04 |  50.4 | 1159.7
09:07:49:febtest:INFO:	24-7 | XA-000-08-002-000-007-092-04 |  31.4 | 1230.3
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2023_12_04-09_05_39
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4UL001055 M4UL0B1010551A2 42 A

FEB_SN : 2078
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	13362

MODULE_NAME:	L4UL001055 M4UL0B1010551A2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L4UL001055
MODULE_MODULE:	M4UL0B1010551A2
MODULE_SIZE:	42
MODULE_GRADE:	A
---------------------------------------
VI_before_Init : ['2.450', '1.8640', '1.851', '0.4232', '7.000', '1.5490', '7.000', '1.5490']
VI_after__Init : ['2.450', '1.9770', '1.850', '0.6038', '7.000', '1.5490', '7.000', '1.5490']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:07:52:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2078/TestDate_2023_12_04-09_05_39/