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FEB_2084 24.01.24 07:56:14
TextEdit.txt
07:53:48:ST3_Shared:INFO: Listo of operators:Alois Alzheimer
07:53:48:ST3_Shared:INFO: Listo of operators:Olga B.;
07:53:52:febtest:INFO: FEB 8-2 selected
07:53:52:smx_tester:INFO: Setting Elink clock mode to 160 MHz
07:53:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:53:58:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
07:53:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:54:27:ST3_ModuleSelector:INFO: L4DL600119 M4DL6B1001191B2 124 D
07:54:27:ST3_ModuleSelector:INFO: 28164
07:54:27:febtest:INFO: Testing FEB with SN 1091
07:54:28:smx_tester:INFO: Scanning setup
07:54:28:elinks:INFO: Disabling clock on downlink 0
07:54:28:elinks:INFO: Disabling clock on downlink 1
07:54:28:elinks:INFO: Disabling clock on downlink 2
07:54:28:elinks:INFO: Disabling clock on downlink 3
07:54:28:elinks:INFO: Disabling clock on downlink 4
07:54:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:54:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14
07:54:29:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15
07:54:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:54:29:elinks:INFO: Disabling clock on downlink 0
07:54:29:elinks:INFO: Disabling clock on downlink 1
07:54:29:elinks:INFO: Disabling clock on downlink 2
07:54:29:elinks:INFO: Disabling clock on downlink 3
07:54:29:elinks:INFO: Disabling clock on downlink 4
07:54:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:54:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:54:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:54:29:elinks:INFO: Disabling clock on downlink 0
07:54:29:elinks:INFO: Disabling clock on downlink 1
07:54:29:elinks:INFO: Disabling clock on downlink 2
07:54:29:elinks:INFO: Disabling clock on downlink 3
07:54:29:elinks:INFO: Disabling clock on downlink 4
07:54:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:54:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:54:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:54:29:elinks:INFO: Disabling clock on downlink 0
07:54:29:elinks:INFO: Disabling clock on downlink 1
07:54:29:elinks:INFO: Disabling clock on downlink 2
07:54:29:elinks:INFO: Disabling clock on downlink 3
07:54:29:elinks:INFO: Disabling clock on downlink 4
07:54:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:54:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:54:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:54:29:elinks:INFO: Disabling clock on downlink 0
07:54:29:elinks:INFO: Disabling clock on downlink 1
07:54:29:elinks:INFO: Disabling clock on downlink 2
07:54:29:elinks:INFO: Disabling clock on downlink 3
07:54:29:elinks:INFO: Disabling clock on downlink 4
07:54:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:54:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:54:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:54:29:setup_element:INFO: Scanning clock phase
07:54:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:54:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:54:30:setup_element:INFO: Clock phase scan results for group 0, downlink 0
07:54:30:setup_element:INFO: Eye window for uplink 0 : XX________________________________________________________________________XXXXXX
Clock Delay: 37
07:54:30:setup_element:INFO: Eye window for uplink 1 : XX________________________________________________________________________XXXXXX
Clock Delay: 37
07:54:30:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
07:54:30:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
07:54:30:setup_element:INFO: Eye window for uplink 4 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
07:54:30:setup_element:INFO: Eye window for uplink 5 : X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
07:54:30:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:54:30:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:54:30:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:54:30:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:54:30:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:54:30:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:54:30:setup_element:INFO: Eye window for uplink 12: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
07:54:30:setup_element:INFO: Eye window for uplink 13: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
07:54:30:setup_element:INFO: Eye window for uplink 14: X__________________________________________________________________________XXXXX
Clock Delay: 37
07:54:30:setup_element:INFO: Eye window for uplink 15: X__________________________________________________________________________XXXXX
Clock Delay: 37
07:54:30:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 0
07:54:30:setup_element:INFO: Scanning data phases
07:54:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:54:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:54:35:setup_element:INFO: Data phase scan results for group 0, downlink 0
07:54:35:setup_element:INFO: Eye window for uplink 0 : ________________________________XXXXXX__
Data delay found: 14
07:54:35:setup_element:INFO: Eye window for uplink 1 : _____________________________XXXXX______
Data delay found: 11
07:54:35:setup_element:INFO: Eye window for uplink 2 : ______________________________XXXXX_____
Data delay found: 12
07:54:35:setup_element:INFO: Eye window for uplink 3 : ___________________________XXXXXX_______
Data delay found: 9
07:54:35:setup_element:INFO: Eye window for uplink 4 : ________________________________XXXXX___
Data delay found: 14
07:54:35:setup_element:INFO: Eye window for uplink 5 : _____________________________XXXX_______
Data delay found: 10
07:54:35:setup_element:INFO: Eye window for uplink 6 : _____________________________XXXXX______
Data delay found: 11
07:54:35:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXXX________
Data delay found: 8
07:54:35:setup_element:INFO: Eye window for uplink 8 : __________________________________XXXXX_
Data delay found: 16
07:54:35:setup_element:INFO: Eye window for uplink 9 : XXXX__________________________________XX
Data delay found: 20
07:54:35:setup_element:INFO: Eye window for uplink 10: XXXXXX_________________________________X
Data delay found: 22
07:54:35:setup_element:INFO: Eye window for uplink 11: ____XXXXX_______________________________
Data delay found: 26
07:54:35:setup_element:INFO: Eye window for uplink 12: _____XXXX_______________________________
Data delay found: 26
07:54:35:setup_element:INFO: Eye window for uplink 13: _______XXXX_____________________________
Data delay found: 28
07:54:35:setup_element:INFO: Eye window for uplink 14: _________XXXXX__________________________
Data delay found: 31
07:54:35:setup_element:INFO: Eye window for uplink 15: ___________XXXXX________________________
Data delay found: 33
07:54:35:setup_element:INFO: Setting the data phase to 14 for uplink 0
07:54:35:setup_element:INFO: Setting the data phase to 11 for uplink 1
07:54:35:setup_element:INFO: Setting the data phase to 12 for uplink 2
07:54:35:setup_element:INFO: Setting the data phase to 9 for uplink 3
07:54:35:setup_element:INFO: Setting the data phase to 14 for uplink 4
07:54:35:setup_element:INFO: Setting the data phase to 10 for uplink 5
07:54:35:setup_element:INFO: Setting the data phase to 11 for uplink 6
07:54:35:setup_element:INFO: Setting the data phase to 8 for uplink 7
07:54:35:setup_element:INFO: Setting the data phase to 16 for uplink 8
07:54:35:setup_element:INFO: Setting the data phase to 20 for uplink 9
07:54:35:setup_element:INFO: Setting the data phase to 22 for uplink 10
07:54:35:setup_element:INFO: Setting the data phase to 26 for uplink 11
07:54:35:setup_element:INFO: Setting the data phase to 26 for uplink 12
07:54:35:setup_element:INFO: Setting the data phase to 28 for uplink 13
07:54:35:setup_element:INFO: Setting the data phase to 31 for uplink 14
07:54:35:setup_element:INFO: Setting the data phase to 33 for uplink 15
07:54:35:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 70
Eye Windows:
Uplink 0: XX________________________________________________________________________XXXXXX
Uplink 1: XX________________________________________________________________________XXXXXX
Uplink 2: _________________________________________________________________________XXXXXXX
Uplink 3: _________________________________________________________________________XXXXXXX
Uplink 4: X_______________________________________________________________________XXXXXXXX
Uplink 5: X_______________________________________________________________________XXXXXXXX
Uplink 6: ________________________________________________________________________XXXXXXXX
Uplink 7: ________________________________________________________________________XXXXXXXX
Uplink 8: ________________________________________________________________________XXXXXXXX
Uplink 9: ________________________________________________________________________XXXXXXXX
Uplink 10: ________________________________________________________________________XXXXXXXX
Uplink 11: ________________________________________________________________________XXXXXXXX
Uplink 12: X_______________________________________________________________________XXXXXXXX
Uplink 13: X_______________________________________________________________________XXXXXXXX
Uplink 14: X__________________________________________________________________________XXXXX
Uplink 15: X__________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 1:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 2:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 3:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 4:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 5:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 6:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 7:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 8:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 9:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 10:
Optimal Phase: 22
Window Length: 33
Eye Window: XXXXXX_________________________________X
Uplink 11:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 12:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
Uplink 13:
Optimal Phase: 28
Window Length: 36
Eye Window: _______XXXX_____________________________
Uplink 14:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 15:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
]
07:54:35:setup_element:INFO: Beginning SMX ASICs map scan
07:54:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:54:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:54:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
07:54:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
07:54:36:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:54:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7
07:54:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6
07:54:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14
07:54:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15
07:54:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5
07:54:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4
07:54:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12
07:54:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13
07:54:36:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3
07:54:36:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2
07:54:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
07:54:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11
07:54:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1
07:54:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0
07:54:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8
07:54:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9
07:54:38:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 70
Eye Windows:
Uplink 0: XX________________________________________________________________________XXXXXX
Uplink 1: XX________________________________________________________________________XXXXXX
Uplink 2: _________________________________________________________________________XXXXXXX
Uplink 3: _________________________________________________________________________XXXXXXX
Uplink 4: X_______________________________________________________________________XXXXXXXX
Uplink 5: X_______________________________________________________________________XXXXXXXX
Uplink 6: ________________________________________________________________________XXXXXXXX
Uplink 7: ________________________________________________________________________XXXXXXXX
Uplink 8: ________________________________________________________________________XXXXXXXX
Uplink 9: ________________________________________________________________________XXXXXXXX
Uplink 10: ________________________________________________________________________XXXXXXXX
Uplink 11: ________________________________________________________________________XXXXXXXX
Uplink 12: X_______________________________________________________________________XXXXXXXX
Uplink 13: X_______________________________________________________________________XXXXXXXX
Uplink 14: X__________________________________________________________________________XXXXX
Uplink 15: X__________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 1:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 2:
Optimal Phase: 12
Window Length: 35
Eye Window: ______________________________XXXXX_____
Uplink 3:
Optimal Phase: 9
Window Length: 34
Eye Window: ___________________________XXXXXX_______
Uplink 4:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 5:
Optimal Phase: 10
Window Length: 36
Eye Window: _____________________________XXXX_______
Uplink 6:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 7:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 8:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 9:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 10:
Optimal Phase: 22
Window Length: 33
Eye Window: XXXXXX_________________________________X
Uplink 11:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 12:
Optimal Phase: 26
Window Length: 36
Eye Window: _____XXXX_______________________________
Uplink 13:
Optimal Phase: 28
Window Length: 36
Eye Window: _______XXXX_____________________________
Uplink 14:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 15:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
07:54:38:setup_element:INFO: Performing Elink synchronization
07:54:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:54:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:54:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
07:54:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
07:54:38:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
07:54:38:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:54:39:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)]
1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)]
2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)]
3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)]
4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)]
5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)]
6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)]
7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)]
07:54:39:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:54:40:febtest:INFO: 7-0 | XA-000-08-002-001-008-091-08 | 25.1 | 1206.9
07:54:40:febtest:INFO: 14-1 | XA-000-08-002-001-008-137-00 | 18.7 | 1212.7
07:54:40:febtest:INFO: 5-2 | XA-000-08-002-001-008-112-06 | 25.1 | 1206.9
07:54:40:febtest:INFO: 12-3 | XA-000-08-002-001-008-102-01 | 15.6 | 1224.5
07:54:41:febtest:INFO: 3-4 | XA-000-08-002-001-008-073-15 | 15.6 | 1230.3
07:54:41:febtest:INFO: 10-5 | XA-000-08-002-001-008-157-07 | 15.6 | 1212.7
07:54:41:febtest:INFO: 1-6 | XA-000-08-002-001-008-131-00 | -0.1 | 1277.1
07:54:41:febtest:INFO: 8-7 | XA-000-08-002-001-008-162-14 | 9.3 | 1236.2
07:54:41:ST3_smx:INFO: Configuring SMX FAST
07:54:43:ST3_smx:INFO: chip: 7-0 31.389742 C 1183.292940 mV
07:54:43:ST3_smx:INFO: Electrons
07:54:43:ST3_smx:INFO: # loops 0
07:54:45:ST3_smx:INFO: # loops 1
07:54:47:ST3_smx:INFO: # loops 2
07:54:48:ST3_smx:INFO: # loops 3
07:54:50:ST3_smx:INFO: # loops 4
07:54:51:ST3_smx:INFO: Total # of broken channels: 0
07:54:51:ST3_smx:INFO: List of broken channels: []
07:54:51:ST3_smx:INFO: Total # of broken channels: 0
07:54:51:ST3_smx:INFO: List of broken channels: []
07:54:52:ST3_smx:INFO: Configuring SMX FAST
07:54:54:ST3_smx:INFO: chip: 14-1 25.062742 C 1195.082160 mV
07:54:54:ST3_smx:INFO: Electrons
07:54:54:ST3_smx:INFO: # loops 0
07:54:55:ST3_smx:INFO: # loops 1
07:54:57:ST3_smx:INFO: # loops 2
07:54:58:ST3_smx:INFO: # loops 3
07:55:00:ST3_smx:INFO: # loops 4
07:55:01:ST3_smx:INFO: Total # of broken channels: 0
07:55:01:ST3_smx:INFO: List of broken channels: []
07:55:01:ST3_smx:INFO: Total # of broken channels: 0
07:55:01:ST3_smx:INFO: List of broken channels: []
07:55:02:ST3_smx:INFO: Configuring SMX FAST
07:55:04:ST3_smx:INFO: chip: 5-2 25.062742 C 1212.728715 mV
07:55:04:ST3_smx:INFO: Electrons
07:55:04:ST3_smx:INFO: # loops 0
07:55:05:ST3_smx:INFO: # loops 1
07:55:07:ST3_smx:INFO: # loops 2
07:55:08:ST3_smx:INFO: # loops 3
07:55:10:ST3_smx:INFO: # loops 4
07:55:12:ST3_smx:INFO: Total # of broken channels: 0
07:55:12:ST3_smx:INFO: List of broken channels: []
07:55:12:ST3_smx:INFO: Total # of broken channels: 0
07:55:12:ST3_smx:INFO: List of broken channels: []
07:55:12:ST3_smx:INFO: Configuring SMX FAST
07:55:14:ST3_smx:INFO: chip: 12-3 25.062742 C 1206.851500 mV
07:55:14:ST3_smx:INFO: Electrons
07:55:14:ST3_smx:INFO: # loops 0
07:55:16:ST3_smx:INFO: # loops 1
07:55:17:ST3_smx:INFO: # loops 2
07:55:19:ST3_smx:INFO: # loops 3
07:55:20:ST3_smx:INFO: # loops 4
07:55:22:ST3_smx:INFO: Total # of broken channels: 0
07:55:22:ST3_smx:INFO: List of broken channels: []
07:55:22:ST3_smx:INFO: Total # of broken channels: 0
07:55:22:ST3_smx:INFO: List of broken channels: []
07:55:22:ST3_smx:INFO: Configuring SMX FAST
07:55:24:ST3_smx:INFO: chip: 3-4 21.902970 C 1224.468235 mV
07:55:24:ST3_smx:INFO: Electrons
07:55:24:ST3_smx:INFO: # loops 0
07:55:26:ST3_smx:INFO: # loops 1
07:55:27:ST3_smx:INFO: # loops 2
07:55:29:ST3_smx:INFO: # loops 3
07:55:31:ST3_smx:INFO: # loops 4
07:55:32:ST3_smx:INFO: Total # of broken channels: 0
07:55:32:ST3_smx:INFO: List of broken channels: []
07:55:32:ST3_smx:INFO: Total # of broken channels: 0
07:55:32:ST3_smx:INFO: List of broken channels: []
07:55:33:ST3_smx:INFO: Configuring SMX FAST
07:55:34:ST3_smx:INFO: chip: 10-5 9.288730 C 1253.730060 mV
07:55:34:ST3_smx:INFO: Electrons
07:55:34:ST3_smx:INFO: # loops 0
07:55:36:ST3_smx:INFO: # loops 1
07:55:38:ST3_smx:INFO: # loops 2
07:55:39:ST3_smx:INFO: # loops 3
07:55:41:ST3_smx:INFO: # loops 4
07:55:42:ST3_smx:INFO: Total # of broken channels: 0
07:55:42:ST3_smx:INFO: List of broken channels: []
07:55:42:ST3_smx:INFO: Total # of broken channels: 0
07:55:42:ST3_smx:INFO: List of broken channels: []
07:55:43:ST3_smx:INFO: Configuring SMX FAST
07:55:45:ST3_smx:INFO: chip: 1-6 9.288730 C 1259.567515 mV
07:55:45:ST3_smx:INFO: Electrons
07:55:45:ST3_smx:INFO: # loops 0
07:55:46:ST3_smx:INFO: # loops 1
07:55:48:ST3_smx:INFO: # loops 2
07:55:49:ST3_smx:INFO: # loops 3
07:55:51:ST3_smx:INFO: # loops 4
07:55:53:ST3_smx:INFO: Total # of broken channels: 0
07:55:53:ST3_smx:INFO: List of broken channels: []
07:55:53:ST3_smx:INFO: Total # of broken channels: 1
07:55:53:ST3_smx:INFO: List of broken channels: [108]
07:55:53:ST3_smx:INFO: Configuring SMX FAST
07:55:55:ST3_smx:INFO: chip: 8-7 15.590880 C 1224.468235 mV
07:55:55:ST3_smx:INFO: Electrons
07:55:55:ST3_smx:INFO: # loops 0
07:55:57:ST3_smx:INFO: # loops 1
07:55:58:ST3_smx:INFO: # loops 2
07:56:00:ST3_smx:INFO: # loops 3
07:56:01:ST3_smx:INFO: # loops 4
07:56:03:ST3_smx:INFO: Total # of broken channels: 0
07:56:03:ST3_smx:INFO: List of broken channels: []
07:56:03:ST3_smx:INFO: Total # of broken channels: 0
07:56:03:ST3_smx:INFO: List of broken channels: []
07:56:03:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:56:04:febtest:INFO: 7-0 | XA-000-08-002-001-008-091-08 | 34.6 | 1183.3
07:56:04:febtest:INFO: 14-1 | XA-000-08-002-001-008-137-00 | 28.2 | 1201.0
07:56:04:febtest:INFO: 5-2 | XA-000-08-002-001-008-112-06 | 28.2 | 1212.7
07:56:04:febtest:INFO: 12-3 | XA-000-08-002-001-008-102-01 | 25.1 | 1206.9
07:56:05:febtest:INFO: 3-4 | XA-000-08-002-001-008-073-15 | 21.9 | 1224.5
07:56:05:febtest:INFO: 10-5 | XA-000-08-002-001-008-157-07 | 12.4 | 1253.7
07:56:05:febtest:INFO: 1-6 | XA-000-08-002-001-008-131-00 | 12.4 | 1259.6
07:56:05:febtest:INFO: 8-7 | XA-000-08-002-001-008-162-14 | 15.6 | 1230.3
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_24-07_53_58
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6B1001191B2 124 D
FEB_SN : 1091
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 28164
MODULE_NAME: L4DL600119 M4DL6B1001191B2 124 D
MODULE_TYPE:
MODULE_LADDER: L4UL401032
MODULE_MODULE: M4UL4B2010322A2
MODULE_SIZE: 62
MODULE_GRADE: C
---------------------------------------
VI_before_Init : ['2.450', '1.9400', '1.851', '0.4299', '7.000', '1.5800', '7.000', '1.5800']
VI_after__Init : ['2.450', '1.9830', '1.850', '0.5903', '7.000', '1.5800', '7.000', '1.5800']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
07:56:11:febtest:INFO: FEB 8-2 selected
07:56:11:smx_tester:INFO: Setting Elink clock mode to 160 MHz
07:56:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:56:14:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
07:56:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:56:15:ST3_ModuleSelector:INFO: L4DL600119 M4DL6B1001191B2 124 D
07:56:15:ST3_ModuleSelector:INFO: 28164
07:56:15:febtest:INFO: Testing FEB with SN 2084
07:56:16:smx_tester:INFO: Scanning setup
07:56:16:elinks:INFO: Disabling clock on downlink 0
07:56:16:elinks:INFO: Disabling clock on downlink 1
07:56:16:elinks:INFO: Disabling clock on downlink 2
07:56:16:elinks:INFO: Disabling clock on downlink 3
07:56:17:elinks:INFO: Disabling clock on downlink 4
07:56:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14
07:56:17:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15
07:56:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:17:elinks:INFO: Disabling clock on downlink 0
07:56:17:elinks:INFO: Disabling clock on downlink 1
07:56:17:elinks:INFO: Disabling clock on downlink 2
07:56:17:elinks:INFO: Disabling clock on downlink 3
07:56:17:elinks:INFO: Disabling clock on downlink 4
07:56:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:17:elinks:INFO: Disabling clock on downlink 0
07:56:17:elinks:INFO: Disabling clock on downlink 1
07:56:17:elinks:INFO: Disabling clock on downlink 2
07:56:17:elinks:INFO: Disabling clock on downlink 3
07:56:17:elinks:INFO: Disabling clock on downlink 4
07:56:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:56:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:17:elinks:INFO: Disabling clock on downlink 0
07:56:17:elinks:INFO: Disabling clock on downlink 1
07:56:17:elinks:INFO: Disabling clock on downlink 2
07:56:17:elinks:INFO: Disabling clock on downlink 3
07:56:17:elinks:INFO: Disabling clock on downlink 4
07:56:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:56:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:17:elinks:INFO: Disabling clock on downlink 0
07:56:17:elinks:INFO: Disabling clock on downlink 1
07:56:17:elinks:INFO: Disabling clock on downlink 2
07:56:17:elinks:INFO: Disabling clock on downlink 3
07:56:17:elinks:INFO: Disabling clock on downlink 4
07:56:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:56:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:17:setup_element:INFO: Scanning clock phase
07:56:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:56:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:56:18:setup_element:INFO: Clock phase scan results for group 0, downlink 0
07:56:18:setup_element:INFO: Eye window for uplink 0 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
07:56:18:setup_element:INFO: Eye window for uplink 1 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
07:56:18:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:56:18:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:56:18:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:56:18:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:56:18:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:56:18:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:56:18:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:56:18:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
07:56:18:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
07:56:18:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
07:56:18:setup_element:INFO: Eye window for uplink 12: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
07:56:18:setup_element:INFO: Eye window for uplink 13: X_______________________________________________________________________XXXXXXXX
Clock Delay: 36
07:56:18:setup_element:INFO: Eye window for uplink 14: X__________________________________________________________________________XXXXX
Clock Delay: 37
07:56:18:setup_element:INFO: Eye window for uplink 15: X__________________________________________________________________________XXXXX
Clock Delay: 37
07:56:18:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 0
07:56:18:setup_element:INFO: Scanning data phases
07:56:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:56:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:56:23:setup_element:INFO: Data phase scan results for group 0, downlink 0
07:56:23:setup_element:INFO: Eye window for uplink 0 : ________________________________XXXXXX__
Data delay found: 14
07:56:23:setup_element:INFO: Eye window for uplink 1 : ____________________________XXXXXX______
Data delay found: 10
07:56:23:setup_element:INFO: Eye window for uplink 2 : _____________________________XXXXX______
Data delay found: 11
07:56:23:setup_element:INFO: Eye window for uplink 3 : ___________________________XXXXX________
Data delay found: 9
07:56:23:setup_element:INFO: Eye window for uplink 4 : _______________________________XXXXXX___
Data delay found: 13
07:56:23:setup_element:INFO: Eye window for uplink 5 : ____________________________XXXXX_______
Data delay found: 10
07:56:23:setup_element:INFO: Eye window for uplink 6 : _____________________________XXXXX______
Data delay found: 11
07:56:23:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXX_________
Data delay found: 8
07:56:23:setup_element:INFO: Eye window for uplink 8 : __________________________________XXXXX_
Data delay found: 16
07:56:23:setup_element:INFO: Eye window for uplink 9 : XXXX__________________________________XX
Data delay found: 20
07:56:23:setup_element:INFO: Eye window for uplink 10: XXXXX_________________________________XX
Data delay found: 21
07:56:23:setup_element:INFO: Eye window for uplink 11: ___XXXXXX_______________________________
Data delay found: 25
07:56:23:setup_element:INFO: Eye window for uplink 12: ____XXXXX_______________________________
Data delay found: 26
07:56:23:setup_element:INFO: Eye window for uplink 13: ______XXXXX_____________________________
Data delay found: 28
07:56:23:setup_element:INFO: Eye window for uplink 14: ________XXXXX___________________________
Data delay found: 30
07:56:23:setup_element:INFO: Eye window for uplink 15: __________XXXXX_________________________
Data delay found: 32
07:56:23:setup_element:INFO: Setting the data phase to 14 for uplink 0
07:56:23:setup_element:INFO: Setting the data phase to 10 for uplink 1
07:56:23:setup_element:INFO: Setting the data phase to 11 for uplink 2
07:56:23:setup_element:INFO: Setting the data phase to 9 for uplink 3
07:56:23:setup_element:INFO: Setting the data phase to 13 for uplink 4
07:56:23:setup_element:INFO: Setting the data phase to 10 for uplink 5
07:56:23:setup_element:INFO: Setting the data phase to 11 for uplink 6
07:56:23:setup_element:INFO: Setting the data phase to 8 for uplink 7
07:56:23:setup_element:INFO: Setting the data phase to 16 for uplink 8
07:56:23:setup_element:INFO: Setting the data phase to 20 for uplink 9
07:56:23:setup_element:INFO: Setting the data phase to 21 for uplink 10
07:56:23:setup_element:INFO: Setting the data phase to 25 for uplink 11
07:56:23:setup_element:INFO: Setting the data phase to 26 for uplink 12
07:56:23:setup_element:INFO: Setting the data phase to 28 for uplink 13
07:56:23:setup_element:INFO: Setting the data phase to 30 for uplink 14
07:56:23:setup_element:INFO: Setting the data phase to 32 for uplink 15
07:56:23:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 0: X_________________________________________________________________________XXXXXX
Uplink 1: X_________________________________________________________________________XXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ________________________________________________________________________XXXXXXXX
Uplink 5: ________________________________________________________________________XXXXXXXX
Uplink 6: ________________________________________________________________________XXXXXXXX
Uplink 7: ________________________________________________________________________XXXXXXXX
Uplink 8: ________________________________________________________________________XXXXXXXX
Uplink 9: ________________________________________________________________________XXXXXXXX
Uplink 10: ________________________________________________________________________XXXXXXX_
Uplink 11: ________________________________________________________________________XXXXXXX_
Uplink 12: X_______________________________________________________________________XXXXXXXX
Uplink 13: X_______________________________________________________________________XXXXXXXX
Uplink 14: X__________________________________________________________________________XXXXX
Uplink 15: X__________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 1:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 2:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 3:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 4:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 5:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 6:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 7:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 8:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 9:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 10:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 11:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 12:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 13:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 14:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 15:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
]
07:56:23:setup_element:INFO: Beginning SMX ASICs map scan
07:56:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:56:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:56:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
07:56:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
07:56:23:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:56:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7
07:56:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6
07:56:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14
07:56:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15
07:56:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5
07:56:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4
07:56:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12
07:56:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13
07:56:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3
07:56:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2
07:56:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
07:56:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11
07:56:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1
07:56:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0
07:56:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8
07:56:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9
07:56:26:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 0: X_________________________________________________________________________XXXXXX
Uplink 1: X_________________________________________________________________________XXXXXX
Uplink 2: ________________________________________________________________________XXXXXXXX
Uplink 3: ________________________________________________________________________XXXXXXXX
Uplink 4: ________________________________________________________________________XXXXXXXX
Uplink 5: ________________________________________________________________________XXXXXXXX
Uplink 6: ________________________________________________________________________XXXXXXXX
Uplink 7: ________________________________________________________________________XXXXXXXX
Uplink 8: ________________________________________________________________________XXXXXXXX
Uplink 9: ________________________________________________________________________XXXXXXXX
Uplink 10: ________________________________________________________________________XXXXXXX_
Uplink 11: ________________________________________________________________________XXXXXXX_
Uplink 12: X_______________________________________________________________________XXXXXXXX
Uplink 13: X_______________________________________________________________________XXXXXXXX
Uplink 14: X__________________________________________________________________________XXXXX
Uplink 15: X__________________________________________________________________________XXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 14
Window Length: 34
Eye Window: ________________________________XXXXXX__
Uplink 1:
Optimal Phase: 10
Window Length: 34
Eye Window: ____________________________XXXXXX______
Uplink 2:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 3:
Optimal Phase: 9
Window Length: 35
Eye Window: ___________________________XXXXX________
Uplink 4:
Optimal Phase: 13
Window Length: 34
Eye Window: _______________________________XXXXXX___
Uplink 5:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 6:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 7:
Optimal Phase: 8
Window Length: 35
Eye Window: __________________________XXXXX_________
Uplink 8:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 9:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 10:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 11:
Optimal Phase: 25
Window Length: 34
Eye Window: ___XXXXXX_______________________________
Uplink 12:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 13:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 14:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 15:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
07:56:26:setup_element:INFO: Performing Elink synchronization
07:56:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:56:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
07:56:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
07:56:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
07:56:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
07:56:26:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:56:26:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)]
1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)]
2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)]
3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)]
4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)]
5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)]
6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)]
7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)]
07:56:27:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:56:27:febtest:INFO: 7-0 | XA-000-08-002-001-008-091-08 | 28.2 | 1212.7
07:56:28:febtest:INFO: 14-1 | XA-000-08-002-001-008-137-00 | 21.9 | 1212.7
07:56:28:febtest:INFO: 5-2 | XA-000-08-002-001-008-112-06 | 28.2 | 1206.9
07:56:28:febtest:INFO: 12-3 | XA-000-08-002-001-008-102-01 | 18.7 | 1230.3
07:56:28:febtest:INFO: 3-4 | XA-000-08-002-001-008-073-15 | 21.9 | 1224.5
07:56:29:febtest:INFO: 10-5 | XA-000-08-002-001-008-157-07 | 21.9 | 1218.6
07:56:29:febtest:INFO: 1-6 | XA-000-08-002-001-008-131-00 | 6.1 | 1271.2
07:56:29:febtest:INFO: 8-7 | XA-000-08-002-001-008-162-14 | 12.4 | 1236.2
07:56:29:ST3_smx:INFO: Configuring SMX FAST
07:56:31:ST3_smx:INFO: chip: 7-0 34.556970 C 1183.292940 mV
07:56:31:ST3_smx:INFO: Electrons
07:56:31:ST3_smx:INFO: # loops 0
07:56:33:ST3_smx:INFO: # loops 1
07:56:35:ST3_smx:INFO: # loops 2
07:56:36:ST3_smx:INFO: # loops 3
07:56:38:ST3_smx:INFO: # loops 4
07:56:40:ST3_smx:INFO: Total # of broken channels: 0
07:56:40:ST3_smx:INFO: List of broken channels: []
07:56:40:ST3_smx:INFO: Total # of broken channels: 0
07:56:40:ST3_smx:INFO: List of broken channels: []
07:56:40:ST3_smx:INFO: Configuring SMX FAST
07:56:42:ST3_smx:INFO: chip: 14-1 28.225000 C 1195.082160 mV
07:56:42:ST3_smx:INFO: Electrons
07:56:42:ST3_smx:INFO: # loops 0
07:56:44:ST3_smx:INFO: # loops 1
07:56:45:ST3_smx:INFO: # loops 2
07:56:47:ST3_smx:INFO: # loops 3
07:56:49:ST3_smx:INFO: # loops 4
07:56:50:ST3_smx:INFO: Total # of broken channels: 0
07:56:50:ST3_smx:INFO: List of broken channels: []
07:56:50:ST3_smx:INFO: Total # of broken channels: 0
07:56:50:ST3_smx:INFO: List of broken channels: []
07:56:51:ST3_smx:INFO: Configuring SMX FAST
07:56:53:ST3_smx:INFO: chip: 5-2 28.225000 C 1212.728715 mV
07:56:53:ST3_smx:INFO: Electrons
07:56:53:ST3_smx:INFO: # loops 0
07:56:54:ST3_smx:INFO: # loops 1
07:56:56:ST3_smx:INFO: # loops 2
07:56:58:ST3_smx:INFO: # loops 3
07:56:59:ST3_smx:INFO: # loops 4
07:57:01:ST3_smx:INFO: Total # of broken channels: 0
07:57:01:ST3_smx:INFO: List of broken channels: []
07:57:01:ST3_smx:INFO: Total # of broken channels: 0
07:57:01:ST3_smx:INFO: List of broken channels: []
07:57:01:ST3_smx:INFO: Configuring SMX FAST
07:57:03:ST3_smx:INFO: chip: 12-3 28.225000 C 1206.851500 mV
07:57:03:ST3_smx:INFO: Electrons
07:57:03:ST3_smx:INFO: # loops 0
07:57:05:ST3_smx:INFO: # loops 1
07:57:07:ST3_smx:INFO: # loops 2
07:57:08:ST3_smx:INFO: # loops 3
07:57:10:ST3_smx:INFO: # loops 4
07:57:12:ST3_smx:INFO: Total # of broken channels: 0
07:57:12:ST3_smx:INFO: List of broken channels: []
07:57:12:ST3_smx:INFO: Total # of broken channels: 0
07:57:12:ST3_smx:INFO: List of broken channels: []
07:57:12:ST3_smx:INFO: Configuring SMX FAST
07:57:14:ST3_smx:INFO: chip: 3-4 25.062742 C 1224.468235 mV
07:57:14:ST3_smx:INFO: Electrons
07:57:14:ST3_smx:INFO: # loops 0
07:57:16:ST3_smx:INFO: # loops 1
07:57:17:ST3_smx:INFO: # loops 2
07:57:19:ST3_smx:INFO: # loops 3
07:57:21:ST3_smx:INFO: # loops 4
07:57:22:ST3_smx:INFO: Total # of broken channels: 0
07:57:22:ST3_smx:INFO: List of broken channels: []
07:57:22:ST3_smx:INFO: Total # of broken channels: 0
07:57:22:ST3_smx:INFO: List of broken channels: []
07:57:23:ST3_smx:INFO: Configuring SMX FAST
07:57:25:ST3_smx:INFO: chip: 10-5 12.438562 C 1247.887635 mV
07:57:25:ST3_smx:INFO: Electrons
07:57:25:ST3_smx:INFO: # loops 0
07:57:26:ST3_smx:INFO: # loops 1
07:57:28:ST3_smx:INFO: # loops 2
07:57:30:ST3_smx:INFO: # loops 3
07:57:31:ST3_smx:INFO: # loops 4
07:57:33:ST3_smx:INFO: Total # of broken channels: 0
07:57:33:ST3_smx:INFO: List of broken channels: []
07:57:33:ST3_smx:INFO: Total # of broken channels: 0
07:57:33:ST3_smx:INFO: List of broken channels: []
07:57:33:ST3_smx:INFO: Configuring SMX FAST
07:57:35:ST3_smx:INFO: chip: 1-6 12.438562 C 1259.567515 mV
07:57:35:ST3_smx:INFO: Electrons
07:57:35:ST3_smx:INFO: # loops 0
07:57:37:ST3_smx:INFO: # loops 1
07:57:39:ST3_smx:INFO: # loops 2
07:57:40:ST3_smx:INFO: # loops 3
07:57:42:ST3_smx:INFO: # loops 4
07:57:44:ST3_smx:INFO: Total # of broken channels: 0
07:57:44:ST3_smx:INFO: List of broken channels: []
07:57:44:ST3_smx:INFO: Total # of broken channels: 1
07:57:44:ST3_smx:INFO: List of broken channels: [108]
07:57:44:ST3_smx:INFO: Configuring SMX FAST
07:57:46:ST3_smx:INFO: chip: 8-7 18.745682 C 1224.468235 mV
07:57:46:ST3_smx:INFO: Electrons
07:57:46:ST3_smx:INFO: # loops 0
07:57:48:ST3_smx:INFO: # loops 1
07:57:50:ST3_smx:INFO: # loops 2
07:57:51:ST3_smx:INFO: # loops 3
07:57:53:ST3_smx:INFO: # loops 4
07:57:55:ST3_smx:INFO: Total # of broken channels: 0
07:57:55:ST3_smx:INFO: List of broken channels: []
07:57:55:ST3_smx:INFO: Total # of broken channels: 0
07:57:55:ST3_smx:INFO: List of broken channels: []
07:57:56:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
07:57:56:febtest:INFO: 7-0 | XA-000-08-002-001-008-091-08 | 37.7 | 1183.3
07:57:56:febtest:INFO: 14-1 | XA-000-08-002-001-008-137-00 | 28.2 | 1201.0
07:57:56:febtest:INFO: 5-2 | XA-000-08-002-001-008-112-06 | 28.2 | 1212.7
07:57:56:febtest:INFO: 12-3 | XA-000-08-002-001-008-102-01 | 28.2 | 1206.9
07:57:57:febtest:INFO: 3-4 | XA-000-08-002-001-008-073-15 | 25.1 | 1224.5
07:57:57:febtest:INFO: 10-5 | XA-000-08-002-001-008-157-07 | 12.4 | 1253.7
07:57:57:febtest:INFO: 1-6 | XA-000-08-002-001-008-131-00 | 12.4 | 1259.6
07:57:57:febtest:INFO: 8-7 | XA-000-08-002-001-008-162-14 | 18.7 | 1224.5
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_24-07_56_14
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6B1001191B2 124 D
FEB_SN : 2084
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 28164
MODULE_NAME: L4DL600119 M4DL6B1001191B2 124 D
MODULE_TYPE:
MODULE_LADDER: L4UL401032
MODULE_MODULE: M4UL4B2010322A2
MODULE_SIZE: 62
MODULE_GRADE: C
---------------------------------------
VI_before_Init : ['2.450', '1.8740', '1.850', '0.4671', '7.000', '1.5800', '7.000', '1.5800']
VI_after__Init : ['2.450', '1.9850', '1.850', '0.5910', '7.000', '1.5800', '7.000', '1.5800']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
07:58:21:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2084/TestDate_2024_01_24-07_56_14/