FEB_2084    22.01.24 12:47:58

TextEdit.txt
            12:44:11:febtest:INFO:	FEB 8-2 selected
12:44:11:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
12:44:15:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:44:15:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
12:44:15:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:44:15:febtest:INFO:	Testing FEB with SN 2093
12:44:17:smx_tester:INFO:	Scanning setup
12:44:17:elinks:INFO:	Disabling clock on downlink 0
12:44:17:elinks:INFO:	Disabling clock on downlink 1
12:44:17:elinks:INFO:	Disabling clock on downlink 2
12:44:17:elinks:INFO:	Disabling clock on downlink 3
12:44:17:elinks:INFO:	Disabling clock on downlink 4
12:44:17:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:44:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:44:17:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 8
12:44:17:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 9
12:44:17:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 10
12:44:17:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 11
12:44:17:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 12
12:44:17:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 13
12:44:17:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 14
12:44:17:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 15
12:44:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:44:17:elinks:INFO:	Disabling clock on downlink 0
12:44:17:elinks:INFO:	Disabling clock on downlink 1
12:44:17:elinks:INFO:	Disabling clock on downlink 2
12:44:17:elinks:INFO:	Disabling clock on downlink 3
12:44:17:elinks:INFO:	Disabling clock on downlink 4
12:44:17:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:44:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:44:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:44:17:elinks:INFO:	Disabling clock on downlink 0
12:44:17:elinks:INFO:	Disabling clock on downlink 1
12:44:17:elinks:INFO:	Disabling clock on downlink 2
12:44:17:elinks:INFO:	Disabling clock on downlink 3
12:44:17:elinks:INFO:	Disabling clock on downlink 4
12:44:17:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:44:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:44:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:44:17:elinks:INFO:	Disabling clock on downlink 0
12:44:17:elinks:INFO:	Disabling clock on downlink 1
12:44:17:elinks:INFO:	Disabling clock on downlink 2
12:44:17:elinks:INFO:	Disabling clock on downlink 3
12:44:17:elinks:INFO:	Disabling clock on downlink 4
12:44:17:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:44:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:44:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:44:17:elinks:INFO:	Disabling clock on downlink 0
12:44:17:elinks:INFO:	Disabling clock on downlink 1
12:44:17:elinks:INFO:	Disabling clock on downlink 2
12:44:17:elinks:INFO:	Disabling clock on downlink 3
12:44:17:elinks:INFO:	Disabling clock on downlink 4
12:44:17:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:44:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:44:17:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:44:17:setup_element:INFO:	Scanning clock phase
12:44:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:44:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:44:18:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
12:44:18:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:44:18:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:44:18:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXXXXXX
Clock Delay: 34
12:44:18:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXXXXXX
Clock Delay: 34
12:44:18:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:44:18:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:44:18:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:44:18:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:44:18:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 0
12:44:18:setup_element:INFO:	Scanning data phases
12:44:18:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:44:18:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:44:23:setup_element:INFO:	Data phase scan results for group 0, downlink 0
12:44:23:setup_element:INFO:	Eye window for uplink 8 : __________________________________XXXX__
Data delay found: 15
12:44:23:setup_element:INFO:	Eye window for uplink 9 : XXXXX__________________________________X
Data delay found: 21
12:44:23:setup_element:INFO:	Eye window for uplink 10: XXXXX__________________________________X
Data delay found: 21
12:44:23:setup_element:INFO:	Eye window for uplink 11: ___XXXXXX_______________________________
Data delay found: 25
12:44:23:setup_element:INFO:	Eye window for uplink 12: ___XXXXX________________________________
Data delay found: 25
12:44:23:setup_element:INFO:	Eye window for uplink 13: _____XXXXX______________________________
Data delay found: 27
12:44:23:setup_element:INFO:	Eye window for uplink 14: ______XXXXX_____________________________
Data delay found: 28
12:44:23:setup_element:INFO:	Eye window for uplink 15: _______XXXXX____________________________
Data delay found: 29
12:44:23:setup_element:INFO:	Setting the data phase to 15 for uplink 8
12:44:23:setup_element:INFO:	Setting the data phase to 21 for uplink 9
12:44:23:setup_element:INFO:	Setting the data phase to 21 for uplink 10
12:44:23:setup_element:INFO:	Setting the data phase to 25 for uplink 11
12:44:23:setup_element:INFO:	Setting the data phase to 25 for uplink 12
12:44:23:setup_element:INFO:	Setting the data phase to 27 for uplink 13
12:44:23:setup_element:INFO:	Setting the data phase to 28 for uplink 14
12:44:23:setup_element:INFO:	Setting the data phase to 29 for uplink 15
12:44:23:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXXXXX
      Uplink 11: ______________________________________________________________________XXXXXXXXXX
      Uplink 12: _______________________________________________________________________XXXXXXX__
      Uplink 13: _______________________________________________________________________XXXXXXX__
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 9:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 10:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 11:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 12:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 13:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 14:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 15:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
]
12:44:23:setup_element:INFO:	Beginning SMX ASICs map scan
12:44:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:44:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:44:23:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
12:44:23:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
12:44:23:uplink:INFO:	Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
12:44:23:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 14
12:44:23:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 15
12:44:24:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 12
12:44:24:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 13
12:44:24:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 10
12:44:24:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 11
12:44:24:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 8
12:44:24:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 9
12:44:26:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: ______________________________________________________________________XXXXXXXXXX
      Uplink 11: ______________________________________________________________________XXXXXXXXXX
      Uplink 12: _______________________________________________________________________XXXXXXX__
      Uplink 13: _______________________________________________________________________XXXXXXX__
      Uplink 14: _______________________________________________________________________XXXXXXX__
      Uplink 15: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 9:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 10:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 11:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 12:
      Optimal Phase: 25
      Window Length: 35
      Eye Window: ___XXXXX________________________________
    Uplink 13:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 14:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 15:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________

12:44:26:setup_element:INFO:	Performing Elink synchronization
12:44:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:44:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:44:26:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
12:44:26:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
12:44:26:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
12:44:26:uplink:INFO:	Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
12:44:26:ST3_emu:INFO:	Number of chips: 4
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  0  |  0  |     [14]     |  [(0, 14), (1, 15)]
   3  |   [0]   |  0  |  0  |     [12]     |  [(0, 12), (1, 13)]
   5  |   [0]   |  0  |  0  |     [10]     |  [(0, 10), (1, 11)]
   7  |   [0]   |  0  |  0  |     [8]      |   [(0, 8), (1, 9)] 
12:44:27:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:44:27:febtest:INFO:	14-1 | XA-000-08-002-001-008-103-01 |  21.9 | 1212.7
12:44:27:febtest:INFO:	12-3 | XA-000-08-002-001-008-093-08 |  21.9 | 1201.0
12:44:27:febtest:INFO:	10-5 | XA-000-08-002-001-008-079-15 |   6.1 | 1271.2
12:44:27:febtest:INFO:	8-7 | XA-000-08-002-001-008-090-08 |  25.1 | 1195.1
12:44:27:ST3_smx:INFO:	Configuring SMX FAST
12:44:29:ST3_smx:INFO:	chip: 14-1 	 21.902970 C 	 1212.728715 mV
12:44:29:ST3_smx:INFO:		Electrons
12:44:29:ST3_smx:INFO:	# loops 0
12:44:31:ST3_smx:INFO:	# loops 1
12:44:33:ST3_smx:INFO:	# loops 2
12:44:34:ST3_smx:INFO:	# loops 3
12:44:36:ST3_smx:INFO:	# loops 4
12:44:38:ST3_smx:INFO:	Total # of broken channels: 0
12:44:38:ST3_smx:INFO:	List of broken channels: []
12:44:38:ST3_smx:INFO:	Total # of broken channels: 57
12:44:38:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113]
12:44:38:ST3_smx:INFO:	Configuring SMX FAST
12:44:40:ST3_smx:INFO:	chip: 12-3 	 25.062742 C 	 1195.082160 mV
12:44:40:ST3_smx:INFO:		Electrons
12:44:40:ST3_smx:INFO:	# loops 0
12:44:42:ST3_smx:INFO:	# loops 1
12:44:43:ST3_smx:INFO:	# loops 2
12:44:45:ST3_smx:INFO:	# loops 3
12:44:47:ST3_smx:INFO:	# loops 4
12:44:48:ST3_smx:INFO:	Total # of broken channels: 1
12:44:48:ST3_smx:INFO:	List of broken channels: [17]
12:44:48:ST3_smx:INFO:	Total # of broken channels: 57
12:44:48:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89, 91, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113]
12:44:49:ST3_smx:INFO:	Configuring SMX FAST
12:44:51:ST3_smx:INFO:	chip: 10-5 	 12.438562 C 	 1242.040240 mV
12:44:51:ST3_smx:INFO:		Electrons
12:44:51:ST3_smx:INFO:	# loops 0
12:44:52:ST3_smx:INFO:	# loops 1
12:44:54:ST3_smx:INFO:	# loops 2
12:44:55:ST3_smx:INFO:	# loops 3
12:44:57:ST3_smx:INFO:	# loops 4
12:44:59:ST3_smx:INFO:	Total # of broken channels: 0
12:44:59:ST3_smx:INFO:	List of broken channels: []
12:44:59:ST3_smx:INFO:	Total # of broken channels: 0
12:44:59:ST3_smx:INFO:	List of broken channels: []
12:44:59:ST3_smx:INFO:	Configuring SMX FAST
12:45:01:ST3_smx:INFO:	chip: 8-7 	 25.062742 C 	 1195.082160 mV
12:45:01:ST3_smx:INFO:		Electrons
12:45:01:ST3_smx:INFO:	# loops 0
12:45:03:ST3_smx:INFO:	# loops 1
12:45:04:ST3_smx:INFO:	# loops 2
12:45:06:ST3_smx:INFO:	# loops 3
12:45:08:ST3_smx:INFO:	# loops 4
12:45:09:ST3_smx:INFO:	Total # of broken channels: 0
12:45:09:ST3_smx:INFO:	List of broken channels: []
12:45:09:ST3_smx:INFO:	Total # of broken channels: 0
12:45:09:ST3_smx:INFO:	List of broken channels: []
12:45:10:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:45:10:febtest:INFO:	14-1 | XA-000-08-002-001-008-103-01 |  21.9 | 1218.6
12:45:10:febtest:INFO:	12-3 | XA-000-08-002-001-008-093-08 |  25.1 | 1195.1
12:45:11:febtest:INFO:	10-5 | XA-000-08-002-001-008-079-15 |  12.4 | 1247.9
12:45:11:febtest:INFO:	8-7 | XA-000-08-002-001-008-090-08 |  28.2 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_22-12_44_15
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 2093
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '0.7665', '1.847', '1.5860', '7.000', '1.5720', '7.000', '1.5720']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
12:45:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:45:14:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
12:45:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:45:14:febtest:INFO:	Testing FEB with SN 2093
12:45:15:smx_tester:INFO:	Scanning setup
12:45:15:elinks:INFO:	Disabling clock on downlink 0
12:45:15:elinks:INFO:	Disabling clock on downlink 1
12:45:15:elinks:INFO:	Disabling clock on downlink 2
12:45:15:elinks:INFO:	Disabling clock on downlink 3
12:45:15:elinks:INFO:	Disabling clock on downlink 4
12:45:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:45:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:45:15:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 8
12:45:15:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 9
12:45:15:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 10
12:45:15:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 11
12:45:15:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 12
12:45:15:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 13
12:45:15:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 14
12:45:15:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 15
12:45:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:45:15:elinks:INFO:	Disabling clock on downlink 0
12:45:15:elinks:INFO:	Disabling clock on downlink 1
12:45:15:elinks:INFO:	Disabling clock on downlink 2
12:45:15:elinks:INFO:	Disabling clock on downlink 3
12:45:15:elinks:INFO:	Disabling clock on downlink 4
12:45:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:45:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:45:15:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:45:15:elinks:INFO:	Disabling clock on downlink 0
12:45:15:elinks:INFO:	Disabling clock on downlink 1
12:45:15:elinks:INFO:	Disabling clock on downlink 2
12:45:15:elinks:INFO:	Disabling clock on downlink 3
12:45:15:elinks:INFO:	Disabling clock on downlink 4
12:45:15:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:45:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:45:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:45:16:elinks:INFO:	Disabling clock on downlink 0
12:45:16:elinks:INFO:	Disabling clock on downlink 1
12:45:16:elinks:INFO:	Disabling clock on downlink 2
12:45:16:elinks:INFO:	Disabling clock on downlink 3
12:45:16:elinks:INFO:	Disabling clock on downlink 4
12:45:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:45:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:45:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:45:16:elinks:INFO:	Disabling clock on downlink 0
12:45:16:elinks:INFO:	Disabling clock on downlink 1
12:45:16:elinks:INFO:	Disabling clock on downlink 2
12:45:16:elinks:INFO:	Disabling clock on downlink 3
12:45:16:elinks:INFO:	Disabling clock on downlink 4
12:45:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:45:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:45:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:45:16:setup_element:INFO:	Scanning clock phase
12:45:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:45:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:45:16:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
12:45:16:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:45:16:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:45:16:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXXXX_
Clock Delay: 33
12:45:16:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXXXX_
Clock Delay: 33
12:45:16:setup_element:INFO:	Eye window for uplink 12: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:45:16:setup_element:INFO:	Eye window for uplink 13: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:45:16:setup_element:INFO:	Eye window for uplink 14: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:45:16:setup_element:INFO:	Eye window for uplink 15: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:45:16:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 0
12:45:16:setup_element:INFO:	Scanning data phases
12:45:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:45:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:45:22:setup_element:INFO:	Data phase scan results for group 0, downlink 0
12:45:22:setup_element:INFO:	Eye window for uplink 8 : X___________________________________XXX_
Data delay found: 18
12:45:22:setup_element:INFO:	Eye window for uplink 9 : _XXXX___________________________________
Data delay found: 22
12:45:22:setup_element:INFO:	Eye window for uplink 10: _XXXXX__________________________________
Data delay found: 23
12:45:22:setup_element:INFO:	Eye window for uplink 11: ____XXXXXX______________________________
Data delay found: 26
12:45:22:setup_element:INFO:	Eye window for uplink 12: ____XXXXX_______________________________
Data delay found: 26
12:45:22:setup_element:INFO:	Eye window for uplink 13: _______XXXX_____________________________
Data delay found: 28
12:45:22:setup_element:INFO:	Eye window for uplink 14: ______XXXXX_____________________________
Data delay found: 28
12:45:22:setup_element:INFO:	Eye window for uplink 15: ________XXXXX___________________________
Data delay found: 30
12:45:22:setup_element:INFO:	Setting the data phase to 18 for uplink 8
12:45:22:setup_element:INFO:	Setting the data phase to 22 for uplink 9
12:45:22:setup_element:INFO:	Setting the data phase to 23 for uplink 10
12:45:22:setup_element:INFO:	Setting the data phase to 26 for uplink 11
12:45:22:setup_element:INFO:	Setting the data phase to 26 for uplink 12
12:45:22:setup_element:INFO:	Setting the data phase to 28 for uplink 13
12:45:22:setup_element:INFO:	Setting the data phase to 28 for uplink 14
12:45:22:setup_element:INFO:	Setting the data phase to 30 for uplink 15
12:45:22:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: _____________________________________________________________________XXXXXXXXXX_
      Uplink 11: _____________________________________________________________________XXXXXXXXXX_
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: _______________________________________________________________________XXXXXXXX_
      Uplink 15: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXX_
    Uplink 9:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
    Uplink 10:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 11:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 12:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 13:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 14:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 15:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
]
12:45:22:setup_element:INFO:	Beginning SMX ASICs map scan
12:45:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:45:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:45:22:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
12:45:22:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
12:45:22:uplink:INFO:	Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
12:45:22:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 14
12:45:22:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 15
12:45:22:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 12
12:45:22:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 13
12:45:23:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 10
12:45:23:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 11
12:45:23:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 8
12:45:23:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 9
12:45:24:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  8: ______________________________________________________________________XXXXXXXX__
      Uplink  9: ______________________________________________________________________XXXXXXXX__
      Uplink 10: _____________________________________________________________________XXXXXXXXXX_
      Uplink 11: _____________________________________________________________________XXXXXXXXXX_
      Uplink 12: ______________________________________________________________________XXXXXXX___
      Uplink 13: ______________________________________________________________________XXXXXXX___
      Uplink 14: _______________________________________________________________________XXXXXXXX_
      Uplink 15: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXX_
    Uplink 9:
      Optimal Phase: 22
      Window Length: 36
      Eye Window: _XXXX___________________________________
    Uplink 10:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 11:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 12:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 13:
      Optimal Phase: 28
      Window Length: 36
      Eye Window: _______XXXX_____________________________
    Uplink 14:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 15:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________

12:45:24:setup_element:INFO:	Performing Elink synchronization
12:45:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:45:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
12:45:24:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
12:45:24:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
12:45:24:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
12:45:24:uplink:INFO:	Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
12:45:24:ST3_emu:INFO:	Number of chips: 4
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  0  |  0  |     [14]     |  [(0, 14), (1, 15)]
   3  |   [0]   |  0  |  0  |     [12]     |  [(0, 12), (1, 13)]
   5  |   [0]   |  0  |  0  |     [10]     |  [(0, 10), (1, 11)]
   7  |   [0]   |  0  |  0  |     [8]      |   [(0, 8), (1, 9)] 
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_14
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_8
12:45:25:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:45:25:febtest:INFO:	14-1 | XA-000-08-002-001-008-103-01 |  25.1 | 1212.7
12:45:26:febtest:INFO:	12-3 | XA-000-08-002-001-008-093-08 |  25.1 | 1206.9
12:45:26:febtest:INFO:	10-5 | XA-000-08-002-001-008-079-15 |   6.1 | 1271.2
12:45:26:febtest:INFO:	8-7 | XA-000-08-002-001-008-090-08 |  25.1 | 1195.1
12:45:26:ST3_smx:INFO:	Configuring SMX FAST
12:45:28:ST3_smx:INFO:	chip: 14-1 	 25.062742 C 	 1212.728715 mV
12:45:28:ST3_smx:INFO:		Electrons
12:45:28:ST3_smx:INFO:	# loops 0
12:45:30:ST3_smx:INFO:	# loops 1
12:45:31:ST3_smx:INFO:	# loops 2
12:45:33:ST3_smx:INFO:	# loops 3
12:45:35:ST3_smx:INFO:	# loops 4
12:45:36:ST3_smx:INFO:	Total # of broken channels: 0
12:45:36:ST3_smx:INFO:	List of broken channels: []
12:45:36:ST3_smx:INFO:	Total # of broken channels: 0
12:45:36:ST3_smx:INFO:	List of broken channels: []
12:45:37:ST3_smx:INFO:	Configuring SMX FAST
12:45:39:ST3_smx:INFO:	chip: 12-3 	 28.225000 C 	 1189.190035 mV
12:45:39:ST3_smx:INFO:		Electrons
12:45:39:ST3_smx:INFO:	# loops 0
12:45:40:ST3_smx:INFO:	# loops 1
12:45:42:ST3_smx:INFO:	# loops 2
12:45:44:ST3_smx:INFO:	# loops 3
12:45:45:ST3_smx:INFO:	# loops 4
12:45:47:ST3_smx:INFO:	Total # of broken channels: 0
12:45:47:ST3_smx:INFO:	List of broken channels: []
12:45:47:ST3_smx:INFO:	Total # of broken channels: 0
12:45:47:ST3_smx:INFO:	List of broken channels: []
12:45:48:ST3_smx:INFO:	Configuring SMX FAST
12:45:50:ST3_smx:INFO:	chip: 10-5 	 12.438562 C 	 1247.887635 mV
12:45:50:ST3_smx:INFO:		Electrons
12:45:50:ST3_smx:INFO:	# loops 0
12:45:51:ST3_smx:INFO:	# loops 1
12:45:53:ST3_smx:INFO:	# loops 2
12:45:54:ST3_smx:INFO:	# loops 3
12:45:56:ST3_smx:INFO:	# loops 4
12:45:58:ST3_smx:INFO:	Total # of broken channels: 0
12:45:58:ST3_smx:INFO:	List of broken channels: []
12:45:58:ST3_smx:INFO:	Total # of broken channels: 0
12:45:58:ST3_smx:INFO:	List of broken channels: []
12:45:58:ST3_smx:INFO:	Configuring SMX FAST
12:46:00:ST3_smx:INFO:	chip: 8-7 	 28.225000 C 	 1195.082160 mV
12:46:00:ST3_smx:INFO:		Electrons
12:46:00:ST3_smx:INFO:	# loops 0
12:46:02:ST3_smx:INFO:	# loops 1
12:46:03:ST3_smx:INFO:	# loops 2
12:46:05:ST3_smx:INFO:	# loops 3
12:46:06:ST3_smx:INFO:	# loops 4
12:46:08:ST3_smx:INFO:	Total # of broken channels: 0
12:46:08:ST3_smx:INFO:	List of broken channels: []
12:46:08:ST3_smx:INFO:	Total # of broken channels: 0
12:46:08:ST3_smx:INFO:	List of broken channels: []
12:46:08:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:46:09:febtest:INFO:	14-1 | XA-000-08-002-001-008-103-01 |  21.9 | 1218.6
12:46:09:febtest:INFO:	12-3 | XA-000-08-002-001-008-093-08 |  28.2 | 1195.1
12:46:09:febtest:INFO:	10-5 | XA-000-08-002-001-008-079-15 |  12.4 | 1247.9
12:46:09:febtest:INFO:	8-7 | XA-000-08-002-001-008-090-08 |  28.2 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_22-12_45_14
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 2093
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '0.9597', '1.847', '1.5460', '7.000', '1.5770', '7.000', '1.5770']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
12:47:51:febtest:INFO:	FEB 8-2 selected
12:47:51:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
12:47:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:47:58:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
12:47:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:47:59:febtest:INFO:	Testing FEB with SN 2084
12:48:00:smx_tester:INFO:	Scanning setup
12:48:00:elinks:INFO:	Disabling clock on downlink 0
12:48:00:elinks:INFO:	Disabling clock on downlink 1
12:48:00:elinks:INFO:	Disabling clock on downlink 2
12:48:00:elinks:INFO:	Disabling clock on downlink 3
12:48:00:elinks:INFO:	Disabling clock on downlink 4
12:48:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:48:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:48:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:48:00:elinks:INFO:	Disabling clock on downlink 0
12:48:00:elinks:INFO:	Disabling clock on downlink 1
12:48:00:elinks:INFO:	Disabling clock on downlink 2
12:48:00:elinks:INFO:	Disabling clock on downlink 3
12:48:00:elinks:INFO:	Disabling clock on downlink 4
12:48:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:48:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:48:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:48:00:elinks:INFO:	Disabling clock on downlink 0
12:48:00:elinks:INFO:	Disabling clock on downlink 1
12:48:00:elinks:INFO:	Disabling clock on downlink 2
12:48:00:elinks:INFO:	Disabling clock on downlink 3
12:48:00:elinks:INFO:	Disabling clock on downlink 4
12:48:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:48:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:48:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:48:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:48:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:48:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:48:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:48:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:48:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:48:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:48:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:48:01:elinks:INFO:	Disabling clock on downlink 0
12:48:01:elinks:INFO:	Disabling clock on downlink 1
12:48:01:elinks:INFO:	Disabling clock on downlink 2
12:48:01:elinks:INFO:	Disabling clock on downlink 3
12:48:01:elinks:INFO:	Disabling clock on downlink 4
12:48:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:48:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:48:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:48:01:elinks:INFO:	Disabling clock on downlink 0
12:48:01:elinks:INFO:	Disabling clock on downlink 1
12:48:01:elinks:INFO:	Disabling clock on downlink 2
12:48:01:elinks:INFO:	Disabling clock on downlink 3
12:48:01:elinks:INFO:	Disabling clock on downlink 4
12:48:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:48:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:48:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:48:01:setup_element:INFO:	Scanning clock phase
12:48:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:48:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:48:01:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:48:01:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
12:48:01:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
12:48:01:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
12:48:01:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
12:48:01:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:48:01:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:48:01:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:48:01:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:48:01:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
12:48:01:setup_element:INFO:	Scanning data phases
12:48:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:48:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:48:06:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:48:06:setup_element:INFO:	Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
12:48:06:setup_element:INFO:	Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
12:48:06:setup_element:INFO:	Eye window for uplink 26: _________XXXXX__________________________
Data delay found: 31
12:48:07:setup_element:INFO:	Eye window for uplink 27: _____________XXXXX______________________
Data delay found: 35
12:48:07:setup_element:INFO:	Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
12:48:07:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
12:48:07:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
12:48:07:setup_element:INFO:	Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
12:48:07:setup_element:INFO:	Setting the data phase to 29 for uplink 24
12:48:07:setup_element:INFO:	Setting the data phase to 32 for uplink 25
12:48:07:setup_element:INFO:	Setting the data phase to 31 for uplink 26
12:48:07:setup_element:INFO:	Setting the data phase to 35 for uplink 27
12:48:07:setup_element:INFO:	Setting the data phase to 36 for uplink 28
12:48:07:setup_element:INFO:	Setting the data phase to 37 for uplink 29
12:48:07:setup_element:INFO:	Setting the data phase to 38 for uplink 30
12:48:07:setup_element:INFO:	Setting the data phase to 37 for uplink 31
12:48:07:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 24: ______________________________________________________________________XXXXXXXXX_
      Uplink 25: ______________________________________________________________________XXXXXXXXX_
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: ______________________________________________________________________XXXXXXXX__
      Uplink 29: ______________________________________________________________________XXXXXXXX__
      Uplink 30: _______________________________________________________________________XXXXXXX__
      Uplink 31: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 27:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 28:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 30:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
]
12:48:07:setup_element:INFO:	Beginning SMX ASICs map scan
12:48:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:48:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:48:07:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:48:07:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:48:07:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
12:48:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:48:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:48:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:48:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:48:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:48:08:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:48:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:48:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:48:09:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink 24: ______________________________________________________________________XXXXXXXXX_
      Uplink 25: ______________________________________________________________________XXXXXXXXX_
      Uplink 26: _____________________________________________________________________XXXXXXXXX__
      Uplink 27: _____________________________________________________________________XXXXXXXXX__
      Uplink 28: ______________________________________________________________________XXXXXXXX__
      Uplink 29: ______________________________________________________________________XXXXXXXX__
      Uplink 30: _______________________________________________________________________XXXXXXX__
      Uplink 31: _______________________________________________________________________XXXXXXX__
  Data phase characteristics:
    Uplink 24:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 25:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 26:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 27:
      Optimal Phase: 35
      Window Length: 35
      Eye Window: _____________XXXXX______________________
    Uplink 28:
      Optimal Phase: 36
      Window Length: 35
      Eye Window: ______________XXXXX_____________________
    Uplink 29:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 30:
      Optimal Phase: 38
      Window Length: 34
      Eye Window: ________________XXXXXX__________________
    Uplink 31:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________

12:48:09:setup_element:INFO:	Performing Elink synchronization
12:48:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:48:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:48:09:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:48:09:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:48:09:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:48:09:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
12:48:09:ST3_emu:INFO:	Number of chips: 4
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
12:48:10:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:48:10:febtest:INFO:	30-1 | XA-000-08-002-001-008-137-00 |  25.1 | 1201.0
12:48:10:febtest:INFO:	28-3 | XA-000-08-002-001-008-102-01 |  25.1 | 1201.0
12:48:11:febtest:INFO:	26-5 | XA-000-08-002-001-008-157-07 |  21.9 | 1218.6
12:48:11:febtest:INFO:	24-7 | XA-000-08-002-001-008-162-14 |  18.7 | 1218.6
12:48:11:ST3_smx:INFO:	Configuring SMX FAST
12:48:13:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1189.190035 mV
12:48:13:ST3_smx:INFO:		Electrons
12:48:13:ST3_smx:INFO:	# loops 0
12:48:15:ST3_smx:INFO:	# loops 1
12:48:16:ST3_smx:INFO:	# loops 2
12:48:18:ST3_smx:INFO:	# loops 3
12:48:19:ST3_smx:INFO:	# loops 4
12:48:21:ST3_smx:INFO:	Total # of broken channels: 0
12:48:21:ST3_smx:INFO:	List of broken channels: []
12:48:21:ST3_smx:INFO:	Total # of broken channels: 0
12:48:21:ST3_smx:INFO:	List of broken channels: []
12:48:22:ST3_smx:INFO:	Configuring SMX FAST
12:48:24:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1195.082160 mV
12:48:24:ST3_smx:INFO:		Electrons
12:48:24:ST3_smx:INFO:	# loops 0
12:48:25:ST3_smx:INFO:	# loops 1
12:48:27:ST3_smx:INFO:	# loops 2
12:48:29:ST3_smx:INFO:	# loops 3
12:48:30:ST3_smx:INFO:	# loops 4
12:48:32:ST3_smx:INFO:	Total # of broken channels: 0
12:48:32:ST3_smx:INFO:	List of broken channels: []
12:48:32:ST3_smx:INFO:	Total # of broken channels: 0
12:48:32:ST3_smx:INFO:	List of broken channels: []
12:48:32:ST3_smx:INFO:	Configuring SMX FAST
12:48:34:ST3_smx:INFO:	chip: 26-5 	 15.590880 C 	 1230.330540 mV
12:48:34:ST3_smx:INFO:		Electrons
12:48:34:ST3_smx:INFO:	# loops 0
12:48:36:ST3_smx:INFO:	# loops 1
12:48:38:ST3_smx:INFO:	# loops 2
12:48:39:ST3_smx:INFO:	# loops 3
12:48:41:ST3_smx:INFO:	# loops 4
12:48:43:ST3_smx:INFO:	Total # of broken channels: 0
12:48:43:ST3_smx:INFO:	List of broken channels: []
12:48:43:ST3_smx:INFO:	Total # of broken channels: 0
12:48:43:ST3_smx:INFO:	List of broken channels: []
12:48:43:ST3_smx:INFO:	Configuring SMX FAST
12:48:45:ST3_smx:INFO:	chip: 24-7 	 21.902970 C 	 1212.728715 mV
12:48:45:ST3_smx:INFO:		Electrons
12:48:45:ST3_smx:INFO:	# loops 0
12:48:47:ST3_smx:INFO:	# loops 1
12:48:49:ST3_smx:INFO:	# loops 2
12:48:50:ST3_smx:INFO:	# loops 3
12:48:52:ST3_smx:INFO:	# loops 4
12:48:53:ST3_smx:INFO:	Total # of broken channels: 0
12:48:53:ST3_smx:INFO:	List of broken channels: []
12:48:53:ST3_smx:INFO:	Total # of broken channels: 0
12:48:53:ST3_smx:INFO:	List of broken channels: []
12:48:54:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:48:54:febtest:INFO:	30-1 | XA-000-08-002-001-008-137-00 |  28.2 | 1189.2
12:48:54:febtest:INFO:	28-3 | XA-000-08-002-001-008-102-01 |  28.2 | 1201.0
12:48:55:febtest:INFO:	26-5 | XA-000-08-002-001-008-157-07 |  15.6 | 1230.3
12:48:55:febtest:INFO:	24-7 | XA-000-08-002-001-008-162-14 |  21.9 | 1212.7
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_22-12_47_58
OPERATOR  : Robert V.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 2084
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.448', '0.7856', '1.847', '1.0030', '7.000', '1.5720', '7.000', '1.5720']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
12:49:18:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2084/TestDate_2024_01_22-12_47_58/