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FEB_2085 29.01.24 10:43:46
Info
10:43:14:febtest:INFO: FEB 8-2 selected
10:43:14:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:43:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:43:46:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
10:43:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:43:47:febtest:INFO: Testing FEB with SN 2085
10:43:48:smx_tester:INFO: Scanning setup
10:43:48:elinks:INFO: Disabling clock on downlink 0
10:43:48:elinks:INFO: Disabling clock on downlink 1
10:43:48:elinks:INFO: Disabling clock on downlink 2
10:43:48:elinks:INFO: Disabling clock on downlink 3
10:43:48:elinks:INFO: Disabling clock on downlink 4
10:43:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:43:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:43:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:43:49:elinks:INFO: Disabling clock on downlink 0
10:43:49:elinks:INFO: Disabling clock on downlink 1
10:43:49:elinks:INFO: Disabling clock on downlink 2
10:43:49:elinks:INFO: Disabling clock on downlink 3
10:43:49:elinks:INFO: Disabling clock on downlink 4
10:43:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:43:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:43:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:43:49:elinks:INFO: Disabling clock on downlink 0
10:43:49:elinks:INFO: Disabling clock on downlink 1
10:43:49:elinks:INFO: Disabling clock on downlink 2
10:43:49:elinks:INFO: Disabling clock on downlink 3
10:43:49:elinks:INFO: Disabling clock on downlink 4
10:43:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:43:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:43:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:43:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:43:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:43:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:43:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:43:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:43:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:43:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:43:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:43:49:elinks:INFO: Disabling clock on downlink 0
10:43:49:elinks:INFO: Disabling clock on downlink 1
10:43:49:elinks:INFO: Disabling clock on downlink 2
10:43:49:elinks:INFO: Disabling clock on downlink 3
10:43:49:elinks:INFO: Disabling clock on downlink 4
10:43:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:43:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:43:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:43:49:elinks:INFO: Disabling clock on downlink 0
10:43:49:elinks:INFO: Disabling clock on downlink 1
10:43:49:elinks:INFO: Disabling clock on downlink 2
10:43:49:elinks:INFO: Disabling clock on downlink 3
10:43:49:elinks:INFO: Disabling clock on downlink 4
10:43:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:43:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:43:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:43:49:setup_element:INFO: Scanning clock phase
10:43:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:43:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:43:50:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:43:50:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:43:50:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:43:50:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:43:50:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:43:50:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:43:50:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:43:50:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:43:50:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:43:50:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
10:43:50:setup_element:INFO: Scanning data phases
10:43:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:43:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:43:55:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:43:55:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
10:43:55:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
10:43:55:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
10:43:55:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
10:43:55:setup_element:INFO: Eye window for uplink 28: __________XXXXXX________________________
Data delay found: 32
10:43:55:setup_element:INFO: Eye window for uplink 29: ___________XXXXXX_______________________
Data delay found: 33
10:43:55:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXX____________________
Data delay found: 36
10:43:55:setup_element:INFO: Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
10:43:55:setup_element:INFO: Setting the data phase to 26 for uplink 24
10:43:55:setup_element:INFO: Setting the data phase to 29 for uplink 25
10:43:55:setup_element:INFO: Setting the data phase to 29 for uplink 26
10:43:55:setup_element:INFO: Setting the data phase to 32 for uplink 27
10:43:55:setup_element:INFO: Setting the data phase to 32 for uplink 28
10:43:55:setup_element:INFO: Setting the data phase to 33 for uplink 29
10:43:55:setup_element:INFO: Setting the data phase to 36 for uplink 30
10:43:55:setup_element:INFO: Setting the data phase to 34 for uplink 31
10:43:55:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 29:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 30:
Optimal Phase: 36
Window Length: 33
Eye Window: _____________XXXXXXX____________________
Uplink 31:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
]
10:43:55:setup_element:INFO: Beginning SMX ASICs map scan
10:43:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:43:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:43:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:43:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:43:55:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:43:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:43:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:43:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:43:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:43:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:43:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:43:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:43:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:43:58:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 33
Window Length: 71
Eye Windows:
Uplink 24: _____________________________________________________________________XXXXXXXX___
Uplink 25: _____________________________________________________________________XXXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: _____________________________________________________________________XXXXXXXX___
Uplink 29: _____________________________________________________________________XXXXXXXX___
Uplink 30: _____________________________________________________________________XXXXXXXX___
Uplink 31: _____________________________________________________________________XXXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 27:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 28:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 29:
Optimal Phase: 33
Window Length: 34
Eye Window: ___________XXXXXX_______________________
Uplink 30:
Optimal Phase: 36
Window Length: 33
Eye Window: _____________XXXXXXX____________________
Uplink 31:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
10:43:58:setup_element:INFO: Performing Elink synchronization
10:43:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:43:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:43:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:43:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:43:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:43:58:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
10:43:58:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
10:43:59:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:43:59:febtest:INFO: 30-1 | XA-000-08-002-000-000-076-11 | 15.6 | 1288.7
10:43:59:febtest:INFO: 28-3 | XA-000-08-002-000-000-068-11 | 34.6 | 1201.0
10:44:00:febtest:INFO: 26-5 | XA-000-08-002-000-000-073-11 | 34.6 | 1189.2
10:44:00:febtest:INFO: 24-7 | XA-000-08-002-000-000-087-12 | 50.4 | 1130.0
10:44:00:ST3_smx:INFO: Configuring SMX FAST
10:44:02:ST3_smx:INFO: chip: 30-1 21.902970 C 1271.227515 mV
10:44:02:ST3_smx:INFO: Electrons
10:44:02:ST3_smx:INFO: # loops 0
10:44:04:ST3_smx:INFO: # loops 1
10:44:05:ST3_smx:INFO: # loops 2
10:44:07:ST3_smx:INFO: # loops 3
10:44:08:ST3_smx:INFO: # loops 4
10:44:10:ST3_smx:INFO: Total # of broken channels: 0
10:44:10:ST3_smx:INFO: List of broken channels: []
10:44:10:ST3_smx:INFO: Total # of broken channels: 0
10:44:10:ST3_smx:INFO: List of broken channels: []
10:44:11:ST3_smx:INFO: Configuring SMX FAST
10:44:13:ST3_smx:INFO: chip: 28-3 37.726682 C 1195.082160 mV
10:44:13:ST3_smx:INFO: Electrons
10:44:13:ST3_smx:INFO: # loops 0
10:44:15:ST3_smx:INFO: # loops 1
10:44:16:ST3_smx:INFO: # loops 2
10:44:18:ST3_smx:INFO: # loops 3
10:44:20:ST3_smx:INFO: # loops 4
10:44:21:ST3_smx:INFO: Total # of broken channels: 0
10:44:21:ST3_smx:INFO: List of broken channels: []
10:44:21:ST3_smx:INFO: Total # of broken channels: 0
10:44:21:ST3_smx:INFO: List of broken channels: []
10:44:22:ST3_smx:INFO: Configuring SMX FAST
10:44:24:ST3_smx:INFO: chip: 26-5 34.556970 C 1195.082160 mV
10:44:24:ST3_smx:INFO: Electrons
10:44:24:ST3_smx:INFO: # loops 0
10:44:26:ST3_smx:INFO: # loops 1
10:44:27:ST3_smx:INFO: # loops 2
10:44:29:ST3_smx:INFO: # loops 3
10:44:31:ST3_smx:INFO: # loops 4
10:44:32:ST3_smx:INFO: Total # of broken channels: 0
10:44:32:ST3_smx:INFO: List of broken channels: []
10:44:32:ST3_smx:INFO: Total # of broken channels: 0
10:44:32:ST3_smx:INFO: List of broken channels: []
10:44:33:ST3_smx:INFO: Configuring SMX FAST
10:44:35:ST3_smx:INFO: chip: 24-7 56.797143 C 1118.096875 mV
10:44:35:ST3_smx:INFO: Electrons
10:44:35:ST3_smx:INFO: # loops 0
10:44:37:ST3_smx:INFO: # loops 1
10:44:39:ST3_smx:INFO: # loops 2
10:44:41:ST3_smx:INFO: # loops 3
10:44:42:ST3_smx:INFO: # loops 4
10:44:44:ST3_smx:INFO: Total # of broken channels: 0
10:44:44:ST3_smx:INFO: List of broken channels: []
10:44:44:ST3_smx:INFO: Total # of broken channels: 0
10:44:44:ST3_smx:INFO: List of broken channels: []
10:44:45:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:44:45:febtest:INFO: 30-1 | XA-000-08-002-000-000-076-11 | 25.1 | 1282.9
10:44:45:febtest:INFO: 28-3 | XA-000-08-002-000-000-068-11 | 37.7 | 1195.1
10:44:45:febtest:INFO: 26-5 | XA-000-08-002-000-000-073-11 | 37.7 | 1195.1
10:44:46:febtest:INFO: 24-7 | XA-000-08-002-000-000-087-12 | 56.8 | 1118.1
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_29-10_43_46
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6T1001191A2 124 D
FEB_SN : 2085
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.450', '0.9613', '1.850', '1.3770', '0.000', '0.0000', '7.000', '1.5810']
VI_after__Init : ['2.450', '2.0050', '1.850', '0.4454', '0.000', '0.0000', '7.000', '1.5770']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
10:44:49:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2085/TestDate_2024_01_29-10_43_46/