08:59:33:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; Robert V.; 
08:59:34:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
08:59:35:ST3_Shared:INFO:	Listo of operators:Alois Alzheimer
08:59:36:ST3_Shared:INFO:	Listo of operators:Olga B.; 
08:59:37:ST3_Shared:INFO:	Listo of operators:Kerstin S.; Olga B.; 
09:00:04:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:00:04:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:00:04:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:01:21:ST3_ModuleSelector:INFO:	L4DL200116 M4DL2B0001160B2 42 A

09:01:21:ST3_ModuleSelector:INFO:	13412

09:01:22:febtest:INFO:	Testing FEB with SN 2062
09:01:25:smx_tester:INFO:	Scanning setup
09:01:25:elinks:INFO:	Disabling clock on downlink 0
09:01:25:elinks:INFO:	Disabling clock on downlink 1
09:01:25:elinks:INFO:	Disabling clock on downlink 2
09:01:25:elinks:INFO:	Disabling clock on downlink 3
09:01:25:elinks:INFO:	Disabling clock on downlink 4
09:01:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:01:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:01:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:01:25:elinks:INFO:	Disabling clock on downlink 0
09:01:25:elinks:INFO:	Disabling clock on downlink 1
09:01:25:elinks:INFO:	Disabling clock on downlink 2
09:01:25:elinks:INFO:	Disabling clock on downlink 3
09:01:25:elinks:INFO:	Disabling clock on downlink 4
09:01:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:01:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:01:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:01:25:elinks:INFO:	Disabling clock on downlink 0
09:01:25:elinks:INFO:	Disabling clock on downlink 1
09:01:25:elinks:INFO:	Disabling clock on downlink 2
09:01:25:elinks:INFO:	Disabling clock on downlink 3
09:01:25:elinks:INFO:	Disabling clock on downlink 4
09:01:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:01:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:01:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:01:25:elinks:INFO:	Disabling clock on downlink 0
09:01:25:elinks:INFO:	Disabling clock on downlink 1
09:01:25:elinks:INFO:	Disabling clock on downlink 2
09:01:25:elinks:INFO:	Disabling clock on downlink 3
09:01:25:elinks:INFO:	Disabling clock on downlink 4
09:01:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:01:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:01:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:01:25:elinks:INFO:	Disabling clock on downlink 0
09:01:25:elinks:INFO:	Disabling clock on downlink 1
09:01:25:elinks:INFO:	Disabling clock on downlink 2
09:01:25:elinks:INFO:	Disabling clock on downlink 3
09:01:25:elinks:INFO:	Disabling clock on downlink 4
09:01:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:01:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:01:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:01:25:setup_element:INFO:	Scanning clock phase
09:01:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:01:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:26:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:01:26:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
09:01:26:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
09:01:26:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:01:26:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:01:26:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:01:26:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:01:26:setup_element:INFO:	Eye window for uplink 22: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:01:26:setup_element:INFO:	Eye window for uplink 23: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:01:26:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:01:26:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:01:26:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:01:26:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:01:26:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:01:26:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:01:26:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:01:26:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:01:26:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
09:01:26:setup_element:INFO:	Scanning data phases
09:01:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:01:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:31:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:01:31:setup_element:INFO:	Eye window for uplink 16: XX__________________________________XXXX
Data delay found: 18
09:01:31:setup_element:INFO:	Eye window for uplink 17: _________________________________XXXX___
Data delay found: 14
09:01:31:setup_element:INFO:	Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
09:01:31:setup_element:INFO:	Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
09:01:31:setup_element:INFO:	Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
09:01:31:setup_element:INFO:	Eye window for uplink 21: ___________________________________XXXXX
Data delay found: 17
09:01:31:setup_element:INFO:	Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
09:01:31:setup_element:INFO:	Eye window for uplink 23: X___________________________________XXXX
Data delay found: 18
09:01:31:setup_element:INFO:	Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
09:01:31:setup_element:INFO:	Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
09:01:31:setup_element:INFO:	Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
09:01:31:setup_element:INFO:	Eye window for uplink 27: ________XXXXX___________________________
Data delay found: 30
09:01:31:setup_element:INFO:	Eye window for uplink 28: _________XXXXXX_________________________
Data delay found: 31
09:01:32:setup_element:INFO:	Eye window for uplink 29: ___________XXXXXX_______________________
Data delay found: 33
09:01:32:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
09:01:32:setup_element:INFO:	Eye window for uplink 31: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
09:01:32:setup_element:INFO:	Setting the data phase to 18 for uplink 16
09:01:32:setup_element:INFO:	Setting the data phase to 14 for uplink 17
09:01:32:setup_element:INFO:	Setting the data phase to 18 for uplink 18
09:01:32:setup_element:INFO:	Setting the data phase to 16 for uplink 19
09:01:32:setup_element:INFO:	Setting the data phase to 18 for uplink 20
09:01:32:setup_element:INFO:	Setting the data phase to 17 for uplink 21
09:01:32:setup_element:INFO:	Setting the data phase to 19 for uplink 22
09:01:32:setup_element:INFO:	Setting the data phase to 18 for uplink 23
09:01:32:setup_element:INFO:	Setting the data phase to 26 for uplink 24
09:01:32:setup_element:INFO:	Setting the data phase to 29 for uplink 25
09:01:32:setup_element:INFO:	Setting the data phase to 27 for uplink 26
09:01:32:setup_element:INFO:	Setting the data phase to 30 for uplink 27
09:01:32:setup_element:INFO:	Setting the data phase to 31 for uplink 28
09:01:32:setup_element:INFO:	Setting the data phase to 33 for uplink 29
09:01:32:setup_element:INFO:	Setting the data phase to 7 for uplink 30
09:01:32:setup_element:INFO:	Setting the data phase to 6 for uplink 31
09:01:32:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________________
      Uplink 17: ________________________________________________________________________________
      Uplink 18: _______________________________________________________________________XXXXXXXX_
      Uplink 19: _______________________________________________________________________XXXXXXXX_
      Uplink 20: ______________________________________________________________________XXXXXXXX__
      Uplink 21: ______________________________________________________________________XXXXXXXX__
      Uplink 22: _______________________________________________________________________XXXXXXXXX
      Uplink 23: _______________________________________________________________________XXXXXXXXX
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: ______________________________________________________________________XXXXXXX___
      Uplink 27: ______________________________________________________________________XXXXXXX___
      Uplink 28: ______________________________________________________________________XXXXXXXX__
      Uplink 29: ______________________________________________________________________XXXXXXXX__
      Uplink 30: ________________________________________________________________________XXXXXXX_
      Uplink 31: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 17:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 20:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 21:
      Optimal Phase: 17
      Window Length: 35
      Eye Window: ___________________________________XXXXX
    Uplink 22:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 23:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 24:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 26:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 27:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 30:
      Optimal Phase: 7
      Window Length: 16
      Eye Window: ________________XXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 31:
      Optimal Phase: 6
      Window Length: 14
      Eye Window: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX
]
09:01:32:setup_element:INFO:	Beginning SMX ASICs map scan
09:01:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:01:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:32:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:01:32:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:01:32:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:01:32:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:01:32:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:01:32:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:01:32:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:01:32:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:01:32:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:01:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:01:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:01:32:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:01:32:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:01:33:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:01:33:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:01:33:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:01:33:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:01:33:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:01:33:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:01:34:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________________
      Uplink 17: ________________________________________________________________________________
      Uplink 18: _______________________________________________________________________XXXXXXXX_
      Uplink 19: _______________________________________________________________________XXXXXXXX_
      Uplink 20: ______________________________________________________________________XXXXXXXX__
      Uplink 21: ______________________________________________________________________XXXXXXXX__
      Uplink 22: _______________________________________________________________________XXXXXXXXX
      Uplink 23: _______________________________________________________________________XXXXXXXXX
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: ______________________________________________________________________XXXXXXX___
      Uplink 27: ______________________________________________________________________XXXXXXX___
      Uplink 28: ______________________________________________________________________XXXXXXXX__
      Uplink 29: ______________________________________________________________________XXXXXXXX__
      Uplink 30: ________________________________________________________________________XXXXXXX_
      Uplink 31: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 17:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 18:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 19:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 20:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 21:
      Optimal Phase: 17
      Window Length: 35
      Eye Window: ___________________________________XXXXX
    Uplink 22:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 23:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 24:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 25:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 26:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 27:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 28:
      Optimal Phase: 31
      Window Length: 34
      Eye Window: _________XXXXXX_________________________
    Uplink 29:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 30:
      Optimal Phase: 7
      Window Length: 16
      Eye Window: ________________XXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 31:
      Optimal Phase: 6
      Window Length: 14
      Eye Window: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX

09:01:34:setup_element:INFO:	Performing Elink synchronization
09:01:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:01:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:34:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:01:34:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:01:34:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:01:34:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:01:35:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_23 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_23 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_0__upli_23
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_30 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_30 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_1__upli_30
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_21 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_21 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_2__upli_21
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_19 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_19 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_4__upli_19
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_26 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_26 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_5__upli_26
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_17 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_17 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_6__upli_17
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_24 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_24 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_B__addr_7__upli_24
09:01:36:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:01:36:febtest:INFO:	23-0 | XA-000-08-002-000-002-167-09 |  12.4 | 1265.4
09:01:36:febtest:INFO:	30-1 | XA-000-08-002-000-000-123-02 |  44.1 | 1147.8
09:01:37:febtest:INFO:	21-2 | XA-000-08-002-000-003-034-14 |  31.4 | 1201.0
09:01:37:febtest:INFO:	28-3 | XA-000-08-002-000-000-120-02 |  50.4 | 1141.9
09:01:37:febtest:INFO:	19-4 | XA-000-08-002-000-003-033-14 |  44.1 | 1159.7
09:01:37:febtest:INFO:	26-5 | XA-000-08-002-000-000-119-02 |  47.3 | 1159.7
09:01:37:febtest:INFO:	17-6 | XA-000-08-002-000-004-191-11 |  37.7 | 1177.4
09:01:38:febtest:INFO:	24-7 | XA-000-08-002-000-004-192-07 |  21.9 | 1236.2
09:01:38:ST3_smx:INFO:	Configuring SMX FAST
09:01:40:ST3_smx:INFO:	chip: 23-0 	 12.438562 C 	 1259.567515 mV
09:01:40:ST3_smx:INFO:		Electrons
09:01:40:ST3_smx:INFO:	# loops 0
09:01:42:ST3_smx:INFO:	# loops 1
09:01:44:ST3_smx:INFO:	# loops 2
09:01:45:ST3_smx:INFO:	# loops 3
09:01:47:ST3_smx:INFO:	# loops 4
09:01:49:ST3_smx:INFO:	Total # of broken channels: 0
09:01:49:ST3_smx:INFO:	List of broken channels: []
09:01:49:ST3_smx:INFO:	Total # of broken channels: 0
09:01:49:ST3_smx:INFO:	List of broken channels: []
09:01:49:ST3_smx:INFO:	Configuring SMX FAST
09:01:51:ST3_smx:INFO:	chip: 30-1 	 47.250730 C 	 1135.937260 mV
09:01:51:ST3_smx:INFO:		Electrons
09:01:51:ST3_smx:INFO:	# loops 0
09:01:53:ST3_smx:INFO:	# loops 1
09:01:54:ST3_smx:INFO:	# loops 2
09:01:56:ST3_smx:INFO:	# loops 3
09:01:58:ST3_smx:INFO:	# loops 4
09:01:59:ST3_smx:INFO:	Total # of broken channels: 0
09:01:59:ST3_smx:INFO:	List of broken channels: []
09:01:59:ST3_smx:INFO:	Total # of broken channels: 1
09:01:59:ST3_smx:INFO:	List of broken channels: [45]
09:02:00:ST3_smx:INFO:	Configuring SMX FAST
09:02:02:ST3_smx:INFO:	chip: 21-2 	 31.389742 C 	 1206.851500 mV
09:02:02:ST3_smx:INFO:		Electrons
09:02:02:ST3_smx:INFO:	# loops 0
09:02:03:ST3_smx:INFO:	# loops 1
09:02:05:ST3_smx:INFO:	# loops 2
09:02:07:ST3_smx:INFO:	# loops 3
09:02:08:ST3_smx:INFO:	# loops 4
09:02:10:ST3_smx:INFO:	Total # of broken channels: 0
09:02:10:ST3_smx:INFO:	List of broken channels: []
09:02:10:ST3_smx:INFO:	Total # of broken channels: 0
09:02:10:ST3_smx:INFO:	List of broken channels: []
09:02:10:ST3_smx:INFO:	Configuring SMX FAST
09:02:12:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1177.390875 mV
09:02:12:ST3_smx:INFO:		Electrons
09:02:12:ST3_smx:INFO:	# loops 0
09:02:14:ST3_smx:INFO:	# loops 1
09:02:16:ST3_smx:INFO:	# loops 2
09:02:17:ST3_smx:INFO:	# loops 3
09:02:19:ST3_smx:INFO:	# loops 4
09:02:21:ST3_smx:INFO:	Total # of broken channels: 0
09:02:21:ST3_smx:INFO:	List of broken channels: []
09:02:21:ST3_smx:INFO:	Total # of broken channels: 0
09:02:21:ST3_smx:INFO:	List of broken channels: []
09:02:21:ST3_smx:INFO:	Configuring SMX FAST
09:02:23:ST3_smx:INFO:	chip: 19-4 	 50.430383 C 	 1153.732915 mV
09:02:23:ST3_smx:INFO:		Electrons
09:02:23:ST3_smx:INFO:	# loops 0
09:02:24:ST3_smx:INFO:	# loops 1
09:02:26:ST3_smx:INFO:	# loops 2
09:02:28:ST3_smx:INFO:	# loops 3
09:02:29:ST3_smx:INFO:	# loops 4
09:02:31:ST3_smx:INFO:	Total # of broken channels: 0
09:02:31:ST3_smx:INFO:	List of broken channels: []
09:02:31:ST3_smx:INFO:	Total # of broken channels: 0
09:02:31:ST3_smx:INFO:	List of broken channels: []
09:02:32:ST3_smx:INFO:	Configuring SMX FAST
09:02:33:ST3_smx:INFO:	chip: 26-5 	 53.612520 C 	 1129.995435 mV
09:02:33:ST3_smx:INFO:		Electrons
09:02:33:ST3_smx:INFO:	# loops 0
09:02:35:ST3_smx:INFO:	# loops 1
09:02:37:ST3_smx:INFO:	# loops 2
09:02:39:ST3_smx:INFO:	# loops 3
09:02:40:ST3_smx:INFO:	# loops 4
09:02:42:ST3_smx:INFO:	Total # of broken channels: 0
09:02:42:ST3_smx:INFO:	List of broken channels: []
09:02:42:ST3_smx:INFO:	Total # of broken channels: 0
09:02:42:ST3_smx:INFO:	List of broken channels: []
09:02:42:ST3_smx:INFO:	Configuring SMX FAST
09:02:44:ST3_smx:INFO:	chip: 17-6 	 50.430383 C 	 1147.806000 mV
09:02:44:ST3_smx:INFO:		Electrons
09:02:44:ST3_smx:INFO:	# loops 0
09:02:46:ST3_smx:INFO:	# loops 1
09:02:48:ST3_smx:INFO:	# loops 2
09:02:49:ST3_smx:INFO:	# loops 3
09:02:51:ST3_smx:INFO:	# loops 4
09:02:53:ST3_smx:INFO:	Total # of broken channels: 0
09:02:53:ST3_smx:INFO:	List of broken channels: []
09:02:53:ST3_smx:INFO:	Total # of broken channels: 1
09:02:53:ST3_smx:INFO:	List of broken channels: [69]
09:02:53:ST3_smx:INFO:	Configuring SMX FAST
09:02:55:ST3_smx:INFO:	chip: 24-7 	 28.225000 C 	 1212.728715 mV
09:02:55:ST3_smx:INFO:		Electrons
09:02:55:ST3_smx:INFO:	# loops 0
09:02:57:ST3_smx:INFO:	# loops 1
09:02:58:ST3_smx:INFO:	# loops 2
09:03:00:ST3_smx:INFO:	# loops 3
09:03:02:ST3_smx:INFO:	# loops 4
09:03:03:ST3_smx:INFO:	Total # of broken channels: 0
09:03:03:ST3_smx:INFO:	List of broken channels: []
09:03:03:ST3_smx:INFO:	Total # of broken channels: 0
09:03:03:ST3_smx:INFO:	List of broken channels: []
09:03:04:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:03:05:febtest:INFO:	23-0 | XA-000-08-002-000-002-167-09 |  15.6 | 1259.6
09:03:05:febtest:INFO:	30-1 | XA-000-08-002-000-000-123-02 |  50.4 | 1135.9
09:03:05:febtest:INFO:	21-2 | XA-000-08-002-000-003-034-14 |  34.6 | 1212.7
09:03:05:febtest:INFO:	28-3 | XA-000-08-002-000-000-120-02 |  40.9 | 1177.4
09:03:05:febtest:INFO:	19-4 | XA-000-08-002-000-003-033-14 |  50.4 | 1153.7
09:03:06:febtest:INFO:	26-5 | XA-000-08-002-000-000-119-02 |  53.6 | 1130.0
09:03:06:febtest:INFO:	17-6 | XA-000-08-002-000-004-191-11 |  50.4 | 1153.7
09:03:06:febtest:INFO:	24-7 | XA-000-08-002-000-004-192-07 |  31.4 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_12-09_00_04
OPERATOR  : Kerstin S.; Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2B0001160B2 42 A

FEB_SN : 2062
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	13412

MODULE_NAME:	L4DL200116 M4DL2B0001160B2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L4DL200116
MODULE_MODULE:	M4DL2B0001160B2
MODULE_SIZE:	42
MODULE_GRADE:	A
---------------------------------------
VI_before_Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.8420', '1.850', '0.4084']
VI_after__Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.9990', '1.850', '0.3179']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:05:45:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:05:45:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:05:45:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:06:12:ST3_ModuleSelector:INFO:	L4UL601034 M4UL6T0110340B2 62 C

09:06:12:ST3_ModuleSelector:INFO:	13412

09:06:13:febtest:INFO:	Testing FEB with SN 1094
09:06:16:smx_tester:INFO:	Scanning setup
09:06:16:elinks:INFO:	Disabling clock on downlink 0
09:06:16:elinks:INFO:	Disabling clock on downlink 1
09:06:16:elinks:INFO:	Disabling clock on downlink 2
09:06:16:elinks:INFO:	Disabling clock on downlink 3
09:06:16:elinks:INFO:	Disabling clock on downlink 4
09:06:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:06:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:16:elinks:INFO:	Disabling clock on downlink 0
09:06:16:elinks:INFO:	Disabling clock on downlink 1
09:06:16:elinks:INFO:	Disabling clock on downlink 2
09:06:16:elinks:INFO:	Disabling clock on downlink 3
09:06:16:elinks:INFO:	Disabling clock on downlink 4
09:06:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:06:16:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:06:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:16:elinks:INFO:	Disabling clock on downlink 0
09:06:16:elinks:INFO:	Disabling clock on downlink 1
09:06:16:elinks:INFO:	Disabling clock on downlink 2
09:06:16:elinks:INFO:	Disabling clock on downlink 3
09:06:16:elinks:INFO:	Disabling clock on downlink 4
09:06:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:06:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:16:elinks:INFO:	Disabling clock on downlink 0
09:06:16:elinks:INFO:	Disabling clock on downlink 1
09:06:16:elinks:INFO:	Disabling clock on downlink 2
09:06:16:elinks:INFO:	Disabling clock on downlink 3
09:06:16:elinks:INFO:	Disabling clock on downlink 4
09:06:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:06:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:16:elinks:INFO:	Disabling clock on downlink 0
09:06:16:elinks:INFO:	Disabling clock on downlink 1
09:06:16:elinks:INFO:	Disabling clock on downlink 2
09:06:16:elinks:INFO:	Disabling clock on downlink 3
09:06:16:elinks:INFO:	Disabling clock on downlink 4
09:06:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:06:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:06:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:06:16:setup_element:INFO:	Scanning clock phase
09:06:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:06:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:06:17:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:06:17:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:17:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:06:17:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:06:17:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:06:17:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:06:17:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:06:17:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:06:17:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:06:17:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:06:17:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:06:17:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:06:17:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:06:17:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:06:17:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
09:06:17:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:06:17:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:06:17:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
09:06:17:setup_element:INFO:	Scanning data phases
09:06:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:06:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:06:22:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:06:22:setup_element:INFO:	Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
09:06:22:setup_element:INFO:	Eye window for uplink 1 : ________XXXX____________________________
Data delay found: 29
09:06:22:setup_element:INFO:	Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
09:06:22:setup_element:INFO:	Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
09:06:22:setup_element:INFO:	Eye window for uplink 4 : _____XXXXXX_____________________________
Data delay found: 27
09:06:22:setup_element:INFO:	Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
09:06:22:setup_element:INFO:	Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
09:06:22:setup_element:INFO:	Eye window for uplink 7 : X_________________________________XXXXX_
Data delay found: 17
09:06:22:setup_element:INFO:	Eye window for uplink 8 : __________________________XXX___________
Data delay found: 7
09:06:22:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXXX_____
Data delay found: 11
09:06:22:setup_element:INFO:	Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
09:06:22:setup_element:INFO:	Eye window for uplink 11: _______________________________XXXXX____
Data delay found: 13
09:06:22:setup_element:INFO:	Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
09:06:22:setup_element:INFO:	Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
09:06:22:setup_element:INFO:	Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
09:06:22:setup_element:INFO:	Eye window for uplink 15: ______________________________XXXX______
Data delay found: 11
09:06:22:setup_element:INFO:	Setting the data phase to 34 for uplink 0
09:06:22:setup_element:INFO:	Setting the data phase to 29 for uplink 1
09:06:22:setup_element:INFO:	Setting the data phase to 31 for uplink 2
09:06:22:setup_element:INFO:	Setting the data phase to 28 for uplink 3
09:06:22:setup_element:INFO:	Setting the data phase to 27 for uplink 4
09:06:22:setup_element:INFO:	Setting the data phase to 23 for uplink 5
09:06:22:setup_element:INFO:	Setting the data phase to 21 for uplink 6
09:06:22:setup_element:INFO:	Setting the data phase to 17 for uplink 7
09:06:22:setup_element:INFO:	Setting the data phase to 7 for uplink 8
09:06:22:setup_element:INFO:	Setting the data phase to 11 for uplink 9
09:06:22:setup_element:INFO:	Setting the data phase to 9 for uplink 10
09:06:22:setup_element:INFO:	Setting the data phase to 13 for uplink 11
09:06:22:setup_element:INFO:	Setting the data phase to 8 for uplink 12
09:06:22:setup_element:INFO:	Setting the data phase to 11 for uplink 13
09:06:22:setup_element:INFO:	Setting the data phase to 10 for uplink 14
09:06:22:setup_element:INFO:	Setting the data phase to 11 for uplink 15
09:06:22:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXX_
      Uplink  1: _______________________________________________________________________XXXXXXXX_
      Uplink  2: ________________________________________________________________________XXXXXXX_
      Uplink  3: ________________________________________________________________________XXXXXXX_
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXXXX_
      Uplink  7: ________________________________________________________________________XXXXXXX_
      Uplink  8: ______________________________________________________________________XXXXXXX___
      Uplink  9: ______________________________________________________________________XXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: _____________________________________________________________________XXXXXXXX___
      Uplink 13: _____________________________________________________________________XXXXXXXX___
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 7
      Window Length: 37
      Eye Window: __________________________XXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 12:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 14:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 15:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______
]
09:06:22:setup_element:INFO:	Beginning SMX ASICs map scan
09:06:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:06:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:06:22:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:06:22:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:06:22:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:06:22:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:06:22:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:06:23:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:06:23:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:06:23:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:06:23:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:06:23:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:06:23:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:06:23:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:06:23:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:06:23:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:06:23:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:06:23:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:06:24:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:06:24:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:06:24:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:06:25:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  0: _______________________________________________________________________XXXXXXXX_
      Uplink  1: _______________________________________________________________________XXXXXXXX_
      Uplink  2: ________________________________________________________________________XXXXXXX_
      Uplink  3: ________________________________________________________________________XXXXXXX_
      Uplink  4: _______________________________________________________________________XXXXXXX__
      Uplink  5: _______________________________________________________________________XXXXXXX__
      Uplink  6: ________________________________________________________________________XXXXXXX_
      Uplink  7: ________________________________________________________________________XXXXXXX_
      Uplink  8: ______________________________________________________________________XXXXXXX___
      Uplink  9: ______________________________________________________________________XXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXX___
      Uplink 11: _____________________________________________________________________XXXXXXXX___
      Uplink 12: _____________________________________________________________________XXXXXXXX___
      Uplink 13: _____________________________________________________________________XXXXXXXX___
      Uplink 14: ______________________________________________________________________XXXXXXXX__
      Uplink 15: ______________________________________________________________________XXXXXXXX__
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 1:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 2:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 3:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 4:
      Optimal Phase: 27
      Window Length: 34
      Eye Window: _____XXXXXX_____________________________
    Uplink 5:
      Optimal Phase: 23
      Window Length: 35
      Eye Window: _XXXXX__________________________________
    Uplink 6:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 7:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 8:
      Optimal Phase: 7
      Window Length: 37
      Eye Window: __________________________XXX___________
    Uplink 9:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 10:
      Optimal Phase: 9
      Window Length: 35
      Eye Window: ___________________________XXXXX________
    Uplink 11:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 12:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 13:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 14:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 15:
      Optimal Phase: 11
      Window Length: 36
      Eye Window: ______________________________XXXX______

09:06:25:setup_element:INFO:	Performing Elink synchronization
09:06:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:06:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:06:25:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:06:25:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:06:25:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:06:25:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:06:25:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  1  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   1  |   [0]   |  1  |  0  |     [8]      |   [(0, 8), (1, 9)] 
   2  |   [0]   |  1  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   3  |   [0]   |  1  |  0  |     [10]     |  [(0, 10), (1, 11)]
   4  |   [0]   |  1  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   5  |   [0]   |  1  |  0  |     [12]     |  [(0, 12), (1, 13)]
   6  |   [0]   |  1  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   7  |   [0]   |  1  |  0  |     [14]     |  [(0, 14), (1, 15)]
09:06:26:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:06:27:febtest:INFO:	1-0 | XA-000-08-002-002-008-005-11 |  34.6 | 1189.2
09:06:27:febtest:INFO:	8-1 | XA-000-08-002-002-008-000-11 |  28.2 | 1218.6
09:06:27:febtest:INFO:	3-2 | XA-000-08-002-002-007-253-09 |  18.7 | 1253.7
09:06:27:febtest:INFO:	10-3 | XA-000-08-002-002-008-003-11 |  18.7 | 1242.0
09:06:28:febtest:INFO:	5-4 | XA-000-08-002-002-008-002-11 |  21.9 | 1242.0
09:06:28:febtest:INFO:	12-5 | XA-000-08-002-002-008-004-11 |  31.4 | 1201.0
09:06:28:febtest:INFO:	7-6 | XA-000-08-002-002-008-001-11 |  40.9 | 1177.4
09:06:28:febtest:INFO:	14-7 | XA-000-08-002-002-007-254-09 |  21.9 | 1236.2
09:06:29:ST3_smx:INFO:	Configuring SMX FAST
09:06:31:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1177.390875 mV
09:06:31:ST3_smx:INFO:		Electrons
09:06:31:ST3_smx:INFO:	# loops 0
09:06:33:ST3_smx:INFO:	# loops 1
09:06:34:ST3_smx:INFO:	# loops 2
09:06:36:ST3_smx:INFO:	# loops 3
09:06:38:ST3_smx:INFO:	# loops 4
09:06:40:ST3_smx:INFO:	Total # of broken channels: 0
09:06:40:ST3_smx:INFO:	List of broken channels: []
09:06:40:ST3_smx:INFO:	Total # of broken channels: 1
09:06:40:ST3_smx:INFO:	List of broken channels: [27]
09:06:40:ST3_smx:INFO:	Configuring SMX FAST
09:06:42:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1230.330540 mV
09:06:42:ST3_smx:INFO:		Electrons
09:06:42:ST3_smx:INFO:	# loops 0
09:06:44:ST3_smx:INFO:	# loops 1
09:06:46:ST3_smx:INFO:	# loops 2
09:06:47:ST3_smx:INFO:	# loops 3
09:06:49:ST3_smx:INFO:	# loops 4
09:06:51:ST3_smx:INFO:	Total # of broken channels: 0
09:06:51:ST3_smx:INFO:	List of broken channels: []
09:06:51:ST3_smx:INFO:	Total # of broken channels: 0
09:06:51:ST3_smx:INFO:	List of broken channels: []
09:06:51:ST3_smx:INFO:	Configuring SMX FAST
09:06:53:ST3_smx:INFO:	chip: 3-2 	 21.902970 C 	 1242.040240 mV
09:06:53:ST3_smx:INFO:		Electrons
09:06:53:ST3_smx:INFO:	# loops 0
09:06:55:ST3_smx:INFO:	# loops 1
09:06:57:ST3_smx:INFO:	# loops 2
09:06:59:ST3_smx:INFO:	# loops 3
09:07:00:ST3_smx:INFO:	# loops 4
09:07:02:ST3_smx:INFO:	Total # of broken channels: 0
09:07:02:ST3_smx:INFO:	List of broken channels: []
09:07:02:ST3_smx:INFO:	Total # of broken channels: 0
09:07:02:ST3_smx:INFO:	List of broken channels: []
09:07:02:ST3_smx:INFO:	Configuring SMX FAST
09:07:04:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1206.851500 mV
09:07:05:ST3_smx:INFO:		Electrons
09:07:05:ST3_smx:INFO:	# loops 0
09:07:06:ST3_smx:INFO:	# loops 1
09:07:08:ST3_smx:INFO:	# loops 2
09:07:10:ST3_smx:INFO:	# loops 3
09:07:11:ST3_smx:INFO:	# loops 4
09:07:13:ST3_smx:INFO:	Total # of broken channels: 0
09:07:13:ST3_smx:INFO:	List of broken channels: []
09:07:13:ST3_smx:INFO:	Total # of broken channels: 0
09:07:13:ST3_smx:INFO:	List of broken channels: []
09:07:13:ST3_smx:INFO:	Configuring SMX FAST
09:07:15:ST3_smx:INFO:	chip: 5-4 	 34.556970 C 	 1206.851500 mV
09:07:15:ST3_smx:INFO:		Electrons
09:07:15:ST3_smx:INFO:	# loops 0
09:07:17:ST3_smx:INFO:	# loops 1
09:07:19:ST3_smx:INFO:	# loops 2
09:07:21:ST3_smx:INFO:	# loops 3
09:07:22:ST3_smx:INFO:	# loops 4
09:07:24:ST3_smx:INFO:	Total # of broken channels: 0
09:07:24:ST3_smx:INFO:	List of broken channels: []
09:07:24:ST3_smx:INFO:	Total # of broken channels: 0
09:07:24:ST3_smx:INFO:	List of broken channels: []
09:07:24:ST3_smx:INFO:	Configuring SMX FAST
09:07:26:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1206.851500 mV
09:07:26:ST3_smx:INFO:		Electrons
09:07:26:ST3_smx:INFO:	# loops 0
09:07:28:ST3_smx:INFO:	# loops 1
09:07:30:ST3_smx:INFO:	# loops 2
09:07:32:ST3_smx:INFO:	# loops 3
09:07:33:ST3_smx:INFO:	# loops 4
09:07:35:ST3_smx:INFO:	Total # of broken channels: 0
09:07:35:ST3_smx:INFO:	List of broken channels: []
09:07:35:ST3_smx:INFO:	Total # of broken channels: 0
09:07:35:ST3_smx:INFO:	List of broken channels: []
09:07:35:ST3_smx:INFO:	Configuring SMX FAST
09:07:37:ST3_smx:INFO:	chip: 7-6 	 44.073563 C 	 1177.390875 mV
09:07:37:ST3_smx:INFO:		Electrons
09:07:37:ST3_smx:INFO:	# loops 0
09:07:39:ST3_smx:INFO:	# loops 1
09:07:41:ST3_smx:INFO:	# loops 2
09:07:42:ST3_smx:INFO:	# loops 3
09:07:44:ST3_smx:INFO:	# loops 4
09:07:46:ST3_smx:INFO:	Total # of broken channels: 1
09:07:46:ST3_smx:INFO:	List of broken channels: [28]
09:07:46:ST3_smx:INFO:	Total # of broken channels: 1
09:07:46:ST3_smx:INFO:	List of broken channels: [28]
09:07:46:ST3_smx:INFO:	Configuring SMX FAST
09:07:48:ST3_smx:INFO:	chip: 14-7 	 31.389742 C 	 1218.600960 mV
09:07:48:ST3_smx:INFO:		Electrons
09:07:48:ST3_smx:INFO:	# loops 0
09:07:50:ST3_smx:INFO:	# loops 1
09:07:52:ST3_smx:INFO:	# loops 2
09:07:53:ST3_smx:INFO:	# loops 3
09:07:55:ST3_smx:INFO:	# loops 4
09:07:57:ST3_smx:INFO:	Total # of broken channels: 0
09:07:57:ST3_smx:INFO:	List of broken channels: []
09:07:57:ST3_smx:INFO:	Total # of broken channels: 0
09:07:57:ST3_smx:INFO:	List of broken channels: []
09:07:58:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:07:58:febtest:INFO:	1-0 | XA-000-08-002-002-008-005-11 |  40.9 | 1177.4
09:07:58:febtest:INFO:	8-1 | XA-000-08-002-002-008-000-11 |  28.2 | 1230.3
09:07:58:febtest:INFO:	3-2 | XA-000-08-002-002-007-253-09 |  25.1 | 1242.0
09:07:58:febtest:INFO:	10-3 | XA-000-08-002-002-008-003-11 |  31.4 | 1212.7
09:07:59:febtest:INFO:	5-4 | XA-000-08-002-002-008-002-11 |  34.6 | 1212.7
09:07:59:febtest:INFO:	12-5 | XA-000-08-002-002-008-004-11 |  31.4 | 1206.9
09:07:59:febtest:INFO:	7-6 | XA-000-08-002-002-008-001-11 |  44.1 | 1177.4
09:07:59:febtest:INFO:	14-7 | XA-000-08-002-002-007-254-09 |  31.4 | 1218.6
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_12-09_05_45
OPERATOR  : Kerstin S.; Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4UL601034 M4UL6T0110340B2 62 C

FEB_SN : 1094
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	13412

MODULE_NAME:	L4UL601034 M4UL6T0110340B2 62 C

MODULE_TYPE:	
MODULE_LADDER:	L4UL601034
MODULE_MODULE:	M4UL6T0110340B2
MODULE_SIZE:	62
MODULE_GRADE:	C
---------------------------------------
VI_before_Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.7900', '1.850', '0.5430']
VI_after__Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.9690', '1.850', '0.3216']09:11:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:11:07:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:11:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:11:21:ST3_ModuleSelector:INFO:	L4DL200116 M4DL2T3001163A2 124 B

09:11:21:ST3_ModuleSelector:INFO:	13412

09:11:22:febtest:INFO:	Testing FEB with SN 2087
09:11:24:smx_tester:INFO:	Scanning setup
09:11:24:elinks:INFO:	Disabling clock on downlink 0
09:11:24:elinks:INFO:	Disabling clock on downlink 1
09:11:24:elinks:INFO:	Disabling clock on downlink 2
09:11:24:elinks:INFO:	Disabling clock on downlink 3
09:11:24:elinks:INFO:	Disabling clock on downlink 4
09:11:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:11:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:24:elinks:INFO:	Disabling clock on downlink 0
09:11:24:elinks:INFO:	Disabling clock on downlink 1
09:11:24:elinks:INFO:	Disabling clock on downlink 2
09:11:24:elinks:INFO:	Disabling clock on downlink 3
09:11:24:elinks:INFO:	Disabling clock on downlink 4
09:11:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:24:elinks:INFO:	Disabling clock on downlink 0
09:11:24:elinks:INFO:	Disabling clock on downlink 1
09:11:24:elinks:INFO:	Disabling clock on downlink 2
09:11:24:elinks:INFO:	Disabling clock on downlink 3
09:11:24:elinks:INFO:	Disabling clock on downlink 4
09:11:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:11:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:11:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:25:elinks:INFO:	Disabling clock on downlink 0
09:11:25:elinks:INFO:	Disabling clock on downlink 1
09:11:25:elinks:INFO:	Disabling clock on downlink 2
09:11:25:elinks:INFO:	Disabling clock on downlink 3
09:11:25:elinks:INFO:	Disabling clock on downlink 4
09:11:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:11:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:25:elinks:INFO:	Disabling clock on downlink 0
09:11:25:elinks:INFO:	Disabling clock on downlink 1
09:11:25:elinks:INFO:	Disabling clock on downlink 2
09:11:25:elinks:INFO:	Disabling clock on downlink 3
09:11:25:elinks:INFO:	Disabling clock on downlink 4
09:11:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:11:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:25:setup_element:INFO:	Scanning clock phase
09:11:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:11:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:11:25:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:11:25:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:11:25:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:11:25:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:11:25:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:11:25:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:11:25:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:11:25:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:11:25:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
09:11:25:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:11:25:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:11:25:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:11:25:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:11:25:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:11:25:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:11:25:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:11:25:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:11:25:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
09:11:25:setup_element:INFO:	Scanning data phases
09:11:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:11:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:11:31:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:11:31:setup_element:INFO:	Eye window for uplink 16: XX__________________________________XXXX
Data delay found: 18
09:11:31:setup_element:INFO:	Eye window for uplink 17: _________________________________XXXX___
Data delay found: 14
09:11:31:setup_element:INFO:	Eye window for uplink 18: XXX_________________________________XXXX
Data delay found: 19
09:11:31:setup_element:INFO:	Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
09:11:31:setup_element:INFO:	Eye window for uplink 20: __________________________________XXXXX_
Data delay found: 16
09:11:31:setup_element:INFO:	Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
09:11:31:setup_element:INFO:	Eye window for uplink 22: ________________________________XXXXX___
Data delay found: 14
09:11:31:setup_element:INFO:	Eye window for uplink 23: _______________________________XXXXX____
Data delay found: 13
09:11:31:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
09:11:31:setup_element:INFO:	Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
09:11:31:setup_element:INFO:	Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
09:11:31:setup_element:INFO:	Eye window for uplink 27: __________XXXXX_________________________
Data delay found: 32
09:11:31:setup_element:INFO:	Eye window for uplink 28: __________XXXXX_________________________
Data delay found: 32
09:11:31:setup_element:INFO:	Eye window for uplink 29: ____________XXXXXX______________________
Data delay found: 34
09:11:31:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
09:11:31:setup_element:INFO:	Eye window for uplink 31: ___________XXXXXX_______________________
Data delay found: 33
09:11:31:setup_element:INFO:	Setting the data phase to 18 for uplink 16
09:11:31:setup_element:INFO:	Setting the data phase to 14 for uplink 17
09:11:31:setup_element:INFO:	Setting the data phase to 19 for uplink 18
09:11:31:setup_element:INFO:	Setting the data phase to 16 for uplink 19
09:11:31:setup_element:INFO:	Setting the data phase to 16 for uplink 20
09:11:31:setup_element:INFO:	Setting the data phase to 15 for uplink 21
09:11:31:setup_element:INFO:	Setting the data phase to 14 for uplink 22
09:11:31:setup_element:INFO:	Setting the data phase to 13 for uplink 23
09:11:31:setup_element:INFO:	Setting the data phase to 28 for uplink 24
09:11:31:setup_element:INFO:	Setting the data phase to 30 for uplink 25
09:11:31:setup_element:INFO:	Setting the data phase to 29 for uplink 26
09:11:31:setup_element:INFO:	Setting the data phase to 32 for uplink 27
09:11:31:setup_element:INFO:	Setting the data phase to 32 for uplink 28
09:11:31:setup_element:INFO:	Setting the data phase to 34 for uplink 29
09:11:31:setup_element:INFO:	Setting the data phase to 35 for uplink 30
09:11:31:setup_element:INFO:	Setting the data phase to 33 for uplink 31
09:11:31:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________XXXXXXX_
      Uplink 17: ________________________________________________________________________XXXXXXX_
      Uplink 18: _______________________________________________________________________XXXXXXXX_
      Uplink 19: _______________________________________________________________________XXXXXXXX_
      Uplink 20: _______________________________________________________________________XXXXXXX__
      Uplink 21: _______________________________________________________________________XXXXXXX__
      Uplink 22: ______________________________________________________________________XXXXXXXX__
      Uplink 23: ______________________________________________________________________XXXXXXXX__
      Uplink 24: _______________________________________________________________________XXXXXXXX_
      Uplink 25: _______________________________________________________________________XXXXXXXX_
      Uplink 26: _______________________________________________________________________XXXXXXXXX
      Uplink 27: _______________________________________________________________________XXXXXXXXX
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 17:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 18:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 19:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 20:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 21:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 22:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 23:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 28:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 29:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
]
09:11:31:setup_element:INFO:	Beginning SMX ASICs map scan
09:11:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:11:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:11:31:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:11:31:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:11:31:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:11:31:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:11:31:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:11:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:11:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:11:32:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:11:32:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:11:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:11:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:11:32:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:11:32:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:11:32:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:11:32:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:11:32:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:11:32:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:11:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:11:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:11:34:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink 16: ________________________________________________________________________XXXXXXX_
      Uplink 17: ________________________________________________________________________XXXXXXX_
      Uplink 18: _______________________________________________________________________XXXXXXXX_
      Uplink 19: _______________________________________________________________________XXXXXXXX_
      Uplink 20: _______________________________________________________________________XXXXXXX__
      Uplink 21: _______________________________________________________________________XXXXXXX__
      Uplink 22: ______________________________________________________________________XXXXXXXX__
      Uplink 23: ______________________________________________________________________XXXXXXXX__
      Uplink 24: _______________________________________________________________________XXXXXXXX_
      Uplink 25: _______________________________________________________________________XXXXXXXX_
      Uplink 26: _______________________________________________________________________XXXXXXXXX
      Uplink 27: _______________________________________________________________________XXXXXXXXX
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: _______________________________________________________________________XXXXXXXX_
      Uplink 31: _______________________________________________________________________XXXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 18
      Window Length: 34
      Eye Window: XX__________________________________XXXX
    Uplink 17:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 18:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 19:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 20:
      Optimal Phase: 16
      Window Length: 35
      Eye Window: __________________________________XXXXX_
    Uplink 21:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 22:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 23:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 24:
      Optimal Phase: 28
      Window Length: 35
      Eye Window: ______XXXXX_____________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 26:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 27:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 28:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
    Uplink 29:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________

09:11:34:setup_element:INFO:	Performing Elink synchronization
09:11:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:11:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:11:34:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:11:34:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:11:34:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:11:34:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:11:34:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
09:11:35:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:11:35:febtest:INFO:	23-0 | XA-000-08-002-000-000-121-02 |  37.7 | 1201.0
09:11:35:febtest:INFO:	30-1 | XA-000-08-002-000-000-185-13 |  40.9 | 1171.5
09:11:36:febtest:INFO:	21-2 | XA-000-08-002-000-000-187-13 |  53.6 | 1147.8
09:11:36:febtest:INFO:	28-3 | XA-000-08-002-000-000-228-15 |  47.3 | 1147.8
09:11:36:febtest:INFO:	19-4 | XA-000-08-002-000-000-219-06 |  40.9 | 1183.3
09:11:36:febtest:INFO:	26-5 | XA-000-08-002-000-000-129-04 |  37.7 | 1177.4
09:11:37:febtest:INFO:	17-6 | XA-000-08-002-000-000-220-06 |  60.0 | 1124.0
09:11:37:febtest:INFO:	24-7 | XA-000-08-002-000-000-122-02 |  53.6 | 1135.9
09:11:37:ST3_smx:INFO:	Configuring SMX FAST
09:11:39:ST3_smx:INFO:	chip: 23-0 	 37.726682 C 	 1195.082160 mV
09:11:39:ST3_smx:INFO:		Electrons
09:11:39:ST3_smx:INFO:	# loops 0
09:11:41:ST3_smx:INFO:	# loops 1
09:11:43:ST3_smx:INFO:	# loops 2
09:11:44:ST3_smx:INFO:	# loops 3
09:11:46:ST3_smx:INFO:	# loops 4
09:11:48:ST3_smx:INFO:	Total # of broken channels: 0
09:11:48:ST3_smx:INFO:	List of broken channels: []
09:11:48:ST3_smx:INFO:	Total # of broken channels: 0
09:11:48:ST3_smx:INFO:	List of broken channels: []
09:11:48:ST3_smx:INFO:	Configuring SMX FAST
09:11:50:ST3_smx:INFO:	chip: 30-1 	 44.073563 C 	 1159.654860 mV
09:11:50:ST3_smx:INFO:		Electrons
09:11:50:ST3_smx:INFO:	# loops 0
09:11:51:ST3_smx:INFO:	# loops 1
09:11:53:ST3_smx:INFO:	# loops 2
09:11:55:ST3_smx:INFO:	# loops 3
09:11:56:ST3_smx:INFO:	# loops 4
09:11:58:ST3_smx:INFO:	Total # of broken channels: 0
09:11:58:ST3_smx:INFO:	List of broken channels: []
09:11:58:ST3_smx:INFO:	Total # of broken channels: 0
09:11:58:ST3_smx:INFO:	List of broken channels: []
09:11:58:ST3_smx:INFO:	Configuring SMX FAST
09:12:00:ST3_smx:INFO:	chip: 21-2 	 63.173842 C 	 1124.048640 mV
09:12:00:ST3_smx:INFO:		Electrons
09:12:00:ST3_smx:INFO:	# loops 0
09:12:02:ST3_smx:INFO:	# loops 1
09:12:03:ST3_smx:INFO:	# loops 2
09:12:05:ST3_smx:INFO:	# loops 3
09:12:07:ST3_smx:INFO:	# loops 4
09:12:08:ST3_smx:INFO:	Total # of broken channels: 0
09:12:08:ST3_smx:INFO:	List of broken channels: []
09:12:08:ST3_smx:INFO:	Total # of broken channels: 0
09:12:08:ST3_smx:INFO:	List of broken channels: []
09:12:09:ST3_smx:INFO:	Configuring SMX FAST
09:12:11:ST3_smx:INFO:	chip: 28-3 	 50.430383 C 	 1153.732915 mV
09:12:11:ST3_smx:INFO:		Electrons
09:12:11:ST3_smx:INFO:	# loops 0
09:12:12:ST3_smx:INFO:	# loops 1
09:12:14:ST3_smx:INFO:	# loops 2
09:12:16:ST3_smx:INFO:	# loops 3
09:12:18:ST3_smx:INFO:	# loops 4
09:12:19:ST3_smx:INFO:	Total # of broken channels: 0
09:12:19:ST3_smx:INFO:	List of broken channels: []
09:12:19:ST3_smx:INFO:	Total # of broken channels: 0
09:12:19:ST3_smx:INFO:	List of broken channels: []
09:12:20:ST3_smx:INFO:	Configuring SMX FAST
09:12:22:ST3_smx:INFO:	chip: 19-4 	 44.073563 C 	 1195.082160 mV
09:12:22:ST3_smx:INFO:		Electrons
09:12:22:ST3_smx:INFO:	# loops 0
09:12:23:ST3_smx:INFO:	# loops 1
09:12:25:ST3_smx:INFO:	# loops 2
09:12:27:ST3_smx:INFO:	# loops 3
09:12:28:ST3_smx:INFO:	# loops 4
09:12:30:ST3_smx:INFO:	Total # of broken channels: 0
09:12:30:ST3_smx:INFO:	List of broken channels: []
09:12:30:ST3_smx:INFO:	Total # of broken channels: 0
09:12:30:ST3_smx:INFO:	List of broken channels: []
09:12:30:ST3_smx:INFO:	Configuring SMX FAST
09:12:32:ST3_smx:INFO:	chip: 26-5 	 40.898880 C 	 1177.390875 mV
09:12:32:ST3_smx:INFO:		Electrons
09:12:32:ST3_smx:INFO:	# loops 0
09:12:34:ST3_smx:INFO:	# loops 1
09:12:35:ST3_smx:INFO:	# loops 2
09:12:37:ST3_smx:INFO:	# loops 3
09:12:39:ST3_smx:INFO:	# loops 4
09:12:40:ST3_smx:INFO:	Total # of broken channels: 0
09:12:40:ST3_smx:INFO:	List of broken channels: []
09:12:40:ST3_smx:INFO:	Total # of broken channels: 0
09:12:40:ST3_smx:INFO:	List of broken channels: []
09:12:41:ST3_smx:INFO:	Configuring SMX FAST
09:12:43:ST3_smx:INFO:	chip: 17-6 	 59.984250 C 	 1141.874115 mV
09:12:43:ST3_smx:INFO:		Electrons
09:12:43:ST3_smx:INFO:	# loops 0
09:12:44:ST3_smx:INFO:	# loops 1
09:12:46:ST3_smx:INFO:	# loops 2
09:12:48:ST3_smx:INFO:	# loops 3
09:12:49:ST3_smx:INFO:	# loops 4
09:12:51:ST3_smx:INFO:	Total # of broken channels: 0
09:12:51:ST3_smx:INFO:	List of broken channels: []
09:12:51:ST3_smx:INFO:	Total # of broken channels: 0
09:12:51:ST3_smx:INFO:	List of broken channels: []
09:12:51:ST3_smx:INFO:	Configuring SMX FAST
09:12:53:ST3_smx:INFO:	chip: 24-7 	 50.430383 C 	 1147.806000 mV
09:12:53:ST3_smx:INFO:		Electrons
09:12:53:ST3_smx:INFO:	# loops 0
09:12:55:ST3_smx:INFO:	# loops 1
09:12:57:ST3_smx:INFO:	# loops 2
09:12:58:ST3_smx:INFO:	# loops 3
09:13:00:ST3_smx:INFO:	# loops 4
09:13:01:ST3_smx:INFO:	Total # of broken channels: 0
09:13:01:ST3_smx:INFO:	List of broken channels: []
09:13:01:ST3_smx:INFO:	Total # of broken channels: 0
09:13:01:ST3_smx:INFO:	List of broken channels: []
09:13:02:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:13:02:febtest:INFO:	23-0 | XA-000-08-002-000-000-121-02 |  40.9 | 1195.1
09:13:03:febtest:INFO:	30-1 | XA-000-08-002-000-000-185-13 |  44.1 | 1159.7
09:13:03:febtest:INFO:	21-2 | XA-000-08-002-000-000-187-13 |  63.2 | 1124.0
09:13:03:febtest:INFO:	28-3 | XA-000-08-002-000-000-228-15 |  50.4 | 1153.7
09:13:03:febtest:INFO:	19-4 | XA-000-08-002-000-000-219-06 |  44.1 | 1195.1
09:13:04:febtest:INFO:	26-5 | XA-000-08-002-000-000-129-04 |  40.9 | 1177.4
09:13:04:febtest:INFO:	17-6 | XA-000-08-002-000-000-220-06 |  60.0 | 1141.9
09:13:04:febtest:INFO:	24-7 | XA-000-08-002-000-000-122-02 |  53.6 | 1147.8
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_12-09_11_07
OPERATOR  : Kerstin S.; Olga B.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T3001163A2 124 B

FEB_SN : 2087
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	13412

MODULE_NAME:	L4DL200116 M4DL2T3001163A2 124 B

MODULE_TYPE:	
MODULE_LADDER:	L4UL601034
MODULE_MODULE:	M4UL6T0110340B2
MODULE_SIZE:	62
MODULE_GRADE:	C
---------------------------------------
VI_before_Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.8710', '1.850', '0.5096']
VI_after__Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '2.0190', '1.850', '0.3237']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:13:41:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2087/TestDate_2024_02_12-09_11_07/

VI_at__the_End : ['0', '0', '0', '0', '0', '0']