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FEB_2088 01.02.24 16:06:10
TextEdit.txt
16:04:53:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
16:05:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:05:15:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
16:05:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:06:00:ST3_ModuleSelector:INFO: L4DL200116 M4DL2T0001160A2 42 A
16:06:00:ST3_ModuleSelector:INFO: 07442
16:06:01:febtest:INFO: Testing FEB with SN 2088
Traceback (most recent call last):
File "febtest.py", line 323, in DoFEB_SensorTest
if self.DoScanFEB8(reporter.out_dict):
File "febtest.py", line 180, in DoScanFEB8
if self.EMU.Scan_FEB8(reporter):
AttributeError: 'int' object has no attribute 'Scan_FEB8'
16:06:09:febtest:INFO: FEB 8-2 selected
16:06:09:smx_tester:INFO: Setting Elink clock mode to 160 MHz
16:06:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:06:10:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
16:06:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:06:12:ST3_ModuleSelector:INFO: L4DL200116 M4DL2T0001160A2 42 A
16:06:12:ST3_ModuleSelector:INFO: 07442
16:06:13:febtest:INFO: Testing FEB with SN 2088
16:06:15:smx_tester:INFO: Scanning setup
16:06:15:elinks:INFO: Disabling clock on downlink 0
16:06:15:elinks:INFO: Disabling clock on downlink 1
16:06:15:elinks:INFO: Disabling clock on downlink 2
16:06:15:elinks:INFO: Disabling clock on downlink 3
16:06:15:elinks:INFO: Disabling clock on downlink 4
16:06:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:06:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
16:06:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:06:15:elinks:INFO: Disabling clock on downlink 0
16:06:15:elinks:INFO: Disabling clock on downlink 1
16:06:15:elinks:INFO: Disabling clock on downlink 2
16:06:15:elinks:INFO: Disabling clock on downlink 3
16:06:15:elinks:INFO: Disabling clock on downlink 4
16:06:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:06:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:06:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:06:15:elinks:INFO: Disabling clock on downlink 0
16:06:15:elinks:INFO: Disabling clock on downlink 1
16:06:15:elinks:INFO: Disabling clock on downlink 2
16:06:15:elinks:INFO: Disabling clock on downlink 3
16:06:15:elinks:INFO: Disabling clock on downlink 4
16:06:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:06:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
16:06:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
16:06:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:06:15:elinks:INFO: Disabling clock on downlink 0
16:06:15:elinks:INFO: Disabling clock on downlink 1
16:06:15:elinks:INFO: Disabling clock on downlink 2
16:06:15:elinks:INFO: Disabling clock on downlink 3
16:06:15:elinks:INFO: Disabling clock on downlink 4
16:06:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:06:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
16:06:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:06:15:elinks:INFO: Disabling clock on downlink 0
16:06:15:elinks:INFO: Disabling clock on downlink 1
16:06:15:elinks:INFO: Disabling clock on downlink 2
16:06:15:elinks:INFO: Disabling clock on downlink 3
16:06:15:elinks:INFO: Disabling clock on downlink 4
16:06:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:06:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
16:06:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:06:15:setup_element:INFO: Scanning clock phase
16:06:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
16:06:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
16:06:16:setup_element:INFO: Clock phase scan results for group 0, downlink 2
16:06:16:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
16:06:16:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
16:06:16:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
16:06:16:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
16:06:16:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
16:06:16:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
16:06:16:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
16:06:16:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
16:06:16:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
16:06:16:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
16:06:16:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
16:06:16:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
16:06:16:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXXXX
Clock Delay: 36
16:06:16:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXXXX
Clock Delay: 36
16:06:16:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXXXX
Clock Delay: 36
16:06:16:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXXXX
Clock Delay: 36
16:06:16:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
16:06:16:setup_element:INFO: Scanning data phases
16:06:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
16:06:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
16:06:21:setup_element:INFO: Data phase scan results for group 0, downlink 2
16:06:21:setup_element:INFO: Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
16:06:21:setup_element:INFO: Eye window for uplink 17: ________________________________XXXXX___
Data delay found: 14
16:06:21:setup_element:INFO: Eye window for uplink 18: _________________________________XXXXX__
Data delay found: 15
16:06:21:setup_element:INFO: Eye window for uplink 19: _______________________________XXXX_____
Data delay found: 12
16:06:22:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
16:06:22:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
16:06:22:setup_element:INFO: Eye window for uplink 22: _________________________________XXXXX__
Data delay found: 15
16:06:22:setup_element:INFO: Eye window for uplink 23: _______________________________XXXXX____
Data delay found: 13
16:06:22:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
16:06:22:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
16:06:22:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
16:06:22:setup_element:INFO: Eye window for uplink 27: _________XXXXX__________________________
Data delay found: 31
16:06:22:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
16:06:22:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
16:06:22:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
16:06:22:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
16:06:22:setup_element:INFO: Setting the data phase to 17 for uplink 16
16:06:22:setup_element:INFO: Setting the data phase to 14 for uplink 17
16:06:22:setup_element:INFO: Setting the data phase to 15 for uplink 18
16:06:22:setup_element:INFO: Setting the data phase to 12 for uplink 19
16:06:22:setup_element:INFO: Setting the data phase to 18 for uplink 20
16:06:22:setup_element:INFO: Setting the data phase to 16 for uplink 21
16:06:22:setup_element:INFO: Setting the data phase to 15 for uplink 22
16:06:22:setup_element:INFO: Setting the data phase to 13 for uplink 23
16:06:22:setup_element:INFO: Setting the data phase to 26 for uplink 24
16:06:22:setup_element:INFO: Setting the data phase to 29 for uplink 25
16:06:22:setup_element:INFO: Setting the data phase to 28 for uplink 26
16:06:22:setup_element:INFO: Setting the data phase to 31 for uplink 27
16:06:22:setup_element:INFO: Setting the data phase to 35 for uplink 28
16:06:22:setup_element:INFO: Setting the data phase to 36 for uplink 29
16:06:22:setup_element:INFO: Setting the data phase to 37 for uplink 30
16:06:22:setup_element:INFO: Setting the data phase to 36 for uplink 31
16:06:22:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 16: ________________________________________________________________________XXXXXXX_
Uplink 17: ________________________________________________________________________XXXXXXX_
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: ______________________________________________________________________XXXXXXX___
Uplink 25: ______________________________________________________________________XXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: _________________________________________________________________________XXXXXXX
Uplink 29: _________________________________________________________________________XXXXXXX
Uplink 30: _________________________________________________________________________XXXXXXX
Uplink 31: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 17:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 18:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 19:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 20:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 23:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
]
16:06:22:setup_element:INFO: Beginning SMX ASICs map scan
16:06:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
16:06:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
16:06:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
16:06:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
16:06:22:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
16:06:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
16:06:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
16:06:22:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
16:06:22:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
16:06:22:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
16:06:22:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
16:06:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
16:06:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
16:06:22:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
16:06:22:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
16:06:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
16:06:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
16:06:23:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
16:06:23:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
16:06:23:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
16:06:23:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
16:06:24:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 70
Eye Windows:
Uplink 16: ________________________________________________________________________XXXXXXX_
Uplink 17: ________________________________________________________________________XXXXXXX_
Uplink 18: ______________________________________________________________________XXXXXXXX__
Uplink 19: ______________________________________________________________________XXXXXXXX__
Uplink 20: _______________________________________________________________________XXXXXXXX_
Uplink 21: _______________________________________________________________________XXXXXXXX_
Uplink 22: ______________________________________________________________________XXXXXXXX__
Uplink 23: ______________________________________________________________________XXXXXXXX__
Uplink 24: ______________________________________________________________________XXXXXXX___
Uplink 25: ______________________________________________________________________XXXXXXX___
Uplink 26: ______________________________________________________________________XXXXXXXX__
Uplink 27: ______________________________________________________________________XXXXXXXX__
Uplink 28: _________________________________________________________________________XXXXXXX
Uplink 29: _________________________________________________________________________XXXXXXX
Uplink 30: _________________________________________________________________________XXXXXXX
Uplink 31: _________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 16:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 17:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 18:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 19:
Optimal Phase: 12
Window Length: 36
Eye Window: _______________________________XXXX_____
Uplink 20:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 21:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 22:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 23:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 24:
Optimal Phase: 26
Window Length: 35
Eye Window: ____XXXXX_______________________________
Uplink 25:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 26:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 27:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 28:
Optimal Phase: 35
Window Length: 35
Eye Window: _____________XXXXX______________________
Uplink 29:
Optimal Phase: 36
Window Length: 34
Eye Window: ______________XXXXXX____________________
Uplink 30:
Optimal Phase: 37
Window Length: 34
Eye Window: _______________XXXXXX___________________
Uplink 31:
Optimal Phase: 36
Window Length: 35
Eye Window: ______________XXXXX_____________________
16:06:24:setup_element:INFO: Performing Elink synchronization
16:06:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
16:06:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
16:06:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
16:06:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
16:06:24:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
16:06:24:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
16:06:25:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
16:06:26:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
16:06:26:febtest:INFO: 23-0 | XA-000-08-002-000-002-100-06 | 50.4 | 1183.3
16:06:26:febtest:INFO: 30-1 | XA-000-08-002-000-002-144-00 | 47.3 | 1177.4
16:06:27:febtest:INFO: 21-2 | XA-000-08-002-000-003-037-14 | 40.9 | 1195.1
16:06:27:febtest:INFO: 28-3 | XA-000-08-002-000-002-148-00 | 28.2 | 1242.0
16:06:27:febtest:INFO: 19-4 | XA-000-08-002-000-002-099-06 | 69.6 | 1100.2
16:06:27:febtest:INFO: 26-5 | XA-000-08-002-000-002-152-00 | 31.4 | 1224.5
16:06:28:febtest:INFO: 17-6 | XA-000-08-002-000-002-108-06 | 53.6 | 1141.9
16:06:28:febtest:INFO: 24-7 | XA-000-08-002-000-002-154-00 | 31.4 | 1206.9
16:06:28:ST3_smx:INFO: Configuring SMX FAST
16:06:30:ST3_smx:INFO: chip: 23-0 56.797143 C 1147.806000 mV
16:06:30:ST3_smx:INFO: Electrons
16:06:30:ST3_smx:INFO: # loops 0
16:06:32:ST3_smx:INFO: # loops 1
16:06:34:ST3_smx:INFO: # loops 2
16:06:35:ST3_smx:INFO: # loops 3
16:06:37:ST3_smx:INFO: # loops 4
16:06:39:ST3_smx:INFO: Total # of broken channels: 0
16:06:39:ST3_smx:INFO: List of broken channels: []
16:06:39:ST3_smx:INFO: Total # of broken channels: 0
16:06:39:ST3_smx:INFO: List of broken channels: []
16:06:39:ST3_smx:INFO: Configuring SMX FAST
16:06:41:ST3_smx:INFO: chip: 30-1 53.612520 C 1153.732915 mV
16:06:41:ST3_smx:INFO: Electrons
16:06:41:ST3_smx:INFO: # loops 0
16:06:43:ST3_smx:INFO: # loops 1
16:06:44:ST3_smx:INFO: # loops 2
16:06:46:ST3_smx:INFO: # loops 3
16:06:48:ST3_smx:INFO: # loops 4
16:06:49:ST3_smx:INFO: Total # of broken channels: 0
16:06:49:ST3_smx:INFO: List of broken channels: []
16:06:49:ST3_smx:INFO: Total # of broken channels: 0
16:06:49:ST3_smx:INFO: List of broken channels: []
16:06:50:ST3_smx:INFO: Configuring SMX FAST
16:06:51:ST3_smx:INFO: chip: 21-2 44.073563 C 1189.190035 mV
16:06:51:ST3_smx:INFO: Electrons
16:06:51:ST3_smx:INFO: # loops 0
16:06:53:ST3_smx:INFO: # loops 1
16:06:55:ST3_smx:INFO: # loops 2
16:06:56:ST3_smx:INFO: # loops 3
16:06:58:ST3_smx:INFO: # loops 4
16:07:00:ST3_smx:INFO: Total # of broken channels: 0
16:07:00:ST3_smx:INFO: List of broken channels: []
16:07:00:ST3_smx:INFO: Total # of broken channels: 0
16:07:00:ST3_smx:INFO: List of broken channels: []
16:07:00:ST3_smx:INFO: Configuring SMX FAST
16:07:02:ST3_smx:INFO: chip: 28-3 40.898880 C 1195.082160 mV
16:07:02:ST3_smx:INFO: Electrons
16:07:02:ST3_smx:INFO: # loops 0
16:07:04:ST3_smx:INFO: # loops 1
16:07:05:ST3_smx:INFO: # loops 2
16:07:07:ST3_smx:INFO: # loops 3
16:07:08:ST3_smx:INFO: # loops 4
16:07:10:ST3_smx:INFO: Total # of broken channels: 0
16:07:10:ST3_smx:INFO: List of broken channels: []
16:07:10:ST3_smx:INFO: Total # of broken channels: 0
16:07:10:ST3_smx:INFO: List of broken channels: []
16:07:10:ST3_smx:INFO: Configuring SMX FAST
16:07:12:ST3_smx:INFO: chip: 19-4 63.173842 C 1118.096875 mV
16:07:12:ST3_smx:INFO: Electrons
16:07:12:ST3_smx:INFO: # loops 0
16:07:14:ST3_smx:INFO: # loops 1
16:07:15:ST3_smx:INFO: # loops 2
16:07:17:ST3_smx:INFO: # loops 3
16:07:19:ST3_smx:INFO: # loops 4
16:07:20:ST3_smx:INFO: Total # of broken channels: 0
16:07:20:ST3_smx:INFO: List of broken channels: []
16:07:20:ST3_smx:INFO: Total # of broken channels: 0
16:07:20:ST3_smx:INFO: List of broken channels: []
16:07:21:ST3_smx:INFO: Configuring SMX FAST
16:07:23:ST3_smx:INFO: chip: 26-5 34.556970 C 1212.728715 mV
16:07:23:ST3_smx:INFO: Electrons
16:07:23:ST3_smx:INFO: # loops 0
16:07:24:ST3_smx:INFO: # loops 1
16:07:26:ST3_smx:INFO: # loops 2
16:07:27:ST3_smx:INFO: # loops 3
16:07:29:ST3_smx:INFO: # loops 4
16:07:31:ST3_smx:INFO: Total # of broken channels: 0
16:07:31:ST3_smx:INFO: List of broken channels: []
16:07:31:ST3_smx:INFO: Total # of broken channels: 0
16:07:31:ST3_smx:INFO: List of broken channels: []
16:07:31:ST3_smx:INFO: Configuring SMX FAST
16:07:33:ST3_smx:INFO: chip: 17-6 53.612520 C 1147.806000 mV
16:07:33:ST3_smx:INFO: Electrons
16:07:33:ST3_smx:INFO: # loops 0
16:07:35:ST3_smx:INFO: # loops 1
16:07:36:ST3_smx:INFO: # loops 2
16:07:38:ST3_smx:INFO: # loops 3
16:07:40:ST3_smx:INFO: # loops 4
16:07:42:ST3_smx:INFO: Total # of broken channels: 0
16:07:42:ST3_smx:INFO: List of broken channels: []
16:07:42:ST3_smx:INFO: Total # of broken channels: 0
16:07:42:ST3_smx:INFO: List of broken channels: []
16:07:42:ST3_smx:INFO: Configuring SMX FAST
16:07:44:ST3_smx:INFO: chip: 24-7 25.062742 C 1236.187875 mV
16:07:44:ST3_smx:INFO: Electrons
16:07:44:ST3_smx:INFO: # loops 0
16:07:46:ST3_smx:INFO: # loops 1
16:07:47:ST3_smx:INFO: # loops 2
16:07:49:ST3_smx:INFO: # loops 3
16:07:51:ST3_smx:INFO: # loops 4
16:07:52:ST3_smx:INFO: Total # of broken channels: 0
16:07:52:ST3_smx:INFO: List of broken channels: []
16:07:52:ST3_smx:INFO: Total # of broken channels: 0
16:07:52:ST3_smx:INFO: List of broken channels: []
16:07:53:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
16:07:54:febtest:INFO: 23-0 | XA-000-08-002-000-002-100-06 | 63.2 | 1147.8
16:07:54:febtest:INFO: 30-1 | XA-000-08-002-000-002-144-00 | 53.6 | 1153.7
16:07:54:febtest:INFO: 21-2 | XA-000-08-002-000-003-037-14 | 47.3 | 1189.2
16:07:54:febtest:INFO: 28-3 | XA-000-08-002-000-002-148-00 | 44.1 | 1189.2
16:07:55:febtest:INFO: 19-4 | XA-000-08-002-000-002-099-06 | 66.4 | 1118.1
16:07:55:febtest:INFO: 26-5 | XA-000-08-002-000-002-152-00 | 37.7 | 1212.7
16:07:55:febtest:INFO: 17-6 | XA-000-08-002-000-002-108-06 | 53.6 | 1147.8
16:07:55:febtest:INFO: 24-7 | XA-000-08-002-000-002-154-00 | 25.1 | 1242.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_01-16_06_10
OPERATOR : Alois Alzheimer
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T0001160A2 42 A
FEB_SN : 2088
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID: 07442
MODULE_NAME: L4DL200116 M4DL2T0001160A2 42 A
MODULE_TYPE:
MODULE_LADDER: L4DL200116
MODULE_MODULE: M4DL2T0001160A2
MODULE_SIZE: 42
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['2.450', '1.8140', '1.850', '0.5533', '2.450', '1.3420', '1.850', '2.2650']
VI_after__Init : ['2.450', '1.9840', '1.850', '0.5928', '2.450', '1.3410', '1.850', '2.2670']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
16:08:00:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2088/TestDate_2024_02_01-16_06_10/