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FEB_2089 30.01.24 12:22:16
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12:15:40:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
12:15:43:ST3_Shared:INFO: Listo of operators:Oleksandr S.;
12:15:53:febtest:INFO: FEB 8-2 selected
12:15:53:smx_tester:INFO: Setting Elink clock mode to 160 MHz
12:15:53:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
12:22:13:febtest:INFO: FEB 8-2 selected
12:22:13:smx_tester:INFO: Setting Elink clock mode to 160 MHz
12:22:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:22:16:ST3_Shared:INFO: -----------------------FEB-Microcable-----------------------
12:22:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:22:17:febtest:INFO: Testing FEB with SN 2089
12:22:19:smx_tester:INFO: Scanning setup
12:22:19:elinks:INFO: Disabling clock on downlink 0
12:22:19:elinks:INFO: Disabling clock on downlink 1
12:22:19:elinks:INFO: Disabling clock on downlink 2
12:22:19:elinks:INFO: Disabling clock on downlink 3
12:22:19:elinks:INFO: Disabling clock on downlink 4
12:22:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:22:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:22:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:22:19:elinks:INFO: Disabling clock on downlink 0
12:22:19:elinks:INFO: Disabling clock on downlink 1
12:22:19:elinks:INFO: Disabling clock on downlink 2
12:22:19:elinks:INFO: Disabling clock on downlink 3
12:22:19:elinks:INFO: Disabling clock on downlink 4
12:22:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:22:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:22:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:22:19:elinks:INFO: Disabling clock on downlink 0
12:22:19:elinks:INFO: Disabling clock on downlink 1
12:22:19:elinks:INFO: Disabling clock on downlink 2
12:22:19:elinks:INFO: Disabling clock on downlink 3
12:22:19:elinks:INFO: Disabling clock on downlink 4
12:22:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:22:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:22:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
12:22:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
12:22:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
12:22:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
12:22:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
12:22:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
12:22:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
12:22:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
12:22:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:22:19:elinks:INFO: Disabling clock on downlink 0
12:22:19:elinks:INFO: Disabling clock on downlink 1
12:22:19:elinks:INFO: Disabling clock on downlink 2
12:22:19:elinks:INFO: Disabling clock on downlink 3
12:22:19:elinks:INFO: Disabling clock on downlink 4
12:22:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:22:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:22:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:22:19:elinks:INFO: Disabling clock on downlink 0
12:22:19:elinks:INFO: Disabling clock on downlink 1
12:22:19:elinks:INFO: Disabling clock on downlink 2
12:22:19:elinks:INFO: Disabling clock on downlink 3
12:22:19:elinks:INFO: Disabling clock on downlink 4
12:22:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:22:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:22:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:22:20:setup_element:INFO: Scanning clock phase
12:22:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:22:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:22:20:setup_element:INFO: Clock phase scan results for group 0, downlink 2
12:22:20:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:22:20:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:22:20:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
12:22:20:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
12:22:20:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:22:20:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:22:20:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:22:20:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:22:20:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
12:22:20:setup_element:INFO: Scanning data phases
12:22:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:22:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:22:25:setup_element:INFO: Data phase scan results for group 0, downlink 2
12:22:25:setup_element:INFO: Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
12:22:25:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
12:22:25:setup_element:INFO: Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
12:22:25:setup_element:INFO: Eye window for uplink 27: ____________XXXXX_______________________
Data delay found: 34
12:22:25:setup_element:INFO: Eye window for uplink 28: __________XXXXXX________________________
Data delay found: 32
12:22:25:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
12:22:25:setup_element:INFO: Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
12:22:25:setup_element:INFO: Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
12:22:25:setup_element:INFO: Setting the data phase to 27 for uplink 24
12:22:25:setup_element:INFO: Setting the data phase to 30 for uplink 25
12:22:25:setup_element:INFO: Setting the data phase to 30 for uplink 26
12:22:25:setup_element:INFO: Setting the data phase to 34 for uplink 27
12:22:25:setup_element:INFO: Setting the data phase to 32 for uplink 28
12:22:25:setup_element:INFO: Setting the data phase to 34 for uplink 29
12:22:25:setup_element:INFO: Setting the data phase to 35 for uplink 30
12:22:25:setup_element:INFO: Setting the data phase to 34 for uplink 31
12:22:25:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: _______________________________________________________________________XXXXXX___
Uplink 29: _______________________________________________________________________XXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXX___
Uplink 31: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 27:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 28:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 31:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
]
12:22:25:setup_element:INFO: Beginning SMX ASICs map scan
12:22:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:22:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:22:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:22:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:22:25:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
12:22:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:22:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:22:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:22:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:22:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:22:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:22:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:22:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:22:28:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [24, 25, 26, 27, 28, 29, 30, 31]
ASICs Map:
ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
Clock Phase Characteristic:
Optimal Phase: 34
Window Length: 71
Eye Windows:
Uplink 24: ______________________________________________________________________XXXXXXXX__
Uplink 25: ______________________________________________________________________XXXXXXXX__
Uplink 26: ______________________________________________________________________XXXXXXXXX_
Uplink 27: ______________________________________________________________________XXXXXXXXX_
Uplink 28: _______________________________________________________________________XXXXXX___
Uplink 29: _______________________________________________________________________XXXXXX___
Uplink 30: ______________________________________________________________________XXXXXXX___
Uplink 31: ______________________________________________________________________XXXXXXX___
Data phase characteristics:
Uplink 24:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 25:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 26:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 27:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 28:
Optimal Phase: 32
Window Length: 34
Eye Window: __________XXXXXX________________________
Uplink 29:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
Uplink 30:
Optimal Phase: 35
Window Length: 34
Eye Window: _____________XXXXXX_____________________
Uplink 31:
Optimal Phase: 34
Window Length: 35
Eye Window: ____________XXXXX_______________________
12:22:28:setup_element:INFO: Performing Elink synchronization
12:22:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:22:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:22:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:22:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:22:28:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
12:22:28:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
12:22:28:ST3_emu:INFO: Number of chips: 4
addr | upli | dwnli | grp | uplinks | uplinks_map
1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)]
12:22:29:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
12:22:30:febtest:INFO: 30-1 | XA-000-08-002-000-004-058-01 | 40.9 | 1165.6
12:22:30:febtest:INFO: 28-3 | XA-000-08-002-000-004-052-01 | 28.2 | 1206.9
12:22:30:febtest:INFO: 26-5 | XA-000-08-002-000-004-053-01 | 25.1 | 1212.7
12:22:30:febtest:INFO: 24-7 | XA-000-08-002-000-004-054-01 | 34.6 | 1183.3
12:22:30:ST3_smx:INFO: Configuring SMX FAST
12:22:33:ST3_smx:INFO: chip: 30-1 40.898880 C 1159.654860 mV
12:22:33:ST3_smx:INFO: Electrons
12:22:33:ST3_smx:INFO: # loops 0
12:22:34:ST3_smx:INFO: # loops 1
12:22:36:ST3_smx:INFO: # loops 2
12:22:38:ST3_smx:INFO: # loops 3
12:22:39:ST3_smx:INFO: # loops 4
12:22:41:ST3_smx:INFO: Total # of broken channels: 0
12:22:41:ST3_smx:INFO: List of broken channels: []
12:22:41:ST3_smx:INFO: Total # of broken channels: 0
12:22:41:ST3_smx:INFO: List of broken channels: []
12:22:42:ST3_smx:INFO: Configuring SMX FAST
12:22:44:ST3_smx:INFO: chip: 28-3 25.062742 C 1218.600960 mV
12:22:44:ST3_smx:INFO: Electrons
12:22:44:ST3_smx:INFO: # loops 0
12:22:46:ST3_smx:INFO: # loops 1
12:22:48:ST3_smx:INFO: # loops 2
12:22:50:ST3_smx:INFO: # loops 3
12:22:51:ST3_smx:INFO: # loops 4
12:22:53:ST3_smx:INFO: Total # of broken channels: 0
12:22:53:ST3_smx:INFO: List of broken channels: []
12:22:53:ST3_smx:INFO: Total # of broken channels: 0
12:22:53:ST3_smx:INFO: List of broken channels: []
12:22:54:ST3_smx:INFO: Configuring SMX FAST
12:22:56:ST3_smx:INFO: chip: 26-5 31.389742 C 1189.190035 mV
12:22:56:ST3_smx:INFO: Electrons
12:22:56:ST3_smx:INFO: # loops 0
12:22:58:ST3_smx:INFO: # loops 1
12:22:59:ST3_smx:INFO: # loops 2
12:23:01:ST3_smx:INFO: # loops 3
12:23:02:ST3_smx:INFO: # loops 4
12:23:04:ST3_smx:INFO: Total # of broken channels: 0
12:23:04:ST3_smx:INFO: List of broken channels: []
12:23:04:ST3_smx:INFO: Total # of broken channels: 0
12:23:04:ST3_smx:INFO: List of broken channels: []
12:23:05:ST3_smx:INFO: Configuring SMX FAST
12:23:07:ST3_smx:INFO: chip: 24-7 28.225000 C 1200.969315 mV
12:23:07:ST3_smx:INFO: Electrons
12:23:07:ST3_smx:INFO: # loops 0
12:23:09:ST3_smx:INFO: # loops 1
12:23:10:ST3_smx:INFO: # loops 2
12:23:12:ST3_smx:INFO: # loops 3
12:23:13:ST3_smx:INFO: # loops 4
12:23:15:ST3_smx:INFO: Total # of broken channels: 0
12:23:15:ST3_smx:INFO: List of broken channels: []
12:23:15:ST3_smx:INFO: Total # of broken channels: 0
12:23:15:ST3_smx:INFO: List of broken channels: []
12:23:16:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
12:23:16:febtest:INFO: 30-1 | XA-000-08-002-000-004-058-01 | 40.9 | 1165.6
12:23:16:febtest:INFO: 28-3 | XA-000-08-002-000-004-052-01 | 25.1 | 1218.6
12:23:16:febtest:INFO: 26-5 | XA-000-08-002-000-004-053-01 | 34.6 | 1189.2
12:23:17:febtest:INFO: 24-7 | XA-000-08-002-000-004-054-01 | 31.4 | 1201.0
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_30-12_22_16
OPERATOR : Oleksandr S.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 2089
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.451', '0.8353', '1.850', '1.2640', '0.000', '0.0000', '7.001', '1.5660']
VI_after__Init : ['0', '0', '0', '0', '0', '0']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
12:23:18:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2089/TestDate_2024_01_30-12_22_16/