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FEB_2090 05.02.24 08:53:08
Info
08:52:48:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71
08:52:48:febtest:INFO: FEB 8-2 selected
08:52:48:smx_tester:INFO: Setting Elink clock mode to 160 MHz
08:52:54:ST3_Shared:INFO: Listo of operators:Olga B.;
08:53:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:53:08:ST3_Shared:INFO: -------------------------FEB-Sensor-------------------------
08:53:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:53:22:ST3_ModuleSelector:INFO: L4DL200116 M4DL2T2001162A2 62 A
08:53:22:ST3_ModuleSelector:INFO:
08:53:23:febtest:INFO: Testing FEB with SN 2090
08:53:26:smx_tester:INFO: Scanning setup
08:53:26:elinks:INFO: Disabling clock on downlink 0
08:53:26:elinks:INFO: Disabling clock on downlink 1
08:53:26:elinks:INFO: Disabling clock on downlink 2
08:53:26:elinks:INFO: Disabling clock on downlink 3
08:53:26:elinks:INFO: Disabling clock on downlink 4
08:53:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 0
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 1
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 2
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 3
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 4
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 5
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 6
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 7
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 8
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 9
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 10
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 11
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 12
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 13
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 14
08:53:26:setup_element:INFO: SOS detected for group 0, downlink 0, uplink 15
08:53:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:26:elinks:INFO: Disabling clock on downlink 0
08:53:26:elinks:INFO: Disabling clock on downlink 1
08:53:26:elinks:INFO: Disabling clock on downlink 2
08:53:26:elinks:INFO: Disabling clock on downlink 3
08:53:26:elinks:INFO: Disabling clock on downlink 4
08:53:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:53:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:26:elinks:INFO: Disabling clock on downlink 0
08:53:26:elinks:INFO: Disabling clock on downlink 1
08:53:26:elinks:INFO: Disabling clock on downlink 2
08:53:26:elinks:INFO: Disabling clock on downlink 3
08:53:26:elinks:INFO: Disabling clock on downlink 4
08:53:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:26:elinks:INFO: Disabling clock on downlink 0
08:53:26:elinks:INFO: Disabling clock on downlink 1
08:53:26:elinks:INFO: Disabling clock on downlink 2
08:53:26:elinks:INFO: Disabling clock on downlink 3
08:53:26:elinks:INFO: Disabling clock on downlink 4
08:53:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:53:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:26:elinks:INFO: Disabling clock on downlink 0
08:53:26:elinks:INFO: Disabling clock on downlink 1
08:53:26:elinks:INFO: Disabling clock on downlink 2
08:53:26:elinks:INFO: Disabling clock on downlink 3
08:53:26:elinks:INFO: Disabling clock on downlink 4
08:53:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:53:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:26:setup_element:INFO: Scanning clock phase
08:53:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:53:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:53:27:setup_element:INFO: Clock phase scan results for group 0, downlink 0
08:53:27:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:53:27:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:53:27:setup_element:INFO: Eye window for uplink 2 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
08:53:27:setup_element:INFO: Eye window for uplink 3 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
08:53:27:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
08:53:27:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
08:53:27:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:53:27:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:53:27:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:53:27:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:53:27:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:53:27:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:53:27:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:53:27:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
08:53:27:setup_element:INFO: Eye window for uplink 14: X________________________________________________________________________XXXXXXX
Clock Delay: 36
08:53:27:setup_element:INFO: Eye window for uplink 15: X________________________________________________________________________XXXXXXX
Clock Delay: 36
08:53:27:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 0
08:53:27:setup_element:INFO: Scanning data phases
08:53:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:53:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:53:33:setup_element:INFO: Data phase scan results for group 0, downlink 0
08:53:33:setup_element:INFO: Eye window for uplink 0 : _______________________________XXXXX____
Data delay found: 13
08:53:33:setup_element:INFO: Eye window for uplink 1 : __________________________XXXXXX________
Data delay found: 8
08:53:33:setup_element:INFO: Eye window for uplink 2 : ______________________________XXXXXX____
Data delay found: 12
08:53:33:setup_element:INFO: Eye window for uplink 3 : ____________________________XXXXX_______
Data delay found: 10
08:53:33:setup_element:INFO: Eye window for uplink 4 : ________________________________XXXXX___
Data delay found: 14
08:53:33:setup_element:INFO: Eye window for uplink 5 : ____________________________XXXXX_______
Data delay found: 10
08:53:33:setup_element:INFO: Eye window for uplink 6 : ____________________________XXXX________
Data delay found: 9
08:53:33:setup_element:INFO: Eye window for uplink 7 : _________________________XXXXX__________
Data delay found: 7
08:53:33:setup_element:INFO: Eye window for uplink 8 : _________________________________XXXX___
Data delay found: 14
08:53:33:setup_element:INFO: Eye window for uplink 9 : XXX__________________________________XXX
Data delay found: 19
08:53:33:setup_element:INFO: Eye window for uplink 10: XXX__________________________________XXX
Data delay found: 19
08:53:33:setup_element:INFO: Eye window for uplink 11: XXXXXX__________________________________
Data delay found: 22
08:53:33:setup_element:INFO: Eye window for uplink 12: ___XXXXX________________________________
Data delay found: 25
08:53:33:setup_element:INFO: Eye window for uplink 13: _____XXXXXX_____________________________
Data delay found: 27
08:53:33:setup_element:INFO: Eye window for uplink 14: _____XXXXX______________________XXXXXXXX
Data delay found: 20
08:53:33:setup_element:INFO: Eye window for uplink 15: _______XXXXX____________________XXXXXXXX
Data delay found: 21
08:53:33:setup_element:INFO: Setting the data phase to 13 for uplink 0
08:53:33:setup_element:INFO: Setting the data phase to 8 for uplink 1
08:53:33:setup_element:INFO: Setting the data phase to 12 for uplink 2
08:53:33:setup_element:INFO: Setting the data phase to 10 for uplink 3
08:53:33:setup_element:INFO: Setting the data phase to 14 for uplink 4
08:53:33:setup_element:INFO: Setting the data phase to 10 for uplink 5
08:53:33:setup_element:INFO: Setting the data phase to 9 for uplink 6
08:53:33:setup_element:INFO: Setting the data phase to 7 for uplink 7
08:53:33:setup_element:INFO: Setting the data phase to 14 for uplink 8
08:53:33:setup_element:INFO: Setting the data phase to 19 for uplink 9
08:53:33:setup_element:INFO: Setting the data phase to 19 for uplink 10
08:53:33:setup_element:INFO: Setting the data phase to 22 for uplink 11
08:53:33:setup_element:INFO: Setting the data phase to 25 for uplink 12
08:53:33:setup_element:INFO: Setting the data phase to 27 for uplink 13
08:53:33:setup_element:INFO: Setting the data phase to 20 for uplink 14
08:53:33:setup_element:INFO: Setting the data phase to 21 for uplink 15
08:53:33:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: X________________________________________________________________________XXXXXXX
Uplink 3: X________________________________________________________________________XXXXXXX
Uplink 4: ________________________________________________________________________________
Uplink 5: ________________________________________________________________________________
Uplink 6: ________________________________________________________________________XXXXXXX_
Uplink 7: ________________________________________________________________________XXXXXXX_
Uplink 8: ________________________________________________________________________XXXXXXX_
Uplink 9: ________________________________________________________________________XXXXXXX_
Uplink 10: ________________________________________________________________________XXXXXXXX
Uplink 11: ________________________________________________________________________XXXXXXXX
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: X________________________________________________________________________XXXXXXX
Uplink 15: X________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 1:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 2:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 3:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 4:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 5:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 6:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 7:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 8:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 9:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 10:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 11:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 12:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 13:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 14:
Optimal Phase: 20
Window Length: 22
Eye Window: _____XXXXX______________________XXXXXXXX
Uplink 15:
Optimal Phase: 21
Window Length: 20
Eye Window: _______XXXXX____________________XXXXXXXX
]
08:53:33:setup_element:INFO: Beginning SMX ASICs map scan
08:53:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:53:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:53:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
08:53:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
08:53:33:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:53:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 7
08:53:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 6
08:53:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 14
08:53:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 15
08:53:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 5
08:53:33:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 4
08:53:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 12
08:53:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 13
08:53:33:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 3
08:53:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 2
08:53:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 10
08:53:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 11
08:53:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 1
08:53:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 0
08:53:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 8
08:53:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 9
08:53:35:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 0
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
Clock Phase Characteristic:
Optimal Phase: 36
Window Length: 71
Eye Windows:
Uplink 0: ________________________________________________________________________XXXXXXXX
Uplink 1: ________________________________________________________________________XXXXXXXX
Uplink 2: X________________________________________________________________________XXXXXXX
Uplink 3: X________________________________________________________________________XXXXXXX
Uplink 4: ________________________________________________________________________________
Uplink 5: ________________________________________________________________________________
Uplink 6: ________________________________________________________________________XXXXXXX_
Uplink 7: ________________________________________________________________________XXXXXXX_
Uplink 8: ________________________________________________________________________XXXXXXX_
Uplink 9: ________________________________________________________________________XXXXXXX_
Uplink 10: ________________________________________________________________________XXXXXXXX
Uplink 11: ________________________________________________________________________XXXXXXXX
Uplink 12: ________________________________________________________________________XXXXXXXX
Uplink 13: ________________________________________________________________________XXXXXXXX
Uplink 14: X________________________________________________________________________XXXXXXX
Uplink 15: X________________________________________________________________________XXXXXXX
Data phase characteristics:
Uplink 0:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 1:
Optimal Phase: 8
Window Length: 34
Eye Window: __________________________XXXXXX________
Uplink 2:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 3:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 4:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 5:
Optimal Phase: 10
Window Length: 35
Eye Window: ____________________________XXXXX_______
Uplink 6:
Optimal Phase: 9
Window Length: 36
Eye Window: ____________________________XXXX________
Uplink 7:
Optimal Phase: 7
Window Length: 35
Eye Window: _________________________XXXXX__________
Uplink 8:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 9:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 10:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 11:
Optimal Phase: 22
Window Length: 34
Eye Window: XXXXXX__________________________________
Uplink 12:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 13:
Optimal Phase: 27
Window Length: 34
Eye Window: _____XXXXXX_____________________________
Uplink 14:
Optimal Phase: 20
Window Length: 22
Eye Window: _____XXXXX______________________XXXXXXXX
Uplink 15:
Optimal Phase: 21
Window Length: 20
Eye Window: _______XXXXX____________________XXXXXXXX
08:53:35:setup_element:INFO: Performing Elink synchronization
08:53:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:53:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [0]
08:53:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [0]
08:53:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [0]
08:53:36:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 0
08:53:36:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:53:36:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 0 | 0 | [7] | [(0, 7), (1, 6)]
1 | [0] | 0 | 0 | [14] | [(0, 14), (1, 15)]
2 | [0] | 0 | 0 | [5] | [(0, 5), (1, 4)]
3 | [0] | 0 | 0 | [12] | [(0, 12), (1, 13)]
4 | [0] | 0 | 0 | [3] | [(0, 3), (1, 2)]
5 | [0] | 0 | 0 | [10] | [(0, 10), (1, 11)]
6 | [0] | 0 | 0 | [1] | [(0, 1), (1, 0)]
7 | [0] | 0 | 0 | [8] | [(0, 8), (1, 9)]
08:53:37:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:53:37:febtest:INFO: 7-0 | XA-000-08-002-000-003-180-03 | 18.7 | 1201.0
08:53:38:febtest:INFO: 14-1 | XA-000-08-002-000-003-174-04 | 15.6 | 1206.9
08:53:38:febtest:INFO: 5-2 | XA-000-08-002-000-003-186-03 | 9.3 | 1242.0
08:53:38:febtest:INFO: 12-3 | XA-000-08-002-000-003-173-04 | 28.2 | 1171.5
08:53:38:febtest:INFO: 3-4 | XA-000-08-002-000-003-185-03 | 12.4 | 1236.2
08:53:39:febtest:INFO: 10-5 | XA-000-08-002-000-003-172-04 | 12.4 | 1230.3
08:53:39:febtest:INFO: 1-6 | XA-000-08-002-000-003-178-03 | 12.4 | 1242.0
08:53:39:febtest:INFO: 8-7 | XA-000-08-002-000-003-171-04 | 15.6 | 1218.6
08:53:40:ST3_smx:INFO: Configuring SMX FAST
08:53:42:ST3_smx:INFO: chip: 7-0 12.438562 C 1242.040240 mV
08:53:42:ST3_smx:INFO: Electrons
08:53:42:ST3_smx:INFO: # loops 0
08:53:43:ST3_smx:INFO: # loops 1
08:53:45:ST3_smx:INFO: # loops 2
08:53:47:ST3_smx:INFO: # loops 3
08:53:48:ST3_smx:INFO: # loops 4
08:53:50:ST3_smx:INFO: Total # of broken channels: 0
08:53:50:ST3_smx:INFO: List of broken channels: []
08:53:50:ST3_smx:INFO: Total # of broken channels: 0
08:53:50:ST3_smx:INFO: List of broken channels: []
08:53:50:ST3_smx:INFO: Configuring SMX FAST
08:53:52:ST3_smx:INFO: chip: 14-1 9.288730 C 1236.187875 mV
08:53:52:ST3_smx:INFO: Electrons
08:53:52:ST3_smx:INFO: # loops 0
08:53:54:ST3_smx:INFO: # loops 1
08:53:56:ST3_smx:INFO: # loops 2
08:53:57:ST3_smx:INFO: # loops 3
08:53:59:ST3_smx:INFO: # loops 4
08:54:00:ST3_smx:INFO: Total # of broken channels: 0
08:54:00:ST3_smx:INFO: List of broken channels: []
08:54:00:ST3_smx:INFO: Total # of broken channels: 0
08:54:00:ST3_smx:INFO: List of broken channels: []
08:54:01:ST3_smx:INFO: Configuring SMX FAST
08:54:03:ST3_smx:INFO: chip: 5-2 18.745682 C 1218.600960 mV
08:54:03:ST3_smx:INFO: Electrons
08:54:03:ST3_smx:INFO: # loops 0
08:54:04:ST3_smx:INFO: # loops 1
08:54:06:ST3_smx:INFO: # loops 2
08:54:08:ST3_smx:INFO: # loops 3
08:54:09:ST3_smx:INFO: # loops 4
08:54:11:ST3_smx:INFO: Total # of broken channels: 0
08:54:11:ST3_smx:INFO: List of broken channels: []
08:54:11:ST3_smx:INFO: Total # of broken channels: 0
08:54:11:ST3_smx:INFO: List of broken channels: []
08:54:11:ST3_smx:INFO: Configuring SMX FAST
08:54:13:ST3_smx:INFO: chip: 12-3 21.902970 C 1195.082160 mV
08:54:13:ST3_smx:INFO: Electrons
08:54:13:ST3_smx:INFO: # loops 0
08:54:14:ST3_smx:INFO: # loops 1
08:54:16:ST3_smx:INFO: # loops 2
08:54:18:ST3_smx:INFO: # loops 3
08:54:19:ST3_smx:INFO: # loops 4
08:54:21:ST3_smx:INFO: Total # of broken channels: 0
08:54:21:ST3_smx:INFO: List of broken channels: []
08:54:21:ST3_smx:INFO: Total # of broken channels: 0
08:54:21:ST3_smx:INFO: List of broken channels: []
08:54:21:ST3_smx:INFO: Configuring SMX FAST
08:54:23:ST3_smx:INFO: chip: 3-4 15.590880 C 1236.187875 mV
08:54:23:ST3_smx:INFO: Electrons
08:54:23:ST3_smx:INFO: # loops 0
08:54:25:ST3_smx:INFO: # loops 1
08:54:26:ST3_smx:INFO: # loops 2
08:54:28:ST3_smx:INFO: # loops 3
08:54:30:ST3_smx:INFO: # loops 4
08:54:31:ST3_smx:INFO: Total # of broken channels: 0
08:54:31:ST3_smx:INFO: List of broken channels: []
08:54:31:ST3_smx:INFO: Total # of broken channels: 0
08:54:31:ST3_smx:INFO: List of broken channels: []
08:54:32:ST3_smx:INFO: Configuring SMX FAST
08:54:33:ST3_smx:INFO: chip: 10-5 18.745682 C 1218.600960 mV
08:54:33:ST3_smx:INFO: Electrons
08:54:33:ST3_smx:INFO: # loops 0
08:54:35:ST3_smx:INFO: # loops 1
08:54:37:ST3_smx:INFO: # loops 2
08:54:38:ST3_smx:INFO: # loops 3
08:54:40:ST3_smx:INFO: # loops 4
08:54:41:ST3_smx:INFO: Total # of broken channels: 0
08:54:41:ST3_smx:INFO: List of broken channels: []
08:54:41:ST3_smx:INFO: Total # of broken channels: 0
08:54:41:ST3_smx:INFO: List of broken channels: []
08:54:42:ST3_smx:INFO: Configuring SMX FAST
08:54:44:ST3_smx:INFO: chip: 1-6 21.902970 C 1224.468235 mV
08:54:44:ST3_smx:INFO: Electrons
08:54:44:ST3_smx:INFO: # loops 0
08:54:45:ST3_smx:INFO: # loops 1
08:54:47:ST3_smx:INFO: # loops 2
08:54:49:ST3_smx:INFO: # loops 3
08:54:50:ST3_smx:INFO: # loops 4
08:54:52:ST3_smx:INFO: Total # of broken channels: 0
08:54:52:ST3_smx:INFO: List of broken channels: []
08:54:52:ST3_smx:INFO: Total # of broken channels: 0
08:54:52:ST3_smx:INFO: List of broken channels: []
08:54:52:ST3_smx:INFO: Configuring SMX FAST
08:54:54:ST3_smx:INFO: chip: 8-7 15.590880 C 1224.468235 mV
08:54:54:ST3_smx:INFO: Electrons
08:54:54:ST3_smx:INFO: # loops 0
08:54:56:ST3_smx:INFO: # loops 1
08:54:57:ST3_smx:INFO: # loops 2
08:54:59:ST3_smx:INFO: # loops 3
08:55:01:ST3_smx:INFO: # loops 4
08:55:02:ST3_smx:INFO: Total # of broken channels: 0
08:55:02:ST3_smx:INFO: List of broken channels: []
08:55:02:ST3_smx:INFO: Total # of broken channels: 0
08:55:02:ST3_smx:INFO: List of broken channels: []
08:55:03:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
08:55:03:febtest:INFO: 7-0 | XA-000-08-002-000-003-180-03 | 15.6 | 1242.0
08:55:04:febtest:INFO: 14-1 | XA-000-08-002-000-003-174-04 | 9.3 | 1236.2
08:55:04:febtest:INFO: 5-2 | XA-000-08-002-000-003-186-03 | 21.9 | 1218.6
08:55:04:febtest:INFO: 12-3 | XA-000-08-002-000-003-173-04 | 21.9 | 1201.0
08:55:04:febtest:INFO: 3-4 | XA-000-08-002-000-003-185-03 | 18.7 | 1236.2
08:55:05:febtest:INFO: 10-5 | XA-000-08-002-000-003-172-04 | 18.7 | 1218.6
08:55:05:febtest:INFO: 1-6 | XA-000-08-002-000-003-178-03 | 21.9 | 1218.6
08:55:05:febtest:INFO: 8-7 | XA-000-08-002-000-003-171-04 | 15.6 | 1224.5
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_02_05-08_53_08
OPERATOR : Olga B.;
SITE : GSI
SETUP : GSI_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME : L4DL200116 M4DL2T2001162A2 62 A
FEB_SN : 2090
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:
MODULE_NAME: L4DL200116 M4DL2T2001162A2 62 A
MODULE_TYPE:
MODULE_LADDER: L4DL200116
MODULE_MODULE: M4DL2T2001162A2
MODULE_SIZE: 62
MODULE_GRADE: A
---------------------------------------
VI_before_Init : ['2.450', '0.0003', '1.850', '0.0000', '2.450', '1.9390', '1.850', '0.6217']
VI_after__Init : ['2.450', '0.0002', '1.850', '0.0000', '2.450', '1.9630', '1.850', '0.3147']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
08:56:36:ST3_Shared:INFO: /home/cbm/public_html/Production_LogDir//FEB/FEB_2090/TestDate_2024_02_05-08_53_08/