FEB_2090    23.01.24 12:51:56

TextEdit.txt
            12:51:53:febtest:INFO:	FEB 8-2 selected
12:51:53:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
12:51:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:51:56:ST3_Shared:INFO:	-----------------------FEB-Microcable-----------------------
12:51:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:51:57:febtest:INFO:	Testing FEB with SN 2090
12:51:58:smx_tester:INFO:	Scanning setup
12:51:58:elinks:INFO:	Disabling clock on downlink 0
12:51:58:elinks:INFO:	Disabling clock on downlink 1
12:51:58:elinks:INFO:	Disabling clock on downlink 2
12:51:58:elinks:INFO:	Disabling clock on downlink 3
12:51:58:elinks:INFO:	Disabling clock on downlink 4
12:51:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:51:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:51:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:51:58:elinks:INFO:	Disabling clock on downlink 0
12:51:58:elinks:INFO:	Disabling clock on downlink 1
12:51:58:elinks:INFO:	Disabling clock on downlink 2
12:51:58:elinks:INFO:	Disabling clock on downlink 3
12:51:58:elinks:INFO:	Disabling clock on downlink 4
12:51:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:51:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:51:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:51:58:elinks:INFO:	Disabling clock on downlink 0
12:51:58:elinks:INFO:	Disabling clock on downlink 1
12:51:58:elinks:INFO:	Disabling clock on downlink 2
12:51:58:elinks:INFO:	Disabling clock on downlink 3
12:51:58:elinks:INFO:	Disabling clock on downlink 4
12:51:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:51:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:51:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:51:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:51:58:elinks:INFO:	Disabling clock on downlink 0
12:51:58:elinks:INFO:	Disabling clock on downlink 1
12:51:58:elinks:INFO:	Disabling clock on downlink 2
12:51:58:elinks:INFO:	Disabling clock on downlink 3
12:51:58:elinks:INFO:	Disabling clock on downlink 4
12:51:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:51:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:51:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:51:59:elinks:INFO:	Disabling clock on downlink 0
12:51:59:elinks:INFO:	Disabling clock on downlink 1
12:51:59:elinks:INFO:	Disabling clock on downlink 2
12:51:59:elinks:INFO:	Disabling clock on downlink 3
12:51:59:elinks:INFO:	Disabling clock on downlink 4
12:51:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:51:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:51:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:51:59:setup_element:INFO:	Scanning clock phase
12:51:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:51:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:51:59:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:51:59:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:51:59:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:51:59:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
12:51:59:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
12:51:59:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:51:59:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:51:59:setup_element:INFO:	Eye window for uplink 22: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:51:59:setup_element:INFO:	Eye window for uplink 23: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
12:51:59:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:51:59:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
12:51:59:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________________XXXX_
Clock Delay: 36
12:51:59:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________________XXXX_
Clock Delay: 36
12:51:59:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:51:59:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
12:51:59:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
12:51:59:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
12:51:59:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
12:51:59:setup_element:INFO:	Scanning data phases
12:51:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:51:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:52:05:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:52:05:setup_element:INFO:	Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
12:52:05:setup_element:INFO:	Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
12:52:05:setup_element:INFO:	Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
12:52:05:setup_element:INFO:	Eye window for uplink 19: X_________________________________XXXXX_
Data delay found: 17
12:52:05:setup_element:INFO:	Eye window for uplink 20: XX___________________________________XXX
Data delay found: 19
12:52:05:setup_element:INFO:	Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
12:52:05:setup_element:INFO:	Eye window for uplink 22: X___________________________________XXX_
Data delay found: 18
12:52:05:setup_element:INFO:	Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
12:52:05:setup_element:INFO:	Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
12:52:05:setup_element:INFO:	Eye window for uplink 25: _________XXXX___________________________
Data delay found: 30
12:52:05:setup_element:INFO:	Eye window for uplink 26: _____XXXXX___________XXXXXXXXXXXXXXXXXXX
Data delay found: 15
12:52:05:setup_element:INFO:	Eye window for uplink 27: ________XXXXXX_______XXXXXXXXXXXXXXXXXXX
Data delay found: 3
12:52:05:setup_element:INFO:	Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
12:52:05:setup_element:INFO:	Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
12:52:05:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
12:52:05:setup_element:INFO:	Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
12:52:05:setup_element:INFO:	Setting the data phase to 19 for uplink 16
12:52:05:setup_element:INFO:	Setting the data phase to 15 for uplink 17
12:52:05:setup_element:INFO:	Setting the data phase to 19 for uplink 18
12:52:05:setup_element:INFO:	Setting the data phase to 17 for uplink 19
12:52:05:setup_element:INFO:	Setting the data phase to 19 for uplink 20
12:52:05:setup_element:INFO:	Setting the data phase to 17 for uplink 21
12:52:05:setup_element:INFO:	Setting the data phase to 18 for uplink 22
12:52:05:setup_element:INFO:	Setting the data phase to 15 for uplink 23
12:52:05:setup_element:INFO:	Setting the data phase to 27 for uplink 24
12:52:05:setup_element:INFO:	Setting the data phase to 30 for uplink 25
12:52:05:setup_element:INFO:	Setting the data phase to 15 for uplink 26
12:52:05:setup_element:INFO:	Setting the data phase to 3 for uplink 27
12:52:05:setup_element:INFO:	Setting the data phase to 34 for uplink 28
12:52:05:setup_element:INFO:	Setting the data phase to 35 for uplink 29
12:52:05:setup_element:INFO:	Setting the data phase to 35 for uplink 30
12:52:05:setup_element:INFO:	Setting the data phase to 34 for uplink 31
12:52:05:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXXXX__
      Uplink 17: ______________________________________________________________________XXXXXXXX__
      Uplink 18: _______________________________________________________________________XXXXXXXXX
      Uplink 19: _______________________________________________________________________XXXXXXXXX
      Uplink 20: _______________________________________________________________________XXXXXXXX_
      Uplink 21: _______________________________________________________________________XXXXXXXX_
      Uplink 22: _______________________________________________________________________XXXXXXX__
      Uplink 23: _______________________________________________________________________XXXXXXX__
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: ___________________________________________________________________________XXXX_
      Uplink 27: ___________________________________________________________________________XXXX_
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: ________________________________________________________________________XXXXXXX_
      Uplink 31: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 17:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 18:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 19:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 20:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 21:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 22:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXX_
    Uplink 23:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 24:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 26:
      Optimal Phase: 15
      Window Length: 11
      Eye Window: _____XXXXX___________XXXXXXXXXXXXXXXXXXX
    Uplink 27:
      Optimal Phase: 3
      Window Length: 8
      Eye Window: ________XXXXXX_______XXXXXXXXXXXXXXXXXXX
    Uplink 28:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
]
12:52:05:setup_element:INFO:	Beginning SMX ASICs map scan
12:52:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:52:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:52:05:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:52:05:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:52:05:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:52:05:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:52:05:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:52:05:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:52:05:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:52:05:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:52:05:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:52:05:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:52:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:52:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:52:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:52:06:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:52:06:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:52:06:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:52:06:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:52:06:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:52:06:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:52:08:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25)
  Clock Phase Characteristic:
    Optimal Phase: 34
    Window Length: 70
    Eye Windows:
      Uplink 16: ______________________________________________________________________XXXXXXXX__
      Uplink 17: ______________________________________________________________________XXXXXXXX__
      Uplink 18: _______________________________________________________________________XXXXXXXXX
      Uplink 19: _______________________________________________________________________XXXXXXXXX
      Uplink 20: _______________________________________________________________________XXXXXXXX_
      Uplink 21: _______________________________________________________________________XXXXXXXX_
      Uplink 22: _______________________________________________________________________XXXXXXX__
      Uplink 23: _______________________________________________________________________XXXXXXX__
      Uplink 24: ______________________________________________________________________XXXXXXXX__
      Uplink 25: ______________________________________________________________________XXXXXXXX__
      Uplink 26: ___________________________________________________________________________XXXX_
      Uplink 27: ___________________________________________________________________________XXXX_
      Uplink 28: _______________________________________________________________________XXXXXXXX_
      Uplink 29: _______________________________________________________________________XXXXXXXX_
      Uplink 30: ________________________________________________________________________XXXXXXX_
      Uplink 31: ________________________________________________________________________XXXXXXX_
  Data phase characteristics:
    Uplink 16:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 17:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 18:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 19:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 20:
      Optimal Phase: 19
      Window Length: 35
      Eye Window: XX___________________________________XXX
    Uplink 21:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 22:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXX_
    Uplink 23:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 24:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 25:
      Optimal Phase: 30
      Window Length: 36
      Eye Window: _________XXXX___________________________
    Uplink 26:
      Optimal Phase: 15
      Window Length: 11
      Eye Window: _____XXXXX___________XXXXXXXXXXXXXXXXXXX
    Uplink 27:
      Optimal Phase: 3
      Window Length: 8
      Eye Window: ________XXXXXX_______XXXXXXXXXXXXXXXXXXX
    Uplink 28:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 29:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 30:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 31:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________

12:52:08:setup_element:INFO:	Performing Elink synchronization
12:52:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:52:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:52:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:52:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:52:08:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:52:08:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:52:08:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  2  |  0  |     [23]     |  [(0, 23), (1, 22)]
   1  |   [0]   |  2  |  0  |     [30]     |  [(0, 30), (1, 31)]
   2  |   [0]   |  2  |  0  |     [21]     |  [(0, 21), (1, 20)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 29)]
   4  |   [0]   |  2  |  0  |     [19]     |  [(0, 19), (1, 18)]
   5  |   [0]   |  2  |  0  |     [26]     |  [(0, 26), (1, 27)]
   6  |   [0]   |  2  |  0  |     [17]     |  [(0, 17), (1, 16)]
   7  |   [0]   |  2  |  0  |     [24]     |  [(0, 24), (1, 25)]
12:52:09:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:52:09:febtest:INFO:	23-0 | XA-000-08-002-000-003-180-03 |  34.6 | 1183.3
12:52:09:febtest:INFO:	30-1 | XA-000-08-002-000-003-174-04 |  28.2 | 1201.0
12:52:09:febtest:INFO:	21-2 | XA-000-08-002-000-003-186-03 |  21.9 | 1230.3
12:52:09:febtest:INFO:	28-3 | XA-000-08-002-000-003-173-04 |  28.2 | 1212.7
12:52:10:febtest:INFO:	19-4 | XA-000-08-002-000-003-185-03 |  28.2 | 1218.6
12:52:10:febtest:INFO:	26-5 | XA-000-08-002-000-003-172-04 |  21.9 | 1230.3
12:52:10:febtest:INFO:	17-6 | XA-000-08-002-000-003-178-03 |  25.1 | 1224.5
12:52:10:febtest:INFO:	24-7 | XA-000-08-002-000-003-171-04 |  21.9 | 1218.6
12:52:10:ST3_smx:INFO:	Configuring SMX FAST
12:52:12:ST3_smx:INFO:	chip: 23-0 	 28.225000 C 	 1218.600960 mV
12:52:12:ST3_smx:INFO:		Electrons
12:52:12:ST3_smx:INFO:	# loops 0
12:52:14:ST3_smx:INFO:	# loops 1
12:52:16:ST3_smx:INFO:	# loops 2
12:52:17:ST3_smx:INFO:	# loops 3
12:52:19:ST3_smx:INFO:	# loops 4
12:52:21:ST3_smx:INFO:	Total # of broken channels: 0
12:52:21:ST3_smx:INFO:	List of broken channels: []
12:52:21:ST3_smx:INFO:	Total # of broken channels: 0
12:52:21:ST3_smx:INFO:	List of broken channels: []
12:52:21:ST3_smx:INFO:	Configuring SMX FAST
12:52:23:ST3_smx:INFO:	chip: 30-1 	 21.902970 C 	 1230.330540 mV
12:52:23:ST3_smx:INFO:		Electrons
12:52:23:ST3_smx:INFO:	# loops 0
12:52:25:ST3_smx:INFO:	# loops 1
12:52:27:ST3_smx:INFO:	# loops 2
12:52:28:ST3_smx:INFO:	# loops 3
12:52:30:ST3_smx:INFO:	# loops 4
12:52:32:ST3_smx:INFO:	Total # of broken channels: 0
12:52:32:ST3_smx:INFO:	List of broken channels: []
12:52:32:ST3_smx:INFO:	Total # of broken channels: 0
12:52:32:ST3_smx:INFO:	List of broken channels: []
12:52:33:ST3_smx:INFO:	Configuring SMX FAST
12:52:35:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1200.969315 mV
12:52:35:ST3_smx:INFO:		Electrons
12:52:35:ST3_smx:INFO:	# loops 0
12:52:36:ST3_smx:INFO:	# loops 1
12:52:38:ST3_smx:INFO:	# loops 2
12:52:40:ST3_smx:INFO:	# loops 3
12:52:41:ST3_smx:INFO:	# loops 4
12:52:43:ST3_smx:INFO:	Total # of broken channels: 0
12:52:43:ST3_smx:INFO:	List of broken channels: []
12:52:43:ST3_smx:INFO:	Total # of broken channels: 0
12:52:43:ST3_smx:INFO:	List of broken channels: []
12:52:44:ST3_smx:INFO:	Configuring SMX FAST
12:52:46:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1195.082160 mV
12:52:46:ST3_smx:INFO:		Electrons
12:52:46:ST3_smx:INFO:	# loops 0
12:52:47:ST3_smx:INFO:	# loops 1
12:52:49:ST3_smx:INFO:	# loops 2
12:52:51:ST3_smx:INFO:	# loops 3
12:52:52:ST3_smx:INFO:	# loops 4
12:52:54:ST3_smx:INFO:	Total # of broken channels: 0
12:52:54:ST3_smx:INFO:	List of broken channels: []
12:52:54:ST3_smx:INFO:	Total # of broken channels: 0
12:52:54:ST3_smx:INFO:	List of broken channels: []
12:52:55:ST3_smx:INFO:	Configuring SMX FAST
12:52:57:ST3_smx:INFO:	chip: 19-4 	 31.389742 C 	 1218.600960 mV
12:52:57:ST3_smx:INFO:		Electrons
12:52:57:ST3_smx:INFO:	# loops 0
12:52:58:ST3_smx:INFO:	# loops 1
12:53:00:ST3_smx:INFO:	# loops 2
12:53:01:ST3_smx:INFO:	# loops 3
12:53:03:ST3_smx:INFO:	# loops 4
12:53:05:ST3_smx:INFO:	Total # of broken channels: 0
12:53:05:ST3_smx:INFO:	List of broken channels: []
12:53:05:ST3_smx:INFO:	Total # of broken channels: 0
12:53:05:ST3_smx:INFO:	List of broken channels: []
12:53:05:ST3_smx:INFO:	Configuring SMX FAST
12:53:07:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1218.600960 mV
12:53:07:ST3_smx:INFO:		Electrons
12:53:07:ST3_smx:INFO:	# loops 0
12:53:09:ST3_smx:INFO:	# loops 1
12:53:10:ST3_smx:INFO:	# loops 2
12:53:12:ST3_smx:INFO:	# loops 3
12:53:13:ST3_smx:INFO:	# loops 4
12:53:15:ST3_smx:INFO:	Total # of broken channels: 0
12:53:15:ST3_smx:INFO:	List of broken channels: []
12:53:15:ST3_smx:INFO:	Total # of broken channels: 0
12:53:15:ST3_smx:INFO:	List of broken channels: []
12:53:15:ST3_smx:INFO:	Configuring SMX FAST
12:53:17:ST3_smx:INFO:	chip: 17-6 	 31.389742 C 	 1206.851500 mV
12:53:17:ST3_smx:INFO:		Electrons
12:53:17:ST3_smx:INFO:	# loops 0
12:53:19:ST3_smx:INFO:	# loops 1
12:53:21:ST3_smx:INFO:	# loops 2
12:53:22:ST3_smx:INFO:	# loops 3
12:53:24:ST3_smx:INFO:	# loops 4
12:53:25:ST3_smx:INFO:	Total # of broken channels: 0
12:53:25:ST3_smx:INFO:	List of broken channels: []
12:53:25:ST3_smx:INFO:	Total # of broken channels: 0
12:53:25:ST3_smx:INFO:	List of broken channels: []
12:53:26:ST3_smx:INFO:	Configuring SMX FAST
12:53:28:ST3_smx:INFO:	chip: 24-7 	 25.062742 C 	 1224.468235 mV
12:53:28:ST3_smx:INFO:		Electrons
12:53:28:ST3_smx:INFO:	# loops 0
12:53:29:ST3_smx:INFO:	# loops 1
12:53:31:ST3_smx:INFO:	# loops 2
12:53:32:ST3_smx:INFO:	# loops 3
12:53:34:ST3_smx:INFO:	# loops 4
12:53:35:ST3_smx:INFO:	Total # of broken channels: 0
12:53:35:ST3_smx:INFO:	List of broken channels: []
12:53:35:ST3_smx:INFO:	Total # of broken channels: 0
12:53:35:ST3_smx:INFO:	List of broken channels: []
12:53:36:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
12:53:36:febtest:INFO:	23-0 | XA-000-08-002-000-003-180-03 |  34.6 | 1212.7
12:53:36:febtest:INFO:	30-1 | XA-000-08-002-000-003-174-04 |  28.2 | 1230.3
12:53:37:febtest:INFO:	21-2 | XA-000-08-002-000-003-186-03 |  37.7 | 1201.0
12:53:37:febtest:INFO:	28-3 | XA-000-08-002-000-003-173-04 |  37.7 | 1195.1
12:53:37:febtest:INFO:	19-4 | XA-000-08-002-000-003-185-03 |  31.4 | 1212.7
12:53:37:febtest:INFO:	26-5 | XA-000-08-002-000-003-172-04 |  31.4 | 1218.6
12:53:38:febtest:INFO:	17-6 | XA-000-08-002-000-003-178-03 |  31.4 | 1206.9
12:53:38:febtest:INFO:	24-7 | XA-000-08-002-000-003-171-04 |  25.1 | 1224.5
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 2024_01_23-12_51_56
OPERATOR  : Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4UL401032 M4UL4B2010322A2 62 C

FEB_SN : 2090
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
---------------------------------------
VI_before_Init : ['2.447', '1.9740', '1.846', '2.5520', '7.000', '1.5820', '7.000', '1.5820']
VI_after__Init : ['2.450', '1.9790', '1.850', '0.5865', '7.000', '1.5790', '7.000', '1.5790']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
12:53:38:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; Robert V.; 
12:53:38:ST3_Shared:INFO:	Listo of operators:Oleksandr S.; 
12:53:38:ST3_Shared:INFO:	Listo of operators:Alois Alzheimer
12:53:53:ST3_Shared:INFO:	Listo of operators:Robert V.; 
12:54:03:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2090/TestDate_2024_01_23-12_51_56/