
FEB_2090 01.02.24 16:13:58
TextEdit.txt
16:13:39:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,123796,HW50020003/SW2.71 16:13:45:ST3_Shared:INFO: Listo of operators:Robert V.; 16:13:46:ST3_Shared:INFO: Listo of operators:Robert V.; Irakli K.; 16:13:48:febtest:INFO: FEB 8-2 selected 16:13:48:smx_tester:INFO: Setting Elink clock mode to 160 MHz 16:13:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 16:13:58:ST3_Shared:INFO: -------------------------FEB-Sensor------------------------- 16:13:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 16:14:28:ST3_ModuleSelector:INFO: L4DL200116 M4DL2T2001162A2 62 A 16:14:28:ST3_ModuleSelector:INFO: 10363 16:14:29:febtest:INFO: Testing FEB with SN 2090 16:14:31:smx_tester:INFO: Scanning setup 16:14:31:elinks:INFO: Disabling clock on downlink 0 16:14:31:elinks:INFO: Disabling clock on downlink 1 16:14:31:elinks:INFO: Disabling clock on downlink 2 16:14:31:elinks:INFO: Disabling clock on downlink 3 16:14:31:elinks:INFO: Disabling clock on downlink 4 16:14:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:14:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 16:14:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:14:31:elinks:INFO: Disabling clock on downlink 0 16:14:31:elinks:INFO: Disabling clock on downlink 1 16:14:31:elinks:INFO: Disabling clock on downlink 2 16:14:31:elinks:INFO: Disabling clock on downlink 3 16:14:31:elinks:INFO: Disabling clock on downlink 4 16:14:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:14:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 16:14:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:14:32:elinks:INFO: Disabling clock on downlink 0 16:14:32:elinks:INFO: Disabling clock on downlink 1 16:14:32:elinks:INFO: Disabling clock on downlink 2 16:14:32:elinks:INFO: Disabling clock on downlink 3 16:14:32:elinks:INFO: Disabling clock on downlink 4 16:14:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:14:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 16:14:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 16:14:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:14:32:elinks:INFO: Disabling clock on downlink 0 16:14:32:elinks:INFO: Disabling clock on downlink 1 16:14:32:elinks:INFO: Disabling clock on downlink 2 16:14:32:elinks:INFO: Disabling clock on downlink 3 16:14:32:elinks:INFO: Disabling clock on downlink 4 16:14:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:14:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 16:14:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:14:32:elinks:INFO: Disabling clock on downlink 0 16:14:32:elinks:INFO: Disabling clock on downlink 1 16:14:32:elinks:INFO: Disabling clock on downlink 2 16:14:32:elinks:INFO: Disabling clock on downlink 3 16:14:32:elinks:INFO: Disabling clock on downlink 4 16:14:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:14:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 16:14:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:14:32:setup_element:INFO: Scanning clock phase 16:14:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:14:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:14:32:setup_element:INFO: Clock phase scan results for group 0, downlink 2 16:14:32:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 16:14:32:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXXXX__ Clock Delay: 33 16:14:32:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 16:14:32:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXXXXX Clock Delay: 35 16:14:32:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 16:14:32:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 16:14:32:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 16:14:33:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 16:14:33:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________ Clock Delay: 40 16:14:33:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________ Clock Delay: 40 16:14:33:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 16:14:33:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 16:14:33:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 16:14:33:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 16:14:33:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 16:14:33:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXXX_ Clock Delay: 34 16:14:33:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 16:14:33:setup_element:INFO: Scanning data phases 16:14:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:14:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:14:38:setup_element:INFO: Data phase scan results for group 0, downlink 2 16:14:38:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX Data delay found: 19 16:14:38:setup_element:INFO: Eye window for uplink 17: ________________________________XXXXX___ Data delay found: 14 16:14:38:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX Data delay found: 18 16:14:38:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__ Data delay found: 15 16:14:38:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX Data delay found: 18 16:14:38:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXXX Data delay found: 16 16:14:38:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXX_ Data delay found: 17 16:14:38:setup_element:INFO: Eye window for uplink 23: _________________________________XXXX___ Data delay found: 14 16:14:38:setup_element:INFO: Eye window for uplink 24: ____XXXXXX______________________________ Data delay found: 26 16:14:38:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________ Data delay found: 29 16:14:38:setup_element:INFO: Eye window for uplink 26: _____XXXXX______________________________ Data delay found: 27 16:14:38:setup_element:INFO: Eye window for uplink 27: ________XXXXXX__________________________ Data delay found: 30 16:14:38:setup_element:INFO: Eye window for uplink 28: ___________XXXX_________________________ Data delay found: 32 16:14:38:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________ Data delay found: 34 16:14:38:setup_element:INFO: Eye window for uplink 30: _____________XXXXX______________________ Data delay found: 35 16:14:38:setup_element:INFO: Eye window for uplink 31: ___________XXXXX________________________ Data delay found: 33 16:14:38:setup_element:INFO: Setting the data phase to 19 for uplink 16 16:14:38:setup_element:INFO: Setting the data phase to 14 for uplink 17 16:14:38:setup_element:INFO: Setting the data phase to 18 for uplink 18 16:14:38:setup_element:INFO: Setting the data phase to 15 for uplink 19 16:14:38:setup_element:INFO: Setting the data phase to 18 for uplink 20 16:14:38:setup_element:INFO: Setting the data phase to 16 for uplink 21 16:14:38:setup_element:INFO: Setting the data phase to 17 for uplink 22 16:14:38:setup_element:INFO: Setting the data phase to 14 for uplink 23 16:14:38:setup_element:INFO: Setting the data phase to 26 for uplink 24 16:14:38:setup_element:INFO: Setting the data phase to 29 for uplink 25 16:14:38:setup_element:INFO: Setting the data phase to 27 for uplink 26 16:14:38:setup_element:INFO: Setting the data phase to 30 for uplink 27 16:14:38:setup_element:INFO: Setting the data phase to 32 for uplink 28 16:14:38:setup_element:INFO: Setting the data phase to 34 for uplink 29 16:14:38:setup_element:INFO: Setting the data phase to 35 for uplink 30 16:14:38:setup_element:INFO: Setting the data phase to 33 for uplink 31 16:14:38:ST3_emu:ERROR: [ Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: None Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 16: ______________________________________________________________________XXXXXXXX__ Uplink 17: ______________________________________________________________________XXXXXXXX__ Uplink 18: _______________________________________________________________________XXXXXXXXX Uplink 19: _______________________________________________________________________XXXXXXXXX Uplink 20: _______________________________________________________________________XXXXXXXX_ Uplink 21: _______________________________________________________________________XXXXXXXX_ Uplink 22: _______________________________________________________________________XXXXXXX__ Uplink 23: _______________________________________________________________________XXXXXXX__ Uplink 24: ________________________________________________________________________________ Uplink 25: ________________________________________________________________________________ Uplink 26: _______________________________________________________________________XXXXXXX__ Uplink 27: _______________________________________________________________________XXXXXXX__ Uplink 28: _______________________________________________________________________XXXXXXXX_ Uplink 29: _______________________________________________________________________XXXXXXXX_ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 17: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 20: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 21: Optimal Phase: 16 Window Length: 34 Eye Window: __________________________________XXXXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXX_ Uplink 23: Optimal Phase: 14 Window Length: 36 Eye Window: _________________________________XXXX___ Uplink 24: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 25: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 26: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 27: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 28: Optimal Phase: 32 Window Length: 36 Eye Window: ___________XXXX_________________________ Uplink 29: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 30: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 31: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ ] 16:14:38:setup_element:INFO: Beginning SMX ASICs map scan 16:14:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:14:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:14:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 16:14:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 16:14:38:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 16:14:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 16:14:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 16:14:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 16:14:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 16:14:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 16:14:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 16:14:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 16:14:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 16:14:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 16:14:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 16:14:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 16:14:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 16:14:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 16:14:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 16:14:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 16:14:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 16:14:41:ST3_emu:ERROR: Setup Element: Group: 0 Downlink: 2 Uplinks: [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] ASICs Map: ASIC address 0x0: (ASIC uplink, uplink): (0, 23), (1, 22) ASIC address 0x1: (ASIC uplink, uplink): (0, 30), (1, 31) ASIC address 0x2: (ASIC uplink, uplink): (0, 21), (1, 20) ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 29) ASIC address 0x4: (ASIC uplink, uplink): (0, 19), (1, 18) ASIC address 0x5: (ASIC uplink, uplink): (0, 26), (1, 27) ASIC address 0x6: (ASIC uplink, uplink): (0, 17), (1, 16) ASIC address 0x7: (ASIC uplink, uplink): (0, 24), (1, 25) Clock Phase Characteristic: Optimal Phase: 34 Window Length: 70 Eye Windows: Uplink 16: ______________________________________________________________________XXXXXXXX__ Uplink 17: ______________________________________________________________________XXXXXXXX__ Uplink 18: _______________________________________________________________________XXXXXXXXX Uplink 19: _______________________________________________________________________XXXXXXXXX Uplink 20: _______________________________________________________________________XXXXXXXX_ Uplink 21: _______________________________________________________________________XXXXXXXX_ Uplink 22: _______________________________________________________________________XXXXXXX__ Uplink 23: _______________________________________________________________________XXXXXXX__ Uplink 24: ________________________________________________________________________________ Uplink 25: ________________________________________________________________________________ Uplink 26: _______________________________________________________________________XXXXXXX__ Uplink 27: _______________________________________________________________________XXXXXXX__ Uplink 28: _______________________________________________________________________XXXXXXXX_ Uplink 29: _______________________________________________________________________XXXXXXXX_ Uplink 30: _______________________________________________________________________XXXXXXXX_ Uplink 31: _______________________________________________________________________XXXXXXXX_ Data phase characteristics: Uplink 16: Optimal Phase: 19 Window Length: 35 Eye Window: XX___________________________________XXX Uplink 17: Optimal Phase: 14 Window Length: 35 Eye Window: ________________________________XXXXX___ Uplink 18: Optimal Phase: 18 Window Length: 34 Eye Window: XX__________________________________XXXX Uplink 19: Optimal Phase: 15 Window Length: 35 Eye Window: _________________________________XXXXX__ Uplink 20: Optimal Phase: 18 Window Length: 35 Eye Window: X___________________________________XXXX Uplink 21: Optimal Phase: 16 Window Length: 34 Eye Window: __________________________________XXXXXX Uplink 22: Optimal Phase: 17 Window Length: 34 Eye Window: X__________________________________XXXX_ Uplink 23: Optimal Phase: 14 Window Length: 36 Eye Window: _________________________________XXXX___ Uplink 24: Optimal Phase: 26 Window Length: 34 Eye Window: ____XXXXXX______________________________ Uplink 25: Optimal Phase: 29 Window Length: 35 Eye Window: _______XXXXX____________________________ Uplink 26: Optimal Phase: 27 Window Length: 35 Eye Window: _____XXXXX______________________________ Uplink 27: Optimal Phase: 30 Window Length: 34 Eye Window: ________XXXXXX__________________________ Uplink 28: Optimal Phase: 32 Window Length: 36 Eye Window: ___________XXXX_________________________ Uplink 29: Optimal Phase: 34 Window Length: 35 Eye Window: ____________XXXXX_______________________ Uplink 30: Optimal Phase: 35 Window Length: 35 Eye Window: _____________XXXXX______________________ Uplink 31: Optimal Phase: 33 Window Length: 35 Eye Window: ___________XXXXX________________________ 16:14:41:setup_element:INFO: Performing Elink synchronization 16:14:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:14:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:14:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 16:14:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 16:14:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 16:14:41:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 16:14:41:ST3_emu:INFO: Number of chips: 8 addr | upli | dwnli | grp | uplinks | uplinks_map 0 | [0] | 2 | 0 | [23] | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | [(0, 24), (1, 25)] 16:14:43:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 16:14:43:febtest:INFO: 23-0 | XA-000-08-002-000-003-180-03 | 34.6 | 1206.9 16:14:43:febtest:INFO: 30-1 | XA-000-08-002-000-003-174-04 | 34.6 | 1201.0 16:14:44:febtest:INFO: 21-2 | XA-000-08-002-000-003-186-03 | 25.1 | 1242.0 16:14:44:febtest:INFO: 28-3 | XA-000-08-002-000-003-173-04 | 34.6 | 1206.9 16:14:44:febtest:INFO: 19-4 | XA-000-08-002-000-003-185-03 | 28.2 | 1236.2 16:14:44:febtest:INFO: 26-5 | XA-000-08-002-000-003-172-04 | 28.2 | 1230.3 16:14:45:febtest:INFO: 17-6 | XA-000-08-002-000-003-178-03 | 28.2 | 1230.3 16:14:45:febtest:INFO: 24-7 | XA-000-08-002-000-003-171-04 | 28.2 | 1218.6 16:14:45:ST3_smx:INFO: Configuring SMX FAST 16:14:47:ST3_smx:INFO: chip: 23-0 28.225000 C 1230.330540 mV 16:14:47:ST3_smx:INFO: Electrons 16:14:47:ST3_smx:INFO: # loops 0 16:14:49:ST3_smx:INFO: # loops 1 16:14:51:ST3_smx:INFO: # loops 2 16:14:52:ST3_smx:INFO: # loops 3 16:14:54:ST3_smx:INFO: # loops 4 16:14:55:ST3_smx:INFO: Total # of broken channels: 0 16:14:55:ST3_smx:INFO: List of broken channels: [] 16:14:55:ST3_smx:INFO: Total # of broken channels: 0 16:14:55:ST3_smx:INFO: List of broken channels: [] 16:14:56:ST3_smx:INFO: Configuring SMX FAST 16:14:58:ST3_smx:INFO: chip: 30-1 31.389742 C 1230.330540 mV 16:14:58:ST3_smx:INFO: Electrons 16:14:58:ST3_smx:INFO: # loops 0 16:14:59:ST3_smx:INFO: # loops 1 16:15:01:ST3_smx:INFO: # loops 2 16:15:03:ST3_smx:INFO: # loops 3 16:15:04:ST3_smx:INFO: # loops 4 16:15:06:ST3_smx:INFO: Total # of broken channels: 0 16:15:06:ST3_smx:INFO: List of broken channels: [] 16:15:06:ST3_smx:INFO: Total # of broken channels: 0 16:15:06:ST3_smx:INFO: List of broken channels: [] 16:15:06:ST3_smx:INFO: Configuring SMX FAST 16:15:08:ST3_smx:INFO: chip: 21-2 37.726682 C 1212.728715 mV 16:15:08:ST3_smx:INFO: Electrons 16:15:08:ST3_smx:INFO: # loops 0 16:15:10:ST3_smx:INFO: # loops 1 16:15:11:ST3_smx:INFO: # loops 2 16:15:13:ST3_smx:INFO: # loops 3 16:15:14:ST3_smx:INFO: # loops 4 16:15:16:ST3_smx:INFO: Total # of broken channels: 0 16:15:16:ST3_smx:INFO: List of broken channels: [] 16:15:16:ST3_smx:INFO: Total # of broken channels: 0 16:15:16:ST3_smx:INFO: List of broken channels: [] 16:15:16:ST3_smx:INFO: Configuring SMX FAST 16:15:18:ST3_smx:INFO: chip: 28-3 44.073563 C 1189.190035 mV 16:15:18:ST3_smx:INFO: Electrons 16:15:18:ST3_smx:INFO: # loops 0 16:15:20:ST3_smx:INFO: # loops 1 16:15:22:ST3_smx:INFO: # loops 2 16:15:23:ST3_smx:INFO: # loops 3 16:15:25:ST3_smx:INFO: # loops 4 16:15:26:ST3_smx:INFO: Total # of broken channels: 0 16:15:26:ST3_smx:INFO: List of broken channels: [] 16:15:26:ST3_smx:INFO: Total # of broken channels: 0 16:15:26:ST3_smx:INFO: List of broken channels: [] 16:15:27:ST3_smx:INFO: Configuring SMX FAST 16:15:28:ST3_smx:INFO: chip: 19-4 34.556970 C 1230.330540 mV 16:15:28:ST3_smx:INFO: Electrons 16:15:29:ST3_smx:INFO: # loops 0 16:15:30:ST3_smx:INFO: # loops 1 16:15:32:ST3_smx:INFO: # loops 2 16:15:33:ST3_smx:INFO: # loops 3 16:15:35:ST3_smx:INFO: # loops 4 16:15:36:ST3_smx:INFO: Total # of broken channels: 0 16:15:36:ST3_smx:INFO: List of broken channels: [] 16:15:36:ST3_smx:INFO: Total # of broken channels: 1 16:15:36:ST3_smx:INFO: List of broken channels: [84] 16:15:37:ST3_smx:INFO: Configuring SMX FAST 16:15:39:ST3_smx:INFO: chip: 26-5 34.556970 C 1212.728715 mV 16:15:39:ST3_smx:INFO: Electrons 16:15:39:ST3_smx:INFO: # loops 0 16:15:40:ST3_smx:INFO: # loops 1 16:15:42:ST3_smx:INFO: # loops 2 16:15:44:ST3_smx:INFO: # loops 3 16:15:45:ST3_smx:INFO: # loops 4 16:15:47:ST3_smx:INFO: Total # of broken channels: 0 16:15:47:ST3_smx:INFO: List of broken channels: [] 16:15:47:ST3_smx:INFO: Total # of broken channels: 0 16:15:47:ST3_smx:INFO: List of broken channels: [] 16:15:47:ST3_smx:INFO: Configuring SMX FAST 16:15:49:ST3_smx:INFO: chip: 17-6 34.556970 C 1218.600960 mV 16:15:49:ST3_smx:INFO: Electrons 16:15:49:ST3_smx:INFO: # loops 0 16:15:51:ST3_smx:INFO: # loops 1 16:15:52:ST3_smx:INFO: # loops 2 16:15:54:ST3_smx:INFO: # loops 3 16:15:56:ST3_smx:INFO: # loops 4 16:15:57:ST3_smx:INFO: Total # of broken channels: 0 16:15:57:ST3_smx:INFO: List of broken channels: [] 16:15:57:ST3_smx:INFO: Total # of broken channels: 0 16:15:57:ST3_smx:INFO: List of broken channels: [] 16:15:58:ST3_smx:INFO: Configuring SMX FAST 16:15:59:ST3_smx:INFO: chip: 24-7 31.389742 C 1224.468235 mV 16:16:00:ST3_smx:INFO: Electrons 16:16:00:ST3_smx:INFO: # loops 0 16:16:01:ST3_smx:INFO: # loops 1 16:16:03:ST3_smx:INFO: # loops 2 16:16:04:ST3_smx:INFO: # loops 3 16:16:06:ST3_smx:INFO: # loops 4 16:16:07:ST3_smx:INFO: Total # of broken channels: 0 16:16:07:ST3_smx:INFO: List of broken channels: [] 16:16:07:ST3_smx:INFO: Total # of broken channels: 0 16:16:07:ST3_smx:INFO: List of broken channels: [] 16:16:08:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV] 16:16:09:febtest:INFO: 23-0 | XA-000-08-002-000-003-180-03 | 34.6 | 1230.3 16:16:09:febtest:INFO: 30-1 | XA-000-08-002-000-003-174-04 | 34.6 | 1230.3 16:16:09:febtest:INFO: 21-2 | XA-000-08-002-000-003-186-03 | 40.9 | 1212.7 16:16:09:febtest:INFO: 28-3 | XA-000-08-002-000-003-173-04 | 44.1 | 1195.1 16:16:10:febtest:INFO: 19-4 | XA-000-08-002-000-003-185-03 | 34.6 | 1230.3 16:16:10:febtest:INFO: 26-5 | XA-000-08-002-000-003-172-04 | 37.7 | 1218.6 16:16:10:febtest:INFO: 17-6 | XA-000-08-002-000-003-178-03 | 34.6 | 1218.6 16:16:10:febtest:INFO: 24-7 | XA-000-08-002-000-003-171-04 | 31.4 | 1224.5 ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Sensor TEST_DATE : 2024_02_01-16_13_58 OPERATOR : Robert V.; Irakli K.; SITE : GSI SETUP : GSI_TEST_SETUP_1 Set-ID : --------------------------------------- MODULE_NAME : L4DL200116 M4DL2T2001162A2 62 A FEB_SN : 2090 FEB_TYPE : 8.2 FEB_UPLINKS : 2 FEB_A : 1 FEB_B : 0 --------------------------------------- SENSOR_ID: 10363 MODULE_NAME: L4DL200116 M4DL2T2001162A2 62 A MODULE_TYPE: MODULE_LADDER: L4DL200116 MODULE_MODULE: M4DL2T2001162A2 MODULE_SIZE: 62 MODULE_GRADE: A --------------------------------------- VI_before_Init : ['2.450', '1.8980', '1.850', '0.6271', '2.450', '0.0001', '1.850', '0.0001'] VI_after__Init : ['2.450', '1.9700', '1.850', '0.4124', '2.450', '0.0001', '1.850', '0.0001'] VI_at__the_End : ['0', '0', '0', '0', '0', '0'] 16:16:17:ST3_Shared:INFO: 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