09:37:42:febtest:INFO:	FEB 8-2 selected
09:37:42:smx_tester:INFO:	Setting Elink clock mode to 160 MHz
09:37:44:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:37:44:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:37:44:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:38:00:ST3_ModuleSelector:INFO:	L4DL600119 M4DL6T1001191A2 124 D

09:38:00:ST3_ModuleSelector:INFO:	
09:38:01:febtest:INFO:	Testing FEB with SN 2092
09:38:03:smx_tester:INFO:	Scanning setup
09:38:03:elinks:INFO:	Disabling clock on downlink 0
09:38:03:elinks:INFO:	Disabling clock on downlink 1
09:38:03:elinks:INFO:	Disabling clock on downlink 2
09:38:03:elinks:INFO:	Disabling clock on downlink 3
09:38:03:elinks:INFO:	Disabling clock on downlink 4
09:38:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:38:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 1
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 2
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 3
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 4
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 5
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 6
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 7
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 8
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 9
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 10
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 11
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 12
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 13
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 14
09:38:03:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 15
09:38:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:38:03:elinks:INFO:	Disabling clock on downlink 0
09:38:03:elinks:INFO:	Disabling clock on downlink 1
09:38:03:elinks:INFO:	Disabling clock on downlink 2
09:38:03:elinks:INFO:	Disabling clock on downlink 3
09:38:03:elinks:INFO:	Disabling clock on downlink 4
09:38:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:38:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:38:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:38:03:elinks:INFO:	Disabling clock on downlink 0
09:38:03:elinks:INFO:	Disabling clock on downlink 1
09:38:03:elinks:INFO:	Disabling clock on downlink 2
09:38:03:elinks:INFO:	Disabling clock on downlink 3
09:38:03:elinks:INFO:	Disabling clock on downlink 4
09:38:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:38:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:38:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:38:03:elinks:INFO:	Disabling clock on downlink 0
09:38:03:elinks:INFO:	Disabling clock on downlink 1
09:38:03:elinks:INFO:	Disabling clock on downlink 2
09:38:03:elinks:INFO:	Disabling clock on downlink 3
09:38:03:elinks:INFO:	Disabling clock on downlink 4
09:38:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:38:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:38:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:38:03:elinks:INFO:	Disabling clock on downlink 0
09:38:03:elinks:INFO:	Disabling clock on downlink 1
09:38:03:elinks:INFO:	Disabling clock on downlink 2
09:38:03:elinks:INFO:	Disabling clock on downlink 3
09:38:03:elinks:INFO:	Disabling clock on downlink 4
09:38:03:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:38:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:38:03:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:38:03:setup_element:INFO:	Scanning clock phase
09:38:03:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:38:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:38:04:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
09:38:04:setup_element:INFO:	Eye window for uplink 0 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:38:04:setup_element:INFO:	Eye window for uplink 1 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:38:04:setup_element:INFO:	Eye window for uplink 2 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:38:04:setup_element:INFO:	Eye window for uplink 3 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:38:04:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:38:04:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:38:04:setup_element:INFO:	Eye window for uplink 6 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:38:04:setup_element:INFO:	Eye window for uplink 7 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
09:38:04:setup_element:INFO:	Eye window for uplink 8 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:38:04:setup_element:INFO:	Eye window for uplink 9 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:38:04:setup_element:INFO:	Eye window for uplink 10: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:38:04:setup_element:INFO:	Eye window for uplink 11: ________________________________________________________________________XXXXXXXX
Clock Delay: 35
09:38:04:setup_element:INFO:	Eye window for uplink 12: _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:38:04:setup_element:INFO:	Eye window for uplink 13: _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:38:04:setup_element:INFO:	Eye window for uplink 14: X__________________________________________________________________________XXXXX
Clock Delay: 37
09:38:04:setup_element:INFO:	Eye window for uplink 15: X__________________________________________________________________________XXXXX
Clock Delay: 37
09:38:04:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 0
09:38:04:setup_element:INFO:	Scanning data phases
09:38:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:38:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:38:10:setup_element:INFO:	Data phase scan results for group 0, downlink 0
09:38:10:setup_element:INFO:	Eye window for uplink 0 : XX_________________________________XXXXX
Data delay found: 18
09:38:10:setup_element:INFO:	Eye window for uplink 1 : _______________________________XXXXX____
Data delay found: 13
09:38:10:setup_element:INFO:	Eye window for uplink 2 : ________________________________XXXXXX__
Data delay found: 14
09:38:10:setup_element:INFO:	Eye window for uplink 3 : _____________________________XXXXXX_____
Data delay found: 11
09:38:10:setup_element:INFO:	Eye window for uplink 4 : ________________________________XXXXX___
Data delay found: 14
09:38:10:setup_element:INFO:	Eye window for uplink 5 : _____________________________XXXXX______
Data delay found: 11
09:38:10:setup_element:INFO:	Eye window for uplink 6 : _____________________________XXXX_______
Data delay found: 10
09:38:10:setup_element:INFO:	Eye window for uplink 7 : __________________________XXXXX_________
Data delay found: 8
09:38:10:setup_element:INFO:	Eye window for uplink 8 : ___________________________________XXXX_
Data delay found: 16
09:38:10:setup_element:INFO:	Eye window for uplink 9 : XXXXX___________________________________
Data delay found: 22
09:38:10:setup_element:INFO:	Eye window for uplink 10: XXXXX__________________________________X
Data delay found: 21
09:38:10:setup_element:INFO:	Eye window for uplink 11: ___XXXXXX_______________________________
Data delay found: 25
09:38:10:setup_element:INFO:	Eye window for uplink 12: _____XXXXX______________________________
Data delay found: 27
09:38:10:setup_element:INFO:	Eye window for uplink 13: ________XXXX____________________________
Data delay found: 29
09:38:10:setup_element:INFO:	Eye window for uplink 14: _________XXXXX__________________________
Data delay found: 31
09:38:10:setup_element:INFO:	Eye window for uplink 15: __________XXXXXX________________________
Data delay found: 32
09:38:10:setup_element:INFO:	Setting the data phase to 18 for uplink 0
09:38:10:setup_element:INFO:	Setting the data phase to 13 for uplink 1
09:38:10:setup_element:INFO:	Setting the data phase to 14 for uplink 2
09:38:10:setup_element:INFO:	Setting the data phase to 11 for uplink 3
09:38:10:setup_element:INFO:	Setting the data phase to 14 for uplink 4
09:38:10:setup_element:INFO:	Setting the data phase to 11 for uplink 5
09:38:10:setup_element:INFO:	Setting the data phase to 10 for uplink 6
09:38:10:setup_element:INFO:	Setting the data phase to 8 for uplink 7
09:38:10:setup_element:INFO:	Setting the data phase to 16 for uplink 8
09:38:10:setup_element:INFO:	Setting the data phase to 22 for uplink 9
09:38:10:setup_element:INFO:	Setting the data phase to 21 for uplink 10
09:38:10:setup_element:INFO:	Setting the data phase to 25 for uplink 11
09:38:10:setup_element:INFO:	Setting the data phase to 27 for uplink 12
09:38:10:setup_element:INFO:	Setting the data phase to 29 for uplink 13
09:38:10:setup_element:INFO:	Setting the data phase to 31 for uplink 14
09:38:10:setup_element:INFO:	Setting the data phase to 32 for uplink 15
09:38:10:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 69
    Eye Windows:
      Uplink  0: X_________________________________________________________________________XXXXXX
      Uplink  1: X_________________________________________________________________________XXXXXX
      Uplink  2: X_________________________________________________________________________XXXXXX
      Uplink  3: X_________________________________________________________________________XXXXXX
      Uplink  4: ________________________________________________________________________XXXXXXXX
      Uplink  5: ________________________________________________________________________XXXXXXXX
      Uplink  6: ______________________________________________________________________XXXXXXXXX_
      Uplink  7: ______________________________________________________________________XXXXXXXXX_
      Uplink  8: ________________________________________________________________________XXXXXXX_
      Uplink  9: ________________________________________________________________________XXXXXXX_
      Uplink 10: ________________________________________________________________________XXXXXXXX
      Uplink 11: ________________________________________________________________________XXXXXXXX
      Uplink 12: _________________________________________________________________________XXXXXX_
      Uplink 13: _________________________________________________________________________XXXXXX_
      Uplink 14: X__________________________________________________________________________XXXXX
      Uplink 15: X__________________________________________________________________________XXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 1:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 2:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 3:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 4:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 5:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 6:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 7:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 8:
      Optimal Phase: 16
      Window Length: 36
      Eye Window: ___________________________________XXXX_
    Uplink 9:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 10:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 11:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 12:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 13:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 14:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 15:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________
]
09:38:10:setup_element:INFO:	Beginning SMX ASICs map scan
09:38:10:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:38:10:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:38:10:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:38:10:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:38:10:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:38:10:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 7
09:38:10:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 6
09:38:10:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 14
09:38:10:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 15
09:38:10:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 5
09:38:10:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 4
09:38:10:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 12
09:38:10:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 13
09:38:11:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 3
09:38:11:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 2
09:38:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 10
09:38:11:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 11
09:38:11:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 1
09:38:11:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 0
09:38:11:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 8
09:38:11:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 9
09:38:13:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 69
    Eye Windows:
      Uplink  0: X_________________________________________________________________________XXXXXX
      Uplink  1: X_________________________________________________________________________XXXXXX
      Uplink  2: X_________________________________________________________________________XXXXXX
      Uplink  3: X_________________________________________________________________________XXXXXX
      Uplink  4: ________________________________________________________________________XXXXXXXX
      Uplink  5: ________________________________________________________________________XXXXXXXX
      Uplink  6: ______________________________________________________________________XXXXXXXXX_
      Uplink  7: ______________________________________________________________________XXXXXXXXX_
      Uplink  8: ________________________________________________________________________XXXXXXX_
      Uplink  9: ________________________________________________________________________XXXXXXX_
      Uplink 10: ________________________________________________________________________XXXXXXXX
      Uplink 11: ________________________________________________________________________XXXXXXXX
      Uplink 12: _________________________________________________________________________XXXXXX_
      Uplink 13: _________________________________________________________________________XXXXXX_
      Uplink 14: X__________________________________________________________________________XXXXX
      Uplink 15: X__________________________________________________________________________XXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 1:
      Optimal Phase: 13
      Window Length: 35
      Eye Window: _______________________________XXXXX____
    Uplink 2:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 3:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 4:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 5:
      Optimal Phase: 11
      Window Length: 35
      Eye Window: _____________________________XXXXX______
    Uplink 6:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 7:
      Optimal Phase: 8
      Window Length: 35
      Eye Window: __________________________XXXXX_________
    Uplink 8:
      Optimal Phase: 16
      Window Length: 36
      Eye Window: ___________________________________XXXX_
    Uplink 9:
      Optimal Phase: 22
      Window Length: 35
      Eye Window: XXXXX___________________________________
    Uplink 10:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 11:
      Optimal Phase: 25
      Window Length: 34
      Eye Window: ___XXXXXX_______________________________
    Uplink 12:
      Optimal Phase: 27
      Window Length: 35
      Eye Window: _____XXXXX______________________________
    Uplink 13:
      Optimal Phase: 29
      Window Length: 36
      Eye Window: ________XXXX____________________________
    Uplink 14:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 15:
      Optimal Phase: 32
      Window Length: 34
      Eye Window: __________XXXXXX________________________

09:38:13:setup_element:INFO:	Performing Elink synchronization
09:38:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:38:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:38:13:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:38:13:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:38:13:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
09:38:13:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:38:13:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  0  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   1  |   [0]   |  0  |  0  |     [14]     |  [(0, 14), (1, 15)]
   2  |   [0]   |  0  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   3  |   [0]   |  0  |  0  |     [12]     |  [(0, 12), (1, 13)]
   4  |   [0]   |  0  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   5  |   [0]   |  0  |  0  |     [10]     |  [(0, 10), (1, 11)]
   6  |   [0]   |  0  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   7  |   [0]   |  0  |  0  |     [8]      |   [(0, 8), (1, 9)] 
09:38:14:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:38:14:febtest:INFO:	7-0 | XA-000-08-002-001-006-254-05 |  28.2 | 1201.0
09:38:14:febtest:INFO:	14-1 | XA-000-08-002-001-007-000-14 |  31.4 | 1189.2
09:38:15:febtest:INFO:	5-2 | XA-000-08-002-001-007-001-14 |  18.7 | 1230.3
09:38:15:febtest:INFO:	12-3 | XA-000-08-002-001-006-240-05 |  50.4 | 1130.0
09:38:15:febtest:INFO:	3-4 | XA-000-08-002-001-006-245-05 |  44.1 | 1141.9
09:38:15:febtest:INFO:	10-5 | XA-000-08-002-001-006-246-05 |  31.4 | 1189.2
09:38:16:febtest:INFO:	1-6 | XA-000-08-002-001-006-237-02 |  -3.3 | 1306.1
09:38:16:febtest:INFO:	8-7 | XA-000-08-002-001-006-251-05 |  31.4 | 1177.4
09:38:16:ST3_smx:INFO:	Configuring SMX FAST
09:38:18:ST3_smx:INFO:	chip: 7-0 	 37.726682 C 	 1171.483840 mV
09:38:18:ST3_smx:INFO:		Electrons
09:38:18:ST3_smx:INFO:	# loops 0
09:38:20:ST3_smx:INFO:	# loops 1
09:38:22:ST3_smx:INFO:	# loops 2
09:38:23:ST3_smx:INFO:	# loops 3
09:38:25:ST3_smx:INFO:	# loops 4
09:38:27:ST3_smx:INFO:	Total # of broken channels: 0
09:38:27:ST3_smx:INFO:	List of broken channels: []
09:38:27:ST3_smx:INFO:	Total # of broken channels: 24
09:38:27:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 6, 8, 10, 12, 14, 16, 18, 24, 26, 38, 44, 46, 48, 50, 52, 54, 56, 124, 126]
09:38:27:ST3_smx:INFO:	Configuring SMX FAST
09:38:29:ST3_smx:INFO:	chip: 14-1 	 37.726682 C 	 1177.390875 mV
09:38:29:ST3_smx:INFO:		Electrons
09:38:29:ST3_smx:INFO:	# loops 0
09:38:31:ST3_smx:INFO:	# loops 1
09:38:32:ST3_smx:INFO:	# loops 2
09:38:34:ST3_smx:INFO:	# loops 3
09:38:35:ST3_smx:INFO:	# loops 4
09:38:37:ST3_smx:INFO:	Total # of broken channels: 0
09:38:37:ST3_smx:INFO:	List of broken channels: []
09:38:37:ST3_smx:INFO:	Total # of broken channels: 0
09:38:37:ST3_smx:INFO:	List of broken channels: []
09:38:37:ST3_smx:INFO:	Configuring SMX FAST
09:38:39:ST3_smx:INFO:	chip: 5-2 	 25.062742 C 	 1212.728715 mV
09:38:39:ST3_smx:INFO:		Electrons
09:38:39:ST3_smx:INFO:	# loops 0
09:38:41:ST3_smx:INFO:	# loops 1
09:38:43:ST3_smx:INFO:	# loops 2
09:38:44:ST3_smx:INFO:	# loops 3
09:38:46:ST3_smx:INFO:	# loops 4
09:38:48:ST3_smx:INFO:	Total # of broken channels: 0
09:38:48:ST3_smx:INFO:	List of broken channels: []
09:38:48:ST3_smx:INFO:	Total # of broken channels: 0
09:38:48:ST3_smx:INFO:	List of broken channels: []
09:38:48:ST3_smx:INFO:	Configuring SMX FAST
09:38:50:ST3_smx:INFO:	chip: 12-3 	 47.250730 C 	 1159.654860 mV
09:38:50:ST3_smx:INFO:		Electrons
09:38:50:ST3_smx:INFO:	# loops 0
09:38:52:ST3_smx:INFO:	# loops 1
09:38:53:ST3_smx:INFO:	# loops 2
09:38:55:ST3_smx:INFO:	# loops 3
09:38:56:ST3_smx:INFO:	# loops 4
09:38:58:ST3_smx:INFO:	Total # of broken channels: 0
09:38:58:ST3_smx:INFO:	List of broken channels: []
09:38:58:ST3_smx:INFO:	Total # of broken channels: 0
09:38:58:ST3_smx:INFO:	List of broken channels: []
09:38:58:ST3_smx:INFO:	Configuring SMX FAST
09:39:00:ST3_smx:INFO:	chip: 3-4 	 37.726682 C 	 1177.390875 mV
09:39:00:ST3_smx:INFO:		Electrons
09:39:00:ST3_smx:INFO:	# loops 0
09:39:02:ST3_smx:INFO:	# loops 1
09:39:04:ST3_smx:INFO:	# loops 2
09:39:05:ST3_smx:INFO:	# loops 3
09:39:07:ST3_smx:INFO:	# loops 4
09:39:08:ST3_smx:INFO:	Total # of broken channels: 1
09:39:08:ST3_smx:INFO:	List of broken channels: [30]
09:39:08:ST3_smx:INFO:	Total # of broken channels: 1
09:39:08:ST3_smx:INFO:	List of broken channels: [30]
09:39:09:ST3_smx:INFO:	Configuring SMX FAST
09:39:11:ST3_smx:INFO:	chip: 10-5 	 28.225000 C 	 1212.728715 mV
09:39:11:ST3_smx:INFO:		Electrons
09:39:11:ST3_smx:INFO:	# loops 0
09:39:12:ST3_smx:INFO:	# loops 1
09:39:14:ST3_smx:INFO:	# loops 2
09:39:16:ST3_smx:INFO:	# loops 3
09:39:17:ST3_smx:INFO:	# loops 4
09:39:19:ST3_smx:INFO:	Total # of broken channels: 0
09:39:19:ST3_smx:INFO:	List of broken channels: []
09:39:19:ST3_smx:INFO:	Total # of broken channels: 0
09:39:19:ST3_smx:INFO:	List of broken channels: []
09:39:19:ST3_smx:INFO:	Configuring SMX FAST
09:39:21:ST3_smx:INFO:	chip: 1-6 	 12.438562 C 	 1265.400000 mV
09:39:21:ST3_smx:INFO:		Electrons
09:39:21:ST3_smx:INFO:	# loops 0
09:39:23:ST3_smx:INFO:	# loops 1
09:39:24:ST3_smx:INFO:	# loops 2
09:39:26:ST3_smx:INFO:	# loops 3
09:39:28:ST3_smx:INFO:	# loops 4
09:39:29:ST3_smx:INFO:	Total # of broken channels: 0
09:39:29:ST3_smx:INFO:	List of broken channels: []
09:39:29:ST3_smx:INFO:	Total # of broken channels: 0
09:39:29:ST3_smx:INFO:	List of broken channels: []
09:39:30:ST3_smx:INFO:	Configuring SMX FAST
09:39:31:ST3_smx:INFO:	chip: 8-7 	 40.898880 C 	 1159.654860 mV
09:39:32:ST3_smx:INFO:		Electrons
09:39:32:ST3_smx:INFO:	# loops 0
09:39:33:ST3_smx:INFO:	# loops 1
09:39:35:ST3_smx:INFO:	# loops 2
09:39:37:ST3_smx:INFO:	# loops 3
09:39:38:ST3_smx:INFO:	# loops 4
09:39:40:ST3_smx:INFO:	Total # of broken channels: 0
09:39:40:ST3_smx:INFO:	List of broken channels: []
09:39:40:ST3_smx:INFO:	Total # of broken channels: 1
09:39:40:ST3_smx:INFO:	List of broken channels: [1]
09:39:41:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:39:41:febtest:INFO:	7-0 | XA-000-08-002-001-006-254-05 |  44.1 | 1171.5
09:39:41:febtest:INFO:	14-1 | XA-000-08-002-001-007-000-14 |  40.9 | 1177.4
09:39:41:febtest:INFO:	5-2 | XA-000-08-002-001-007-001-14 |  28.2 | 1218.6
09:39:42:febtest:INFO:	12-3 | XA-000-08-002-001-006-240-05 |  47.3 | 1165.6
09:39:42:febtest:INFO:	3-4 | XA-000-08-002-001-006-245-05 |  40.9 | 1177.4
09:39:42:febtest:INFO:	10-5 | XA-000-08-002-001-006-246-05 |  28.2 | 1212.7
09:39:42:febtest:INFO:	1-6 | XA-000-08-002-001-006-237-02 |  12.4 | 1265.4
09:39:43:febtest:INFO:	8-7 | XA-000-08-002-001-006-251-05 |  40.9 | 1159.7
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_29-09_37_44
OPERATOR  : Kerstin S.; Olga B.; Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6T1001191A2 124 D

FEB_SN : 2092
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	
MODULE_NAME:	L4DL600119 M4DL6T1001191A2 124 D

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['2.450', '1.8760', '1.850', '0.6027', '0.000', '0.0000', '7.000', '1.5690']
VI_after__Init : ['2.450', '2.0040', '1.850', '0.3225', '0.000', '0.0000', '7.000', '1.5710']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:39:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:39:51:ST3_Shared:INFO:	-------------------------FEB-Sensor-------------------------
09:39:51:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:39:53:ST3_ModuleSelector:INFO:	L4DL600119 M4DL6T1001191A2 124 D

09:39:53:ST3_ModuleSelector:INFO:	
09:39:54:febtest:INFO:	Testing FEB with SN 2092
09:39:55:smx_tester:INFO:	Scanning setup
09:39:55:elinks:INFO:	Disabling clock on downlink 0
09:39:55:elinks:INFO:	Disabling clock on downlink 1
09:39:55:elinks:INFO:	Disabling clock on downlink 2
09:39:55:elinks:INFO:	Disabling clock on downlink 3
09:39:55:elinks:INFO:	Disabling clock on downlink 4
09:39:55:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:39:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:39:55:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 0
09:39:55:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 1
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 2
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 3
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 4
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 5
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 6
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 7
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 8
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 9
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 10
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 11
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 12
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 13
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 14
09:39:56:setup_element:INFO:	SOS detected for group 0, downlink 0, uplink 15
09:39:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:39:56:elinks:INFO:	Disabling clock on downlink 0
09:39:56:elinks:INFO:	Disabling clock on downlink 1
09:39:56:elinks:INFO:	Disabling clock on downlink 2
09:39:56:elinks:INFO:	Disabling clock on downlink 3
09:39:56:elinks:INFO:	Disabling clock on downlink 4
09:39:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:39:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:39:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:39:56:elinks:INFO:	Disabling clock on downlink 0
09:39:56:elinks:INFO:	Disabling clock on downlink 1
09:39:56:elinks:INFO:	Disabling clock on downlink 2
09:39:56:elinks:INFO:	Disabling clock on downlink 3
09:39:56:elinks:INFO:	Disabling clock on downlink 4
09:39:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:39:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:39:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:39:56:elinks:INFO:	Disabling clock on downlink 0
09:39:56:elinks:INFO:	Disabling clock on downlink 1
09:39:56:elinks:INFO:	Disabling clock on downlink 2
09:39:56:elinks:INFO:	Disabling clock on downlink 3
09:39:56:elinks:INFO:	Disabling clock on downlink 4
09:39:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:39:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:39:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:39:56:elinks:INFO:	Disabling clock on downlink 0
09:39:56:elinks:INFO:	Disabling clock on downlink 1
09:39:56:elinks:INFO:	Disabling clock on downlink 2
09:39:56:elinks:INFO:	Disabling clock on downlink 3
09:39:56:elinks:INFO:	Disabling clock on downlink 4
09:39:56:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:39:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:39:56:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:39:56:setup_element:INFO:	Scanning clock phase
09:39:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:39:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:39:57:setup_element:INFO:	Clock phase scan results for group 0, downlink 0
09:39:57:setup_element:INFO:	Eye window for uplink 0 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:39:57:setup_element:INFO:	Eye window for uplink 1 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:39:57:setup_element:INFO:	Eye window for uplink 2 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
09:39:57:setup_element:INFO:	Eye window for uplink 3 : X________________________________________________________________________XXXXXXX
Clock Delay: 36
09:39:57:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:39:57:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXXXXX
Clock Delay: 35
09:39:57:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:39:57:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
09:39:57:setup_element:INFO:	Eye window for uplink 8 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:39:57:setup_element:INFO:	Eye window for uplink 9 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:39:57:setup_element:INFO:	Eye window for uplink 10: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:39:57:setup_element:INFO:	Eye window for uplink 11: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:39:57:setup_element:INFO:	Eye window for uplink 12: _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:39:57:setup_element:INFO:	Eye window for uplink 13: _________________________________________________________________________XXXXXXX
Clock Delay: 36
09:39:57:setup_element:INFO:	Eye window for uplink 14: X__________________________________________________________________________XXXXX
Clock Delay: 37
09:39:57:setup_element:INFO:	Eye window for uplink 15: X__________________________________________________________________________XXXXX
Clock Delay: 37
09:39:57:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 0
09:39:57:setup_element:INFO:	Scanning data phases
09:39:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:39:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:40:02:setup_element:INFO:	Data phase scan results for group 0, downlink 0
09:40:02:setup_element:INFO:	Eye window for uplink 0 : X_________________________________XXXXX_
Data delay found: 17
09:40:02:setup_element:INFO:	Eye window for uplink 1 : ______________________________XXXXXX____
Data delay found: 12
09:40:02:setup_element:INFO:	Eye window for uplink 2 : _______________________________XXXXXX___
Data delay found: 13
09:40:02:setup_element:INFO:	Eye window for uplink 3 : _____________________________XXXXXX_____
Data delay found: 11
09:40:02:setup_element:INFO:	Eye window for uplink 4 : ________________________________XXXXX___
Data delay found: 14
09:40:02:setup_element:INFO:	Eye window for uplink 5 : _____________________________XXXX_______
Data delay found: 10
09:40:02:setup_element:INFO:	Eye window for uplink 6 : ____________________________XXXX________
Data delay found: 9
09:40:02:setup_element:INFO:	Eye window for uplink 7 : _________________________XXXXX__________
Data delay found: 7
09:40:02:setup_element:INFO:	Eye window for uplink 8 : __________________________________XXXX__
Data delay found: 15
09:40:02:setup_element:INFO:	Eye window for uplink 9 : XXXXX__________________________________X
Data delay found: 21
09:40:02:setup_element:INFO:	Eye window for uplink 10: XXXX__________________________________XX
Data delay found: 20
09:40:02:setup_element:INFO:	Eye window for uplink 11: __XXXXX_________________________________
Data delay found: 24
09:40:02:setup_element:INFO:	Eye window for uplink 12: ____XXXXX_______________________________
Data delay found: 26
09:40:02:setup_element:INFO:	Eye window for uplink 13: _______XXXXX____________________________
Data delay found: 29
09:40:02:setup_element:INFO:	Eye window for uplink 14: ________XXXXX___________________________
Data delay found: 30
09:40:02:setup_element:INFO:	Eye window for uplink 15: __________XXXXX_________________________
Data delay found: 32
09:40:02:setup_element:INFO:	Setting the data phase to 17 for uplink 0
09:40:02:setup_element:INFO:	Setting the data phase to 12 for uplink 1
09:40:02:setup_element:INFO:	Setting the data phase to 13 for uplink 2
09:40:02:setup_element:INFO:	Setting the data phase to 11 for uplink 3
09:40:02:setup_element:INFO:	Setting the data phase to 14 for uplink 4
09:40:02:setup_element:INFO:	Setting the data phase to 10 for uplink 5
09:40:02:setup_element:INFO:	Setting the data phase to 9 for uplink 6
09:40:02:setup_element:INFO:	Setting the data phase to 7 for uplink 7
09:40:02:setup_element:INFO:	Setting the data phase to 15 for uplink 8
09:40:02:setup_element:INFO:	Setting the data phase to 21 for uplink 9
09:40:02:setup_element:INFO:	Setting the data phase to 20 for uplink 10
09:40:02:setup_element:INFO:	Setting the data phase to 24 for uplink 11
09:40:02:setup_element:INFO:	Setting the data phase to 26 for uplink 12
09:40:02:setup_element:INFO:	Setting the data phase to 29 for uplink 13
09:40:02:setup_element:INFO:	Setting the data phase to 30 for uplink 14
09:40:02:setup_element:INFO:	Setting the data phase to 32 for uplink 15
09:40:02:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 70
    Eye Windows:
      Uplink  0: X_________________________________________________________________________XXXXXX
      Uplink  1: X_________________________________________________________________________XXXXXX
      Uplink  2: X________________________________________________________________________XXXXXXX
      Uplink  3: X________________________________________________________________________XXXXXXX
      Uplink  4: _______________________________________________________________________XXXXXXXXX
      Uplink  5: _______________________________________________________________________XXXXXXXXX
      Uplink  6: _______________________________________________________________________XXXXXXXX_
      Uplink  7: _______________________________________________________________________XXXXXXXX_
      Uplink  8: ________________________________________________________________________XXXXXXX_
      Uplink  9: ________________________________________________________________________XXXXXXX_
      Uplink 10: ________________________________________________________________________XXXXXXX_
      Uplink 11: ________________________________________________________________________XXXXXXX_
      Uplink 12: _________________________________________________________________________XXXXXXX
      Uplink 13: _________________________________________________________________________XXXXXXX
      Uplink 14: X__________________________________________________________________________XXXXX
      Uplink 15: X__________________________________________________________________________XXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 1:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 2:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 3:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 4:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 5:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 6:
      Optimal Phase: 9
      Window Length: 36
      Eye Window: ____________________________XXXX________
    Uplink 7:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 8:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 9:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 10:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 11:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 12:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 13:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 14:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 15:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________
]
09:40:02:setup_element:INFO:	Beginning SMX ASICs map scan
09:40:02:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:40:02:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:40:02:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:40:02:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:40:02:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:40:02:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 7
09:40:03:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 6
09:40:03:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 14
09:40:03:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 15
09:40:03:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 5
09:40:03:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 4
09:40:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 12
09:40:03:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 13
09:40:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 3
09:40:03:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 2
09:40:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 10
09:40:03:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 11
09:40:04:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 1
09:40:04:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 0
09:40:04:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 8
09:40:04:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 9
09:40:05:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 0
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 14), (1, 15)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 8), (1, 9)
  Clock Phase Characteristic:
    Optimal Phase: 35
    Window Length: 70
    Eye Windows:
      Uplink  0: X_________________________________________________________________________XXXXXX
      Uplink  1: X_________________________________________________________________________XXXXXX
      Uplink  2: X________________________________________________________________________XXXXXXX
      Uplink  3: X________________________________________________________________________XXXXXXX
      Uplink  4: _______________________________________________________________________XXXXXXXXX
      Uplink  5: _______________________________________________________________________XXXXXXXXX
      Uplink  6: _______________________________________________________________________XXXXXXXX_
      Uplink  7: _______________________________________________________________________XXXXXXXX_
      Uplink  8: ________________________________________________________________________XXXXXXX_
      Uplink  9: ________________________________________________________________________XXXXXXX_
      Uplink 10: ________________________________________________________________________XXXXXXX_
      Uplink 11: ________________________________________________________________________XXXXXXX_
      Uplink 12: _________________________________________________________________________XXXXXXX
      Uplink 13: _________________________________________________________________________XXXXXXX
      Uplink 14: X__________________________________________________________________________XXXXX
      Uplink 15: X__________________________________________________________________________XXXXX
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXX_
    Uplink 1:
      Optimal Phase: 12
      Window Length: 34
      Eye Window: ______________________________XXXXXX____
    Uplink 2:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 3:
      Optimal Phase: 11
      Window Length: 34
      Eye Window: _____________________________XXXXXX_____
    Uplink 4:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 5:
      Optimal Phase: 10
      Window Length: 36
      Eye Window: _____________________________XXXX_______
    Uplink 6:
      Optimal Phase: 9
      Window Length: 36
      Eye Window: ____________________________XXXX________
    Uplink 7:
      Optimal Phase: 7
      Window Length: 35
      Eye Window: _________________________XXXXX__________
    Uplink 8:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 9:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 10:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 11:
      Optimal Phase: 24
      Window Length: 35
      Eye Window: __XXXXX_________________________________
    Uplink 12:
      Optimal Phase: 26
      Window Length: 35
      Eye Window: ____XXXXX_______________________________
    Uplink 13:
      Optimal Phase: 29
      Window Length: 35
      Eye Window: _______XXXXX____________________________
    Uplink 14:
      Optimal Phase: 30
      Window Length: 35
      Eye Window: ________XXXXX___________________________
    Uplink 15:
      Optimal Phase: 32
      Window Length: 35
      Eye Window: __________XXXXX_________________________

09:40:05:setup_element:INFO:	Performing Elink synchronization
09:40:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:40:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [0]
09:40:05:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [0]
09:40:05:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [0]
09:40:05:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 0
09:40:05:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:40:05:ST3_emu:INFO:	Number of chips: 8
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   0  |   [0]   |  0  |  0  |     [7]      |   [(0, 7), (1, 6)] 
   1  |   [0]   |  0  |  0  |     [14]     |  [(0, 14), (1, 15)]
   2  |   [0]   |  0  |  0  |     [5]      |   [(0, 5), (1, 4)] 
   3  |   [0]   |  0  |  0  |     [12]     |  [(0, 12), (1, 13)]
   4  |   [0]   |  0  |  0  |     [3]      |   [(0, 3), (1, 2)] 
   5  |   [0]   |  0  |  0  |     [10]     |  [(0, 10), (1, 11)]
   6  |   [0]   |  0  |  0  |     [1]      |   [(0, 1), (1, 0)] 
   7  |   [0]   |  0  |  0  |     [8]      |   [(0, 8), (1, 9)] 
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_0_7 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_0_7 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_0__upli_7
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_14 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_14 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_14
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_2_5 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_2_5 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_2__upli_5
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_12 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_12 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_12
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_4_3 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_4_3 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_4__upli_3
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_6_1 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_6_1 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_6__upli_1
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_8 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_8 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_8
09:40:07:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:40:07:febtest:INFO:	7-0 | XA-000-08-002-001-006-254-05 |  34.6 | 1201.0
09:40:07:febtest:INFO:	14-1 | XA-000-08-002-001-007-000-14 |  37.7 | 1183.3
09:40:08:febtest:INFO:	5-2 | XA-000-08-002-001-007-001-14 |  34.6 | 1195.1
09:40:08:febtest:INFO:	12-3 | XA-000-08-002-001-006-240-05 |  53.6 | 1130.0
09:40:08:febtest:INFO:	3-4 | XA-000-08-002-001-006-245-05 |  50.4 | 1135.9
09:40:08:febtest:INFO:	10-5 | XA-000-08-002-001-006-246-05 |  37.7 | 1183.3
09:40:09:febtest:INFO:	1-6 | XA-000-08-002-001-006-237-02 |  -0.1 | 1306.1
09:40:09:febtest:INFO:	8-7 | XA-000-08-002-001-006-251-05 |  37.7 | 1177.4
09:40:09:ST3_smx:INFO:	Configuring SMX FAST
09:40:11:ST3_smx:INFO:	chip: 7-0 	 44.073563 C 	 1171.483840 mV
09:40:11:ST3_smx:INFO:		Electrons
09:40:11:ST3_smx:INFO:	# loops 0
09:40:13:ST3_smx:INFO:	# loops 1
09:40:15:ST3_smx:INFO:	# loops 2
09:40:16:ST3_smx:INFO:	# loops 3
09:40:18:ST3_smx:INFO:	# loops 4
09:40:20:ST3_smx:INFO:	Total # of broken channels: 0
09:40:20:ST3_smx:INFO:	List of broken channels: []
09:40:20:ST3_smx:INFO:	Total # of broken channels: 15
09:40:20:ST3_smx:INFO:	List of broken channels: [0, 1, 2, 3, 4, 6, 8, 10, 12, 16, 18, 24, 26, 56, 126]
09:40:20:ST3_smx:INFO:	Configuring SMX FAST
09:40:22:ST3_smx:INFO:	chip: 14-1 	 44.073563 C 	 1177.390875 mV
09:40:22:ST3_smx:INFO:		Electrons
09:40:22:ST3_smx:INFO:	# loops 0
09:40:24:ST3_smx:INFO:	# loops 1
09:40:25:ST3_smx:INFO:	# loops 2
09:40:27:ST3_smx:INFO:	# loops 3
09:40:28:ST3_smx:INFO:	# loops 4
09:40:30:ST3_smx:INFO:	Total # of broken channels: 0
09:40:30:ST3_smx:INFO:	List of broken channels: []
09:40:30:ST3_smx:INFO:	Total # of broken channels: 0
09:40:30:ST3_smx:INFO:	List of broken channels: []
09:40:30:ST3_smx:INFO:	Configuring SMX FAST
09:40:32:ST3_smx:INFO:	chip: 5-2 	 31.389742 C 	 1212.728715 mV
09:40:32:ST3_smx:INFO:		Electrons
09:40:32:ST3_smx:INFO:	# loops 0
09:40:34:ST3_smx:INFO:	# loops 1
09:40:36:ST3_smx:INFO:	# loops 2
09:40:37:ST3_smx:INFO:	# loops 3
09:40:39:ST3_smx:INFO:	# loops 4
09:40:41:ST3_smx:INFO:	Total # of broken channels: 0
09:40:41:ST3_smx:INFO:	List of broken channels: []
09:40:41:ST3_smx:INFO:	Total # of broken channels: 0
09:40:41:ST3_smx:INFO:	List of broken channels: []
09:40:41:ST3_smx:INFO:	Configuring SMX FAST
09:40:43:ST3_smx:INFO:	chip: 12-3 	 47.250730 C 	 1165.571835 mV
09:40:43:ST3_smx:INFO:		Electrons
09:40:43:ST3_smx:INFO:	# loops 0
09:40:45:ST3_smx:INFO:	# loops 1
09:40:46:ST3_smx:INFO:	# loops 2
09:40:48:ST3_smx:INFO:	# loops 3
09:40:49:ST3_smx:INFO:	# loops 4
09:40:51:ST3_smx:INFO:	Total # of broken channels: 0
09:40:51:ST3_smx:INFO:	List of broken channels: []
09:40:51:ST3_smx:INFO:	Total # of broken channels: 0
09:40:51:ST3_smx:INFO:	List of broken channels: []
09:40:51:ST3_smx:INFO:	Configuring SMX FAST
09:40:53:ST3_smx:INFO:	chip: 3-4 	 40.898880 C 	 1177.390875 mV
09:40:53:ST3_smx:INFO:		Electrons
09:40:53:ST3_smx:INFO:	# loops 0
09:40:55:ST3_smx:INFO:	# loops 1
09:40:57:ST3_smx:INFO:	# loops 2
09:40:58:ST3_smx:INFO:	# loops 3
09:41:00:ST3_smx:INFO:	# loops 4
09:41:01:ST3_smx:INFO:	Total # of broken channels: 1
09:41:01:ST3_smx:INFO:	List of broken channels: [30]
09:41:01:ST3_smx:INFO:	Total # of broken channels: 1
09:41:01:ST3_smx:INFO:	List of broken channels: [30]
09:41:02:ST3_smx:INFO:	Configuring SMX FAST
09:41:04:ST3_smx:INFO:	chip: 10-5 	 31.389742 C 	 1212.728715 mV
09:41:04:ST3_smx:INFO:		Electrons
09:41:04:ST3_smx:INFO:	# loops 0
09:41:05:ST3_smx:INFO:	# loops 1
09:41:07:ST3_smx:INFO:	# loops 2
09:41:09:ST3_smx:INFO:	# loops 3
09:41:10:ST3_smx:INFO:	# loops 4
09:41:12:ST3_smx:INFO:	Total # of broken channels: 0
09:41:12:ST3_smx:INFO:	List of broken channels: []
09:41:12:ST3_smx:INFO:	Total # of broken channels: 0
09:41:12:ST3_smx:INFO:	List of broken channels: []
09:41:12:ST3_smx:INFO:	Configuring SMX FAST
09:41:14:ST3_smx:INFO:	chip: 1-6 	 15.590880 C 	 1265.400000 mV
09:41:14:ST3_smx:INFO:		Electrons
09:41:14:ST3_smx:INFO:	# loops 0
09:41:16:ST3_smx:INFO:	# loops 1
09:41:18:ST3_smx:INFO:	# loops 2
09:41:19:ST3_smx:INFO:	# loops 3
09:41:21:ST3_smx:INFO:	# loops 4
09:41:22:ST3_smx:INFO:	Total # of broken channels: 0
09:41:22:ST3_smx:INFO:	List of broken channels: []
09:41:22:ST3_smx:INFO:	Total # of broken channels: 0
09:41:22:ST3_smx:INFO:	List of broken channels: []
09:41:23:ST3_smx:INFO:	Configuring SMX FAST
09:41:25:ST3_smx:INFO:	chip: 8-7 	 44.073563 C 	 1159.654860 mV
09:41:25:ST3_smx:INFO:		Electrons
09:41:25:ST3_smx:INFO:	# loops 0
09:41:26:ST3_smx:INFO:	# loops 1
09:41:28:ST3_smx:INFO:	# loops 2
09:41:30:ST3_smx:INFO:	# loops 3
09:41:31:ST3_smx:INFO:	# loops 4
09:41:33:ST3_smx:INFO:	Total # of broken channels: 0
09:41:33:ST3_smx:INFO:	List of broken channels: []
09:41:33:ST3_smx:INFO:	Total # of broken channels: 1
09:41:33:ST3_smx:INFO:	List of broken channels: [1]
09:41:34:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
09:41:34:febtest:INFO:	7-0 | XA-000-08-002-001-006-254-05 |  47.3 | 1171.5
09:41:34:febtest:INFO:	14-1 | XA-000-08-002-001-007-000-14 |  44.1 | 1177.4
09:41:34:febtest:INFO:	5-2 | XA-000-08-002-001-007-001-14 |  31.4 | 1218.6
09:41:35:febtest:INFO:	12-3 | XA-000-08-002-001-006-240-05 |  47.3 | 1165.6
09:41:35:febtest:INFO:	3-4 | XA-000-08-002-001-006-245-05 |  40.9 | 1177.4
09:41:35:febtest:INFO:	10-5 | XA-000-08-002-001-006-246-05 |  31.4 | 1212.7
09:41:35:febtest:INFO:	1-6 | XA-000-08-002-001-006-237-02 |  15.6 | 1265.4
09:41:36:febtest:INFO:	8-7 | XA-000-08-002-001-006-251-05 |  44.1 | 1159.7
############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 2024_01_29-09_39_51
OPERATOR  : Kerstin S.; Olga B.; Oleksandr S.; 
SITE      : GSI
SETUP     : GSI_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : L4DL600119 M4DL6T1001191A2 124 D

FEB_SN : 2092
FEB_TYPE : 8.2
FEB_UPLINKS : 2
FEB_A : 1
FEB_B : 0
---------------------------------------
SENSOR_ID:	
MODULE_NAME:	L4DL600119 M4DL6T1001191A2 124 D

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
---------------------------------------
VI_before_Init : ['2.450', '1.8960', '1.850', '0.5748', '0.000', '0.0000', '7.000', '1.5720']
VI_after__Init : ['2.450', '2.0040', '1.851', '0.3585', '0.000', '0.0000', '7.000', '1.5730']
VI_at__the_End : ['0', '0', '0', '0', '0', '0']
09:44:24:ST3_Shared:INFO:	/home/cbm/public_html/Production_LogDir//FEB/FEB_2092/TestDate_2024_01_29-09_39_51/